335 research outputs found

    Evolving Cellular Automata Schemes for Protein Folding Modeling Using the Rosetta Atomic Representation

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    Financiado para publicación en acceso aberto: Universidade da Coruña/CISUG [Abstract] Protein folding is the dynamic process by which a protein folds into its final native structure. This is different to the traditional problem of the prediction of the final protein structure, since it requires a modeling of how protein components interact over time to obtain the final folded structure. In this study we test whether a model of the folding process can be obtained exclusively through machine learning. To this end, protein folding is considered as an emergent process and the cellular automata tool is used to model the folding process. A neural cellular automaton is defined, using a connectionist model that acts as a cellular automaton through the protein chain to define the dynamic folding. Differential evolution is used to automatically obtain the optimized neural cellular automata that provide protein folding. We tested the methods with the Rosetta coarse-grained atomic model of protein representation, using different proteins to analyze the modeling of folding and the structure refinement that the modeling can provide, showing the potential advantages that such methods offer, but also difficulties that arise.This study was funded by the Xunta de Galicia and the European Union (European Regional Development Fund - Galicia 2014-2020 Program), with grants CITIC (ED431G 2019/01), GPC ED431B 2019/03 and IN845D-02 (funded by the “Agencia Gallega de Innovación”, co-financed by Feder funds), and by the Spanish Ministry of Science and Innovation (project PID2020-116201GB-I00). Open Access funding provided thanks to the CRUE-CSIC agreement with Springer NatureXunta de Galicia; ED431G 2019/01Xunta de Galicia; ED431B 2019/03Xunta de Galicia; IN845D-0

    07011 Abstracts Collection -- Runtime Verification

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    From January 2--6 2007 the Dagstuhl Seminar 07011 {em `Runtime Verification\u27} was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar have been put together in this paper. The first section is an executive summary that describes the seminar topics in general

    Implementation of context-aware network architecture for smart objects based on functional composition

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    Lack of flexibility of current Internet architecture led researchers to come up with new paradigms for a novel Internet architecture, which would be able to reduce complexity and increase flexibility compared to current Internet architecture. Functional co mposition is a promising approach to flexible and evolvable architecture design. The idea is composing complex protocol suites by dynamically bind and arrange different functions to obtain certain behavior. Herein, we present the implementation of a contex t - aware network architecture based on functional composition for smart objects. A sub - set of those basic functional blocks has been implemented and validated on an experimental testbed using different network topologies .Peer ReviewedPostprint (author’s final draft

    Assessing self-organization and emergence in Evolvable Assembly Systems (EAS)

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    Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de ComputadoresThere is a growing interest from industry in the applications of distributed IT. Currently, most modern plants use distributed controllers either to control production processes, monitor them or both. Despite the efforts on the last years to improve the implementation of the new manufacturing paradigms, the industry is still mainly using traditional controllers. Now, more than ever, with an economic crisis the costumers are searching for cheap and customized products, which represents a great opportunity for the new paradigms to claim their space in the market. Most of the research on distributed manufacturing is regarding the control and communication infrastructure. They are key aspects for self-organization and there is a lack of study on the metrics that regulate the self-organization and autonomous response of modern production paradigms. This thesis presents a probabilistic framework that promotes self-organization on a multiagent system based on a new manufacturing concept, the Evolvable Assembly Systems/Evolvable Production Systems. A methodology is proposed to assess the impact of self-organization on the system behavior, by the application of the probabilistic framework that has the dual purpose of controlling and explaining the system dynamics. The probabilistic framework shows the likelihood of some resources being allocated to the production process. This information is constantly updated and exchanged by the agents that compose the system. The emergent effect of this self-organization dynamic is an even load balancing across the system without any centralized controller. The target systems of this work are therefore small systems with small production batches but with a high variability of production conditions and products. The agents that compose the system originated in the agent based architecture of the FP7-IDEAS proejct. This work has extended these agents and the outcome has been tested in the IDEAS demonstrators, as the changes have been incorporated in the latest version of the architecture, and in a simulation and more controlled environment were the proposed metric and its influence were assessed

    Class control: An adaptable and self configuring classroom control system

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    Class Control is a tool that was created at the University of St Andrews to allow a teacher to not only view all of the screens in a classroom at once but also take control of them and broadcast the teacher’s screen to them. Existing software wouldn’t allow the scalability to meet the demands of the size of the classroom so Class Control was developed and is still used by the school today.%0d%0aHowever, this tool was created to be used in one classroom just running the Mac OS. This thesis project aimed to add the ability to move this tool out of the classroom and be able to configure itself in a new classroom containing machines with other operating systems that can run Java.%0d%0aClass Control has now been extended to learn about a new environment it is in and use this information to help improve future runs of the tool. Previous configurations can be stored permitting a teacher to select a configuration that suits their needs and Class Control can also recommend a configuration depending on what clients it sees in the environment. Class Control can also be used to view and control Linux, Windows and Mac OS at the same time

    Extending Byzantine Fault Tolerance to Replicated Clients

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    Byzantine agreement protocols for replicated deterministic state machines guarantee that externally requested operations continue to execute correctly even if a bounded number of replicas fail in arbitrary ways. The state machines are passive, with clients responsible for any active ongoing application behavior. However, the clients are unreplicated and outside the fault-tolerance boundary. Consequently, agreement protocols for replicated state machines do not guarantee continued correct execution of long-running client applications. Building on the Castro and Liskov Byzantine Fault Tolerance protocol for unreplicated clients (CLBFT), we present a practical algorithm for Byzantine fault-tolerant execution of long-running distributed applications in which replicated deterministic clients invoke operations on replicated deterministic servers. The algorithm scales well to large replica groups, with roughly double the latency and message count when compared to CLBFT, which supports only unreplicated clients. The algorithm supports both synchronous and asynchronous clients, provides fault isolation between client and server groups with respect to both correctness and performance, and uses a novel architecture that accommodates externally requested software upgrades for long-running evolvable client applications

    Reconfigurable Architectures and Systems for IoT Applications

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    abstract: Internet of Things (IoT) has become a popular topic in industry over the recent years, which describes an ecosystem of internet-connected devices or things that enrich the everyday life by improving our productivity and efficiency. The primary components of the IoT ecosystem are hardware, software and services. While the software and services of IoT system focus on data collection and processing to make decisions, the underlying hardware is responsible for sensing the information, preprocess and transmit it to the servers. Since the IoT ecosystem is still in infancy, there is a great need for rapid prototyping platforms that would help accelerate the hardware design process. However, depending on the target IoT application, different sensors are required to sense the signals such as heart-rate, temperature, pressure, acceleration, etc., and there is a great need for reconfigurable platforms that can prototype different sensor interfacing circuits. This thesis primarily focuses on two important hardware aspects of an IoT system: (a) an FPAA based reconfigurable sensing front-end system and (b) an FPGA based reconfigurable processing system. To enable reconfiguration capability for any sensor type, Programmable ANalog Device Array (PANDA), a transistor-level analog reconfigurable platform is proposed. CAD tools required for implementation of front-end circuits on the platform are also developed. To demonstrate the capability of the platform on silicon, a small-scale array of 24×25 PANDA cells is fabricated in 65nm technology. Several analog circuit building blocks including amplifiers, bias circuits and filters are prototyped on the platform, which demonstrates the effectiveness of the platform for rapid prototyping IoT sensor interfaces. IoT systems typically use machine learning algorithms that run on the servers to process the data in order to make decisions. Recently, embedded processors are being used to preprocess the data at the energy-constrained sensor node or at IoT gateway, which saves considerable energy for transmission and bandwidth. Using conventional CPU based systems for implementing the machine learning algorithms is not energy-efficient. Hence an FPGA based hardware accelerator is proposed and an optimization methodology is developed to maximize throughput of any convolutional neural network (CNN) based machine learning algorithm on a resource-constrained FPGA.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

    Linux XIA: an interoperable meta network architecture

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    With the growing number of clean-slate redesigns of the Internet, the need for a medium that enables all stakeholders to participate in the realization, evaluation, and selection of these designs is increasing. We believe that the missing catalyst is a meta network architecture that welcomes most, if not all, clean-state designs on a level playing field, lowers deployment barriers, and leaves the final evaluation to the broader community. This thesis presents the eXpressive Internet (Meta) Architecture (XIA), itself a clean-slate design, as well as Linux XIA, a native implementation of XIA in the Linux kernel, as a candidate. As a meta network architecture, XIA is highly flexible, leaving stakeholders to choose an expressive set of network principals to instantiate a given network architecture within the XIA framework. Central to XIA is its novel, non-linear network addressing format, from which derive key architectural features such as evolvability, intrinsically secure identifiers, and a low degree of principal isolation. XIP, the network layer protocol of XIA, forwards packets by navigating these structured addresses and delegating the decision-making and packet processing to appropriate principals, accordingly. Taken together, these mechanisms work in tandem to support a broad spectrum of interoperable principals. We demonstrate how to port four distinct and unrelated network architectures onto Linux XIA, none of which were designed for interoperability with this platform. We then show that, notwithstanding this flexibility, Linux XIA's forwarding performance remains comparable to that of the more mature legacy TCP/IP stack implementation. Moreover, the ported architectures, namely IP, Serval, NDN, and ANTS, empower us to present a deployment plan for XIA, to explore design variations of the ported architectures that were impossible in their original form due to the requirement of self-sufficiency that a standalone network architecture bears, and to substantiate the claim that XIA readily supports and enables network evolution. Our work highlights the benefits of specializing network designs that XIA affords, and comprises instructive examples for the network researcher interested in design and implementation for future interoperability
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