A Robust 43-GHz VCO in CMOS for OC-768 SONET Applications

In this paper, we present a 43-GHz LC-VCO in 0.13-/spl mu/m CMOS for use in SONET OC-768 optical networks. A tuned output buffer is used to provide 1.3 V/sub p-p/ (single-ended) into a 90-fF capacitive load as is required when the VCO is used in typical clock and data recovery (CDR) circuits. Phase noise is -90 dBc/Hz at a 1-MHz offset from the carrier; this meets SONET jitter specifications. The design has a tune range of 4.2%. The VCO, including output buffers, consumes 14 mA from a 1-V supply and occupies 0.06 mm/sup 2/ of die area. Modern CMOS process characteristics and the high center frequency of this design mean that the tank loss is not dominated by the integrated inductor, but rather by the tank capacitance. An area-efficient inductor design that does not require any optimization is used

Jitter and phase noise in ring oscillators

A companion analysis of clock jitter and phase noise of single-ended and differential ring oscillators is presented. The impulse sensitivity functions are used to derive expressions for the jitter and phase noise of ring oscillators. The effect of the number of stages, power dissipation, frequency of oscillation, and short-channel effects on the jitter and phase noise of ring oscillators is analyzed. Jitter and phase noise due to substrate and supply noise is discussed, and the effect of symmetry on the upconversion of 1/f noise is demonstrated. Several new design insights are given for low jitter/phase-noise design. Good agreement between theory and measurements is observed

Photo-detectors integrated with resonant tunneling diodes

We report on photo-detectors consisting of an optical waveguide that incorporates a resonant tunneling diode (RTD). Operating at wavelengths around 1.55 μm in the optical communications C band we achieve maximum sensitivities of around 0.29 A/W which is dependent on the bias voltage. This is due to the nature of RTD nonlinear current-voltage characteristic that has a negative differential resistance (NDR) region. The resonant tunneling diode photo-detector (RTD-PD) can be operated in either non-oscillating or oscillating regimes depending on the bias voltage quiescent point. The oscillating regime is apparent when the RTD-PD is biased in the NDR region giving rise to electrical gain and microwave self-sustained oscillations Taking advantage of the RTD’s NDR distinctive characteristics, we demonstrate efficient detection of gigahertz (GHz) modulated optical carriers and optical control of a RTD GHz oscillator. RTD-PD based devices can have applications in generation and optical control of GHz low-phase noise oscillators, clock recovery systems, and fiber optic enabled radio frequency communication systems.info:eu-repo/semantics/publishedVersio

Bubble memory module

Design, fabrication and test of partially populated prototype recorder using 100 kilobit serial chips is described. Electrical interface, operating modes, and mechanical design of several module configurations are discussed. Fabrication and test of the module demonstrated the practicality of multiplexing resulting in lower power, weight, and volume. This effort resulted in the completion of a module consisting of a fully engineered printed circuit storage board populated with 5 of 8 possible cells and a wire wrapped electronics board. Interface of the module is 16 bits parallel at a maximum of 1.33 megabits per second data rate on either of two interface buses

Photo-detectors integrated with resonant tunneling diodes

We report on photo-detectors consisting of an optical waveguide that incorporates a resonant tunneling diode (RTD). Operating at wavelengths around 1.55 m in the optical communications C band we achieve maximum sensitivities of around 0.29 A/W which is dependent on the bias voltage. This is due to the nature of RTD nonlinear current-voltage characteristic that has a negative differential resistance (NDR) region. The resonant tunneling diode photo-detector (RTD-PD) can be operated in either non-oscillating or oscillating regimes depending on the bias voltage quiescent point. The oscillating regime is apparent when the RTD-PD is biased in the NDR region giving rise to electrical gain and microwave self-sustained oscillations Taking advantage of the RTD's NDR distinctive characteristics, we demonstrate efficient detection of gigahertz (GHz) modulated optical carriers and optical control of a RTD GHz oscillator. RTD-PD based devices can have applications in generation and optical control of GHz low-phase noise oscillators, clock recovery systems, and fiber optic enabled radio frequency communication systems.FCT under the project WOWi [PTDC/EEA-TEL/100755/2008]; programme POCTI/FEDER [REEQ/1272/EEI/2005]; FCT Portugal [SFRH/BPD/84466/2012]info:eu-repo/semantics/publishedVersio

A high speed serializer/deserializer design

A Serializer/Deserializer (SerDes) is a circuit that converts parallel data into a serial stream and vice versa. It helps solve clock/data skew problems, simplifies data transmission, lowers the power consumption and reduces the chip cost. The goal of this project was to solve the challenges in high speed SerDes design, which included the low jitter design, wide bandwidth design and low power design. A quarter-rate multiplexer/demultiplexer (MUX/DEMUX) was implemented. This quarter-rate structure decreases the required clock frequency from one half to one quarter of the data rate. It is shown that this significantly relaxes the design of the VCO at high speed and achieves lower power consumption. A novel multi-phase LC-ring oscillator was developed to supply a low noise clock to the SerDes. This proposed VCO combined an LC-tank with a ring structure to achieve both wide tuning range (11%) and low phase noise (-110dBc/Hz at 1MHz offset). With this structure, a data rate of 36 Gb/s was realized with a measured peak-to-peak jitter of 10ps using 0.18microm SiGe BiCMOS technology. The power consumption is 3.6W with 3.4V power supply voltage. At a 60 Gb/s data rate the simulated peak-to-peak jitter was 4.8ps using 65nm CMOS technology. The power consumption is 92mW with 2V power supply voltage. A time-to-digital (TDC) calibration circuit was designed to compensate for the phase mismatches among the multiple phases of the PLL clock using a three dimensional fully depleted silicon on insulator (3D FDSOI) CMOS process. The 3D process separated the analog PLL portion from the digital calibration portion into different tiers. This eliminated the noise coupling through the common substrate in the 2D process. Mismatches caused by the vertical tier-to-tier interconnections and the temperature influence in the 3D process were attenuated by the proposed calibration circuit. The design strategy and circuits developed from this dissertation provide significant benefit to both wired and wireless applications

A framework for quantification and physical modeling of cell mixing applied to oscillator synchronization in vertebrate somitogenesis

In development and disease, cells move as they exchange signals. One example is found in vertebrate development, during which the timing of segment formation is set by a ‘segmentation clock’, in which oscillating gene expression is synchronized across a population of cells by Delta-Notch signaling. Delta-Notch signaling requires local cell-cell contact, but in the zebrafish embryonic tailbud, oscillating cells move rapidly, exchanging neighbors. Previous theoretical studies proposed that this relative movement or cell mixing might alter signaling and thereby enhance synchronization. However, it remains unclear whether the mixing timescale in the tissue is in the right range for this effect, because a framework to reliably measure the mixing timescale and compare it with signaling timescale is lacking. Here, we develop such a framework using a quantitative description of cell mixing without the need for an external reference frame and constructing a physical model of cell movement based on the data. Numerical simulations show that mixing with experimentally observed statistics enhances synchronization of coupled phase oscillators, suggesting that mixing in the tailbud is fast enough to affect the coherence of rhythmic gene expression. Our approach will find general application in analyzing the relative movements of communicating cells during development and disease.Fil: Uriu, Koichiro. Kanazawa University; JapónFil: Bhavna, Rajasekaran. Max Planck Institute of Molecular Cell Biology and Genetics; Alemania. Max Planck Institute for the Physics of Complex Systems; AlemaniaFil: Oates, Andrew C.. Francis Crick Institute; Reino Unido. University College London; Reino UnidoFil: Morelli, Luis Guillermo. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Parque Centenario. Instituto de Investigación en Biomedicina de Buenos Aires - Instituto Partner de la Sociedad Max Planck; Argentina. Max Planck Institute for Molecular Physiology; Alemania. Universidad de Buenos Aires. Facultad de Ciencias Exactas y Naturales. Departamento de Física; Argentin

Understanding the agility of running birds: Sensorimotor and mechanical factors in avian bipedal locomotion

Birds are a diverse and agile lineage of vertebrates that all use bipedal locomotion for at least part of their life. Thus birds provide a valuable opportunity to investigate how biomechanics and sensorimotor control are integrated for agile bipedal locomotion. This review summarizes recent work using terrain perturbations to reveal neuromechanical control strategies used by ground birds to achieve robust, stable and agile running. Early experiments in running guinea fowl aimed to reveal the immediate intrinsic mechanical response to an unexpected drop ('pothole') in terrain. When navigating the pothole, guinea fowl experience large changes in leg posture in the perturbed step, which correlates strongly with leg loading and perturbation recovery. Analysis of simple theoretical models of running has further confirmed the crucial role of swing-leg trajectory control for regulating foot contact timing and leg loading in uneven terrain. Coupling between body and leg dynamics results in an inherent trade-off in swing leg retraction rate for fall avoidance versus injury avoidance. Fast leg retraction minimizes injury risk, but slow leg retraction minimizes fall risk. Subsequent experiments have investigated how birds optimize their control strategies depending on the type of perturbation (pothole, step, obstacle), visibility of terrain, and with ample practice negotiating terrain features. Birds use several control strategies consistently across terrain contexts: 1) independent control of leg angular cycling and leg length actuation, which facilitates dynamic stability through simple control mechanisms, 2) feedforward regulation of leg cycling rate, which tunes foot-contact timing to maintain consistent leg loading in uneven terrain (minimizing fall and injury risks), 3) load-dependent muscle actuation, which rapidly adjusts stance push-off and stabilizes body mechanical energy, and 4) multi-step recovery strategies that allow body dynamics to transiently vary while tightly regulating leg loading to minimize risks of fall and injury. In future work, it will be interesting to investigate the learning and adaptation processes that allow animals to adjust neuromechanical control mechanisms over short and long timescales