Journal of Telecommunications and Information Technology, 2004, nr 1

kwartalni

Deuterium in the gate dielectric of CMOS devices

Most of the electronic integrated circuits used today are Complementary MOS (CMOS) circuits, which consist mainly of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). In the last forty years there has been a tremendous reduction of the MOSFET dimensions.\ud This reduction will continue, enabling even faster and more complex integrated circuits. But, there are a number of hurdles on the road. One of these hurdles is the thickness reduction of an essential electrically isolating layer inside the MOSFET, the so-called gate dielectric. This gate dielectric is becoming so thin, it starts to leak electrical current under operating conditions. This increases the power consumption and can lead to a non-functional transistor. Reliability is also of concern, because the gate dielectric deteriorates under device operation, leading to even larger leakage currents.\u

Techniques for Aging, Soft Errors and Temperature to Increase the Reliability of Embedded On-Chip Systems

This thesis investigates the challenge of providing an abstracted, yet sufficiently accurate reliability estimation for embedded on-chip systems. In addition, it also proposes new techniques to increase the reliability of register files within processors against aging effects and soft errors. It also introduces a novel thermal measurement setup that perspicuously captures the infrared images of modern multi-core processors

Silicon Nanodevices

This book is a collection of scientific articles which brings research in Si nanodevices, device processing, and materials. The content is oriented to optoelectronics with a core in electronics and photonics. The issue of current technology developments in the nanodevices towards 3D integration and an emerging of the electronics and photonics as an ultimate goal in nanotechnology in the future is presented. The book contains a few review articles to update the knowledge in Si-based devices and followed by processing of advanced nano-scale transistors. Furthermore, material growth and manufacturing of several types of devices are presented. The subjects are carefully chosen to critically cover the scientific issues for scientists and doctoral students

Electrical Characterisation of III-V Nanowire MOSFETs

The ever increasing demand for faster and more energy-efficient electricalcomputation and communication presents severe challenges for the semiconductor industry and particularly for the metal-oxidesemiconductorfield-effect transistor (MOSFET), which is the workhorse of modern electronics. III-V materials exhibit higher carrier mobilities than the most commonly used MOSFET material Si so that the realisation of III-V MOSFETs can enable higher operation speeds and lower drive voltages than that which is possible in Si electronics. A lowering of the transistor drive voltage can be further facilitated by employing gate-all-around nanowire geometries or novel operation principles. However, III-V materials bring about their own challenges related to material quality and to the quality of the gate oxide on top of a III-V MOSFET channel.This thesis presents detailed electrical characterisations of two types of (vertical) III-V nanowire transistors: MOSFETs based on conventional thermionic emission; and Tunnel FETs, which utilise quantum-mechanical tunnelling instead to control the device current and reach inverse subthreshold slopes below the thermal limit of 60 mV/decade. Transistor characterisations span over fourteen orders of magnitude in frequency/time constants and temperatures from 11 K to 370 K.The first part of the thesis focusses on the characterisation of electrically active material defects (‘traps’) related to the gate stack. Low-frequency noise measurements yielded border trap densities of 10^18 to 10^20 cm^-3 eV^-1 and hysteresis measurements yielded effective trap densities – projected to theoxide/semiconductor interface – of 2x10^12 to 3x10^13 cm^-2 eV^-1. Random telegraph noise measurements revealed that individual oxide traps can locally shift the channel energy bands by a few millielectronvolts and that such defects can be located at energies from inside the semiconductor band gap all the way into the conduction band.Small-signal radio frequency (RF) measurements revealed that parts of the wide oxide trap distribution can still interact with carriers in the MOSFET channel at gigahertz frequencies. This causes frequency hystereses in the small-signal transconductance and capacitances and can decrease the RF gains by a few decibels. A comprehensive small-signal model was developed, which takes into account these dispersions, and the model was applied to guide improvements of the physical structure of vertical RF MOSFETs. This resulted in values for the cutoff frequency fT and the maximum oscillation frequency fmax of about 150 GHz in vertical III-V nanowire MOSFETs.Bias temperature instability measurements and the integration of (lateral) III-V nanowire MOSFETs in a back end of line process were carried out as complements to the main focus of this thesis. The results of this thesis provide a broad perspective of the properties of gate oxide traps and of the RF performance of III-V nanowire transistors and can act as guidelines for further improvement and finally the integration of III-V nanowire MOSFETs in circuits

Journal of Telecommunications and Information Technology, 2000, nr 3,4

kwartalni

Physics and Technology of Silicon Carbide Devices

Recently, some SiC power devices such as Schottky-barrier diodes (SBDs), metal-oxide-semiconductor field-effect-transistors (MOSFETs), junction FETs (JFETs), and their integrated modules have come onto the market. However, to stably supply them and reduce their cost, further improvements for material characterizations and those for device processing are still necessary. This book abundantly describes recent technologies on manufacturing, processing, characterization, modeling, and so on for SiC devices. In particular, for explanation of technologies, I was always careful to argue physics underlying the technologies as much as possible. If this book could be a little helpful to progress of SiC devices, it will be my unexpected happiness

Development and optimization of silicon based light sources for integration into a sensor platform

[spa] Aquesta tesi presenta un estudi de les propietats òptiques de capes d'òxid de silici enriquit en silici (SRO) i nitrur de silici enriquit en silici (SRN) que han sofert un procés tèrmic d'alta temperatura. Aquest procés indueix la creació de nanoaglomerats de silici en la matriu dielèctrica. Aquestes nanoestructures de silici presenten una superior eficiència en l'emissió respecte al silici en bloc, i a més a més emeten en el visible en comptes de l'infraroig. Això és interessant per a l'obtenció de dispositius fotònics integrats basats en silici que poden ser fabricats monolíticament en un procés compatible amb la tecnologia CMOS que domina la indústria microelectrònica. A més a més, hem estudiat les propietats òptiques i elèctriques de dispositius metall-aïllant-semiconductor en les quals l'aïllant és una capa d'SRO o SRN amb nanoaglomerats de silici. N'hem mesurat paràmetres d'interès com ara l'eficiència de conversió d'energia elèctrica-òptica o la potència òptica, i n'hem estudiat els mecanismes d'injecció que hi tenen lloc. S'han identificat tres tipus diferents d'emissió: per punts, per la vora del dispositiu, i emissió homogènia, i hem determinat que l'emissió homogènia és la més adecuada pel que fa a l'eficiència dels dispositius. Hem desenvolupat un programa que permet el càlcul de les interferències òptiques que tenen lloc als sistemes multicapa que conformen els dispositius estudiats, i que distorsionen l'espectre observat respecte al que les capes realment emeten. L'habilitat de poder calcular aquests efectes ens permet, en molts casos, eliminar l'efecte de les interferències i determinar l'autèntic espectre d'emissió de les capes i per tant estar en millors condicions d'assignar l'emissió als mecanismes correctes. Finalment, hem proposat un prototip per a un transceptor en el qual l'emissor, la guia d'ones i el detector estan integrats monolíticament en un procés CMOS. Hem fabricat el dispositiu i l'hem caracteritzat. Tot i que no hem aconseguit acoblament òptic entre l'emissor i el detector, creiem que el disseny bàsic queda validat, ja que els principals obstacles en l'obtenció del dispositiu han sigut superats amb èxit.[eng] We have characterized electroluminescent devices based on silicon rich oxide and/or silicon rich nitride. We have discussed the photoluminescence and structural characterization of the active layers and the electrical and electroluminescent characterization of full devices. We have noted that the electroluminescence can appear in the form of discrete points scattered across the active area of the devices, in the form of emission along the rim of the active area, or homogeneously distributed across the area. These different kinds of emission have been related to the optical and electrical properties of the devices. In the two former cases, the electroluminescence comes with high current densities,of the order of 1 A/cm2, and low efficiencies of the order of 10-8. On the other hand, the homogeneous emission comes with lower current densities, of the order of 0.01 A/cm2, and better efficiencies, in the range 10-7–10-5. We have concluded that the homogeneous emission is optimal in terms of efficiency. Furthermore, a simple model has been proposed to explain the appearance and occasional coexistence of the different kinds of emission. The effect of a nitride layer on top of the SRO has been explored, concluding that it helps in achieving a uniform conduction that favors the homogeneous emission in the active layer. The conductivity states of the active layer associated with the different kinds of emission have been related with its CV behavior. The results of the study show that the homogeneous emission corresponds to well behaved CV curves, whereas the emission through points does not. The injection mechanisms in PECVD and ion implanted samples have been studied, concluding that no single emission mechanism can account for the injection at all regimes in the studied range of electric fields. Fowler-Nordheim or trap assisted tunneling have been found to play a significant role in PECVD samples. In implanted samples, Fowler-Nordheim dominates at low fields, whereas Poole-Frenkel is more likely to be the dominant mechanism at higher fields. Comparison of the photoluminescence and electroluminescence spectra of bilayers SRO/SRN, allows us to conclude that each layer contributes a different band in the total emission, which results in a wider distribution of the energy across the visible spectrum. The comparison between the photoluminescence and electroluminescence has revealed massive differences in their spectra, which have been attributed to interference effects. A computer software based in the Crawford method for the study of the interference effects in multilayer stacks has been presented. The program has been used to quantitatively study the interference effects in the emission of our devices. We can conclude that the photoluminescence and electroluminescence spectra are the same despite their apparent difference. Our analysis has also made it apparent that a quantitative understanding of the interference effects in the system is important in order to draw valid conclusions regarding the origins of the luminescence. We have presented the design, fabrication and characterization of a CMOS compatible optical transceiver, and two main challenges in the integration of the emitter, waveguide and detector have been successfully overcome, namely achieving a reasonably flat and uniform silicon oxide trench and a good detector. In the end, the transceiver has not worked as expected, most likely due to a poor SRN emitter. More work is required in order to better control the fabrication process of the SRN layers. However, we believe the basic design to be valid, given the low electrical coupling detected between the emitter and the detector components of the transceiver

Synthesis of silicon nanocrystal memories by sputter deposition

In Silizium-Nanokristall-Speichern werden im Gate-Oxid eines Feldeffekttransistors eingebettete Silizium Nanokristalle genutzt, um Elektronen lokal zu speichern. Die gespeicherte Ladung bestimmt dann den Zustand der Speicherzelle. Ein wichtiger Aspekt in der Technologie dieser Speicher ist die Erzeugung der Nanokristalle mit einerwohldefinierten Größenverteilung und einem bestimmten Konzentrationsprofil im Gate-Oxid. In der vorliegenden Arbeit wurde dazu ein sehr flexibler Ansatz untersucht: die thermische Ausheilung von SiO2/SiOx (x < 2) Stapelschichten. Es wurde ein Sputterverfahren entwickelt, das die Abscheidung von SiO2 und SiOx Schichten beliebiger Zusammensetzung erlaubt. Die Bildung der Nanokristalle wurde in Abhängigkeit vom Ausheilregime und der SiOx Zusammensetzung charakterisiert, wobei unter anderem Methoden wie Photolumineszenz, Infrarot-Absorption, spektroskopische Ellipsometrie und Elektronenmikroskopie eingesetzt wurden. Anhand von MOS-Kondensatoren wurden die elektrischen Eigenschaften derart hergestellter Speicherzellen untersucht. Die Funktionalität der durch Sputterverfahren hergestellten Nanokristall-Speicher wurde erfolgreich nachgewiesen.In silicon nanocrystal memories, electronic charge is discretely stored in isolated silicon nanocrystals embedded in the gate oxide of a field effect transistor. The stored charge determines the state of the memory cell. One important aspect in the technology of silicon nanocrystal memories is the formation of nanocrystals near the SiO2-Si interface, since both, the size distribution and the depth profile of the area density of nanocrystals must be controlled. This work has focussed on the formation of gate oxide stacks with embedded nanocrystals using a very flexible approach: the thermal annealing of SiO2/SiOx (x < 2) stacks. A sputter deposition method allowing to deposit SiO2 and SiOx films of arbitrary composition has been developed and optimized. The formation of Si NC during thermal annealing of SiOX has been investigated experimentally as a function of SiOx composition and annealing regime using techniques such as photoluminescence, infrared absorption, spectral ellipsometry, and electron microscopy. To proof the concept, silicon nanocrystal memory capacitors have been prepared and characterized. The functionality of silicon nanocrystal memory devices based on sputtered gate oxide stacks has been successfully demonstrated