The 2018 GaN Power Electronics Roadmap

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

AlGaN/GaN 전력소자의 특성 향상을 위한 식각과 절연막에 관한 연구

학위논문 (박사) -- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2020. 8. 서광석.최근 에너지 위기와 환경규제 강화, 친환경 녹색성장 등의 이슈가 대두되어 에너지 절감과 환경 보호 분야에 IT 기술을 접목, 활용하는 그린 IT 패러다임이 부각되고 있다. 현재 고유가 환경규제 강화에 대응하기 위해 하이브리드 자동차, 전기자동차 등 친환경 미래형 자동차 개발이 요구되고 있으며, 자동차에서 전장부품이 차지하는 원가비중은 약 40%까지 달할 것으로 전망되고 이 중 반도체가 차지하는 비용은 약 30% 정도로 추정된다. 이러한 자동차 전장부품에서 전력소자가 핵심부품으로 자리 잡을 전망이다. 지금까지는 실리콘 기반의 전력소자 기술이 전력반도체 시장의 대부분을 주도하고 있지만 전력기기 로드맵에 의하면 전력밀도가 해를 거듭하면서 지속적으로 증가하기 때문에 내열, 내압, 전력손실, 전력밀도 등에서 나타나는 많은 한계를 가지고 있는 현재의 실리콘 기반 전력시스템은 효율이 눈에 띄게 감소할 것이 자명하므로 전력시스템의 전력전송효율과 신뢰성의 중요성이 크게 대두되고 있다. 이 같은 사회적 요구로 볼 때 현재의 실리콘 전력소자의 기술적 한계를 뛰어넘는 고효율의 차세대 전력반도체 소자의 개발이 시급히 요구되며 SiC와 GaN와 같은 광대역 반도체가 차세대 전력반도체 소재로 유력해지고 있다. 또한 전력시스템에서는 시스템의 안전성과 회로의 간략화를 위하여 normally-off (증강형) 전력소자가 요구되기 때문에 normally-off (증강형) GaN 전력소자에 대한 개발이 필수적이다. 본 그룹에서는 gate-recess 공정을 이용하여 normally-off 동작을 실현하는 연구를 진행하였고, gate-recess 시 발생하는 식각 데미지를 줄이고 우수한 성능의 게이트 절연막을 개발하여 GaN 전력 반도체 소자의 전기적 특성 및 신뢰성을 개선하는 연구를 진행하였다. 식각 연구에서는 최종적으로 셀프 DC 바이어스가 낮은 O2, BCl3 플라즈마를 이용한 atomic layer etching을 개발하였고, 이를 통해 거칠기가 작고 표면 N vacancy가 적은 고품질의 (Al)GaN 표면을 얻을 수 있었다. 박막 연구에서는 Oxide 박막 증착 시, (Al)GaN 표면에 생성되어 계면 특성을 악화시키는 Ga2O3 생성을 막기위해 ALD AlN layer를 개발 및 적용하여 박막/(Al)GaN 계면 특성을 향상시켰다. 이로 인해 소자의 동작전류 증가 및 Dit 감소 결과를 얻을 수 있었고 스트레스에 따른 문턱전압 이동 특성의 감소로 소자의 신뢰성 또한 개선시킬 수 있었다. 이는 타 기관의 결과와 비교해도 뒤떨어지지 않는 우수한 특성을 보여주었다. 결론적으로 본 연구의 작은 플라즈마 데미지를 갖는 식각공정과 고품질 절연막 개발을 통해 우수한 특성의 GaN 전력소자를 구현할 수 있었고 향후 차세대 전력소자에 적용을 위한 가능성을 확보하였다.The Si technology for power devices have already approached its theoretical limitations due to its physical and material properties, despite the considerable efforts such as super junction MOSFET, trench gate, and insulated gate bipolar transistors. To overcome these limitations, many kinds of compound materials such as GaN, GaAs, SiC, Diamond and InP which have larger breakdown voltage and high electron velocity than Si also have been studied as future power devices. GaN has been considered as a breakthrough in power applications due to its high critical electric field, high saturation velocity and high electron mobility compared to Si, GaAs, and SiC. Especially, AlGaN/GaN heterostructure field-effect transistors (HFETs) have been considered as promising candidates for high power and high voltage applications. However, these AlGaN/GaN heterostructure field-effect transistors with the 2DEG are naturally normally-on, which makes the devices difficult to deplete the channel at zero gate bias. Among the various methods for normally-off operation of GaN devices, gate-recess method is a promising method because it can be easier to implement than other approaches and ensure normally-off operation. However, charge trapping at the interface between gate dielectric and (Al)GaN and in the gate dielectric is a big issue for recessed gate MIS-HEMTs. This problem leads to degradation of channel mobility, on-resistance and on-current of the devices. Especially, Vth hysteresis after a positive gate voltage sweep and Vth shift under a gate bias stress are important reliability challenges in gate recessed MIS-HEMTs. The scope of this work is mainly oriented to achieve high quality interface at dielectric/(Al)GaN MIS by studying low damage etching methods and the ALD process of various dielectric layers. In the etching study, various etching methods for normally-off operation have been studied. Also, etching damage was evaluated by various methods such as atomic force microscopy (AFM), photoluminescence (PL) measurements, X-ray photoelectron spectroscopy (XPS) measurements and electrical properties of the recessed schottky devices. Among the etching methods, the ALE shows the smoothest etched surface, the highest PL intensity and N/(Al+Ga) ratio of the etched AlGaN surface and the lowest leakage current of the gate recessed schottky devices. It is suggested that the ALE is a promising etching technique for normally-off gate recessed AlGaN/GaN MIS-FETs. In the study of dielectrics, excellent electrical characteristics and small threshold volt¬age drift under positive gate bias stress are achieved by employing the SiON interfacial layer. However, considerable threshold voltage drift is observed under the higher positive gate bias stress even at the devices using the SiON interfacial layer. For further improvement of interface and reliability of devices, we develop and optimize an ALD AlN as an interfacial layer to avoid the formation of poor-quality oxide at the dielectric/(Al)GaN interface. We also develop an ALD AlHfON as a bulk layer, which have a high dielectric constant and low leakage current and high breakdown field characteristics. Devices with AlN/AlON/AlHfON layer show smaller I-V hysteresis of ~10 mV than that of devices with AlON/AlHfON layer. The extracted static Ron values of devices with AlN/AlON/AlHfON and AlON/AlHfON are 1.35 and 1.69 mΩ·cm2, respectively. Besides, the effective mobility, Dit and threshold voltage instability characteristics are all improved by employing the ALD AlN. In conclusion, for high performance and improvement of reliability of normally-off AlGaN/GaN MIS-FETs, this thesis presents an etching technique for low damage etching and high-quality gate dielectric layer and suggests that the ALE and ALD AlN/AlON/AlHfON gate dielectric are very promising for the future normally-off AlGaN/GaN MIS-FETsChapter 1. Introduction 1 1.1. Backgrounds 1 1.2. Normally-off Operation in AlGaN/GaN HFETs 3 1.3. Issues and Feasible Strategies in AlGaN/GaN MIS-HFETs 11 1.4. Research Aims 15 1.5. References 17 Chapter 2. Development and Evaluation of Low Damage Etching processes 22 2.1. Introduction 22 2.2. Various Evaluation Methods of Etching Damage 24 2.3. Low-Damage Dry Etching Methods 29 2.3.1. Inductively Coupled Plasma-Reactive Ion Etching Using BCl3/Cl2 Gas Mixture 29 2.3.2. Digital Etching Using Plasma Asher and HCl 34 2.3.3. Atomic Layer Etching Using Inductively Coupled Plasma–Reactive Ion Etching System (ICP-RIE) 50 2.4. Conclusion 75 2.5. References 76 Chapter 3. SiON/HfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 80 3.1. Introduction 80 3.2. ALD Processes for SiON and HfON 83 3.3. Electrical Characteristics of ALD SiON, HfON and SiON/HfON Dual Layer on n-GaN 87 3.4. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with SiON/HfON Dual Layer 95 3.5. Conclusion 113 3.6. References 114 Chapter 4. High Quality AlN/AlON/AlHfON Gate Dielectric Layer by ALD for AlGaN/GaN MIS-FETs 120 4.1. Introduction 120 4.2. Development of ALD AlN/AlON/AlHfON Gate Stack 122 4.2.1. Process Optimization for ALD AlN 122 4.2.2. ALD AlN as an Interfacial Layer 144 4.2.3. Thickness Optimization of AlN/AlON/ AlHfON Layer 149 4.2.4. ALD AlHfON Optimization 159 4.2.5. Material Characteristics of AlN/AlON/AlHfON Layer 167 4.3. Device Characteristics of Normally-off AlGaN/GaN MIS-FETs with AlN/AlON/AlHfON Layer 171 4.4. Conclusion 182 4.5. References 183 Chapter 5. Concluding Remarks 188 Appendix. 190 A. N2 Plasma Treatment Before Dielectric Deposition 190 B. Tri-gate Normally-on/off AlGaN/GaN MIS-FETs 200 C. AlGaN/GaN Diode with MIS-gated Hybrid Anode and Edge termination 214 Abstract in Korean 219 Research Achievements 221Docto

Characterization Methodology, Modeling, and Converter Design for 600 V Enhancement-Mode GaN FETs

Gallium Nitride (GaN) power devices are an emerging technology that have only become available commercially in the past few years. This new technology enables the design of converters at higher frequencies and efficiencies than those achievable with conventional Si devices. This dissertation reviews the unique characteristics, commercial status, and design challenges that surround GaN FETs, in order to provide sufficient background to potential GaN-based converter designers.Methodology for experimentally characterizing a GaN FET was also presented, including static characterization with a curve tracer and impedance analyzer, as well as dynamic characterization in a double pulse test setup. This methodology was supplemented by additional tests to determine losses caused by Miller-induced cross talk, and the tradeoff between these losses and overlap losses was studied for one example device.Based on analysis of characterization results, a simplified model was developed to describe the overall switching behavior and some unique features of the device. The impact of the Miller effect during the turn-on transient was studied, as well as the dynamic performance of GaN at elevated temperature.Furthermore, solutions were proposed for several key design challenges in GaN-based converters. First, a driver-integrated overcurrent and short-circuit protection scheme was developed, based on the relationship between gate voltage and drain current in GaN gate injection transistors. Second, the limitations on maximum utilization of current and voltage in a GaN FET were studied, particularly the voltage overshoots following turn-on and turn-off switching transients, and the effective cooling of GaN FETs in higher power operation. A thermal design was developed for heat extraction from bottom-cooled surface-mount devices. These solutions were verified in a GaN-based full-bridge single-phase inverter

The 2018 GaN power electronics roadmap

GaN is a compound semiconductor that has a tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

The 2018 GaN power electronics roadmap

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

AlN/GaN MOS-HEMTs technology

The ever increasing demand for higher power devices at higher frequencies has prompted much research recently into the aluminium nitride/gallium nitride high electron mobility transistors (AlN/GaN HEMTs) in response to theoretical predictions of higher performance devices. Despite having superior material properties such as higher two-dimensional electron gas (2DEG) densities and larger breakdown field as compared to the conventional aluminium gallium nitride (AlGaN)/GaN HEMTs, the AlN/GaN devices suffer from surface sensitivity, high leakage currents and high Ohmic contact resistances. Having very thin AlN barrier layer of ∼ 3 nm makes the epilayers very sensitive to liquids coming in contact with the surface. Exposure to any chemical solutions during device processing degrades the surface properties, resulting in poor device performance. To overcome the problems, a protective layer is employed during fabrication of AlN/GaN-based devices. However, in the presence of the protective/passivation layers, formation of low Ohmic resistance source and drain contact becomes even more difficult. In this work, thermally grown aluminium oxide (Al2O3) was used as a gate di- electric and surface passivation for AlN/GaN metal-oxide-semiconductor (MOS)-HEMTs. Most importantly, the Al2O3 acts as a protection layer during device processing. The developed technique allows for a simple and effective wet etching optimisation using 16H3PO4:HNO3:2H2O solution to remove Al from the Ohmic contact regions prior to the formation of Al2O3 and Ohmic metallisation. Low Ohmic contact resistance (0.76Ω.mm) as well as low sheet resistance (318Ω/square) were obtained after optimisation. Significant reduction in the gate leakage currents was observed when employing an additional layer of thermally grown Al2O3 on the mesa sidewalls, particularly in the region where the gate metallisation overlaps with the exposed channel edge. A high peak current ∼1.5 A/mm at VGS=+3 V and a current-gain cutoff frequency, fT , and maximum oscillation frequency, fMAX , of 50 GHz and 40 GHz, respectively, were obtained for a device with 0.2 μm gate length and 100 μm gate width. The measured breakdown voltage, VBR, of a two-finger MOS-HEMT with 0.5μm gate length and 100 μm gate width was 58 V. Additionally, an approach based on an accurate estimate of all the small-signal equivalent circuit elements followed by optimisation of these to get the actual element values was also developed for AlN/GaN MOS-HEMTs. The extracted element values provide feedback for further device process optimisation. The achieved results indicate the suitability of thermally grown Al2O3 for AlN/GaN-based MOS-HEMT technology for future high frequency power applications

Wide Bandgap Based Devices: Design, Fabrication and Applications, Volume II

Wide bandgap (WBG) semiconductors are becoming a key enabling technology for several strategic fields, including power electronics, illumination, and sensors. This reprint collects the 23 papers covering the full spectrum of the above applications and providing contributions from the on-going research at different levels, from materials to devices and from circuits to systems

SiC MOSFET and GaN FET in high voltage switching applications

For several decades, silicon-based semiconductor devices, such as Si MOSFETs have been the main choice for switching applications. However, their level of performance is approaching its maximum potential, and further development becomes increasingly challenging. As a result, semiconductor manufacturers and the electronics industry are exploring new technologies to meet current requirements. One promising option is the use of WBG (Wide Band Gap) devices, such as GaN FETs and SiC MOSFETs, which have gained attention due to their superior performance characteristics. Compared to traditional Si transistors, WBG devices can withstand higher voltages and tem-peratures, are faster, can be packed in smaller sizes, and are more efficient. This study aims to serve as a guide for designers seeking information on the technology and usage of WBG transistors, particularly in high voltage switching applications. The study in-cludes an examination of the structures of SiC MOSFETs and GaN FETs, as well as their most important electrical characteristics. Additionally, the efficiency of an LCC converter was measured to compare the performance of various FET types, with a specific interest in the use of WBG devices in soft switching applications. Scientific articles, application notes, and datasheets were investigated to provide a thorough understanding of the theory behind SiC MOSFETs and GaN FETs. According to resources, the primary SiC MOSFET and GaN FET technologies suitable for high voltage switching are planar SiC MOSFET, trench SiC MOSFET, p-GaN FET and GaN/Si cascode transistor. These devices are currently available with breakdown voltages of 1700 V (planar SiC MOSFET), 2000 V (trench SiC MOSFET), 650 V (p-GaN FET) and 900 V (GaN/Si cascode transistor). The efficiency of an LCC converter with a maximum output power of 40 W was measured using 1500 V Si MOSFET, 1700 V planar SiC MOSFET, 1700 V trench SiC MOSFET, and 900 V GaN/Si cascode transistor. A constant load of 1 A was used, and the input voltage was incre-mentally increased from 300 V to 900 V in 100 V steps. According to results, using planar and trench SiC MOSFETs, LCC converter had the highest efficiency, reaching up to 89,6 % while Si MOSFET exhibited slightly lower efficiency, which was 87,7 % at its best. GaN/Si cascode tran-sistors showed comparable efficiency to SiC MOSFETs at lower input voltages but fell signifi-cantly behind as the voltage increased, having eventually much worse efficiency than Si MOSFET.Useiden vuosikymmenien ajan pii-pohjaiset puolijohteet, kuten pii MOSFETit, ovat olleet pääasiallinen teknologia katkojasovelluksissa. Niiden suorituskyky lähestyy kuitenkin ylärajaa, ja niiden kehittäminen käy yhä vaikeammaksi. Tämän vuoksi puolijohdevalmistajat ja elektroniikkateollisuus etsivät uusia teknologioita täyttää nykyiset vaatimukset. Yksi lupaava teknologia ovat laajan energiavyön puolijohteet, kuten galliumnitridi FETit ja piikarbidi MOSFETit. Viime vuosina ne ovat herättäneet paljon huomiota niiden ylivoimaisten ominaisuuksien vuoksi. Verrattuna perinteisiin pii MOSFETeihin, laajan energiavyön transistorit kestävät suurempia jännitteitä ja lämpötiloja, ovat nopeampia ja ne voidaan pakata pienempään kokoon. Lisäksi ne ovat tehokkaampia. Tämä diplomityö pyrkii toimimaan oppaana elektroniikkasuunnittelijoille, jotka etsivät tietoa laajan energiavyön transistoreista ja niiden käytöstä erityisesti suurjännitekatkojasovelluksissa.Työssä tarkastellaan piikarbidi MOSFETien ja galliumnitridi FETien rakenteita sekä niiden tärkeimpiä sähköisiä ominaisuuksia. Lisäksi mitattiin kelaan ja kahteen kondensaattoriin perustuvan LCC resonanssiteholähteen hyötysuhde eri FET-tyypeillä, koska haluttiin saada tietoa laajan energiavyön transistorien käytöstä pehmeässä jännitteen katkonnassa. Tiedon keräämiseksi tutkittiin tieteellisiä artikkeleita, sovellusohjeita ja datalehtiä. Lähdeaineiston perusteella pääasialliset piikarbidi MOSFETien ja galliumnitridi FETien teknologiat suurjännitesovellusten alueella ovat planaarinen piikarbidi MOSFET, erityiseen kaivanto teknologiaan (trench) perustuva piikarbidi MOSFET, p-tyypin galliumnitridi FET ja galliumnitridi/pii kaskadi transistori. Tällä hetkellä näitä teknologioita on kaupallisesti saatavilla enimmillään 1700 V (planaarinen piikarbidi MOSFET), 2000 V (kaivanto piikarbidi MOSFET), 650 V (p-tyypin galliumnitridi FET) ja 900 V (galliumnitridi/pii kaskadi transistori) jännitteillä. Nimellisteholtaan 40 W LCC resonanssi teholähteen hyötysuhde mitattiin 1500 V pii MOSFETeilla, 1700 V planaarisilla piikarbidi MOSFETeilla, 1700 V kaivanto piikarbidi MOSFETeilla ja 900 V gallium-nitridi/pii kaskadi transistoreilla. Kuormana käytettiin 1 A vakiokuormaa ja tulojännitettä nostettiin asteittain 300 voltista 900 voltiin 100 voltin nostoin. Tulosten mukaan paras hyötysuhde oli 89,6 %, joka mitattiin planaarisella piikarbidi MOSFETilla ja kaivanto piikarbidi MOSFETilla. Pii MOSFETien tapauksessa hyötysuhde oli hieman huonompi, ollen parhaimmillaan 87,7 %. Alhaisilla jännitteillä galliumnitridi/pii kaskadi transistorien hyötysuhde oli verrattavissa piikarbidi MOSFETeihin, mutta hyötysuhde laski jännitettä nostettaessa, ollen lopulta merkittävästi huonompi kuin pii MOSFETeilla