10 research outputs found

    Framework of Real-Time Optical Nyquist-WDM Receiver using Matlab & Simulink

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    I investigate an optical Nyquist-WDM Bit Error Rate (BER) detection system. A transmitter and receiver system is simulated, using Matlab and Simulink, to form a working algorithm and to study the effects of the different processes of the data chain. The inherent lack of phase information in the N-WDM scheme presents unique challenges and requires a precise phase recovery system to accurately decode a message. Furthermore, resource constraints are applied by a cost-effective Field Programmable Gate Array (FPGA). To compensate for the speed, gate, and memory constraints of a budget FPGA, several techniques are employed to design the best possible receiver. I study the resource intensive operations and vary their resource utilization to discover the effect on the BER. To conclude, a full VHDL design is delineated, including peripheral initialization, input data sorting and storage, timing synchronization, state machine and control signal implementation, N-WDM demodulation, phase recovery, QAM decoding, and BER calculation

    128-channel high-linearity resolution- adjustable time-to-digital converters for LiDAR applications : software predictions and hardware implementations

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    This paper proposes a new calibration method, called the mixed-binning (MB) method, to pursue high-linearity time-to-digital converters (TDCs) for light detection and ranging (LiDAR) applications. The proposed TDCs were developed using tapped delay-line (TDL) cells in field-programmable gate arrays (FPGAs). With the MB method, we implemented a resolution-adjustable TDC showing excellent linearity in Xilinx UltraScale FPGAs. We demonstrate a 128-channel TDC to show that the proposed method is cost-effective in logic resources. We also developed a software tool to predict the performances of TDL-based TDCs robustly. Results from both software analysis and hardware implementations are in a good agreement and show that the proposed design has great potential for multichannel applications; the averaged DNL_(pk-pk) and INL_(pk-pk) are close to or even less than 0.05 LSB in multichannel designs

    Strategies towards high performance (high-resolution/linearity) time-to-digital converters on field-programmable gate arrays

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    Time-correlated single-photon counting (TCSPC) technology has become popular in scientific research and industrial applications, such as high-energy physics, bio-sensing, non-invasion health monitoring, and 3D imaging. Because of the increasing demand for high-precision time measurements, time-to-digital converters (TDCs) have attracted attention since the 1970s. As a fully digital solution, TDCs are portable and have great potential for multichannel applications compared to bulky and expensive time-to-amplitude converters (TACs). A TDC can be implemented in ASIC and FPGA devices. Due to the low cost, flexibility, and short development cycle, FPGA-TDCs have become promising. Starting with a literature review, three original FPGA-TDCs with outstanding performance are introduced. The first design is the first efficient wave union (WU) based TDC implemented in Xilinx UltraScale (20 nm) FPGAs with a bubble-free sub-TDL structure. Combining with other existing methods, the resolution is further enhanced to 1.23 ps. The second TDC has been designed for LiDAR applications, especially in driver-less vehicles. Using the proposed new calibration method, the resolution is adjustable (50, 80, and 100 ps), and the linearity is exceptionally high (INL pk-pk and INL pk-pk are lower than 0.05 LSB). Meanwhile, a software tool has been open-sourced with a graphic user interface (GUI) to predict TDCs’ performance. In the third TDC, an onboard automatic calibration (AC) function has been realized by exploiting Xilinx ZYNQ SoC architectures. The test results show the robustness of the proposed method. Without the manual calibration, the AC function enables FPGA-TDCs to be applied in commercial products where mass production is required.Time-correlated single-photon counting (TCSPC) technology has become popular in scientific research and industrial applications, such as high-energy physics, bio-sensing, non-invasion health monitoring, and 3D imaging. Because of the increasing demand for high-precision time measurements, time-to-digital converters (TDCs) have attracted attention since the 1970s. As a fully digital solution, TDCs are portable and have great potential for multichannel applications compared to bulky and expensive time-to-amplitude converters (TACs). A TDC can be implemented in ASIC and FPGA devices. Due to the low cost, flexibility, and short development cycle, FPGA-TDCs have become promising. Starting with a literature review, three original FPGA-TDCs with outstanding performance are introduced. The first design is the first efficient wave union (WU) based TDC implemented in Xilinx UltraScale (20 nm) FPGAs with a bubble-free sub-TDL structure. Combining with other existing methods, the resolution is further enhanced to 1.23 ps. The second TDC has been designed for LiDAR applications, especially in driver-less vehicles. Using the proposed new calibration method, the resolution is adjustable (50, 80, and 100 ps), and the linearity is exceptionally high (INL pk-pk and INL pk-pk are lower than 0.05 LSB). Meanwhile, a software tool has been open-sourced with a graphic user interface (GUI) to predict TDCs’ performance. In the third TDC, an onboard automatic calibration (AC) function has been realized by exploiting Xilinx ZYNQ SoC architectures. The test results show the robustness of the proposed method. Without the manual calibration, the AC function enables FPGA-TDCs to be applied in commercial products where mass production is required

    Development and Characterisation of a Fibre Frequency Reference

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    In this thesis, a passive, all optical fibre frequency reference is developed and characterised. The system uses long armlength difference interferometers to measure fluctuations of laser frequency. The phase readout is handled by digital interferometry (DI), which uses spread-spectrum modulation to extract interference signals from the desired range gate with high dynamic range. The frequency stability of the fibre reference is characterised using a differential measurement between two near-identical interferometers. We achieve a relative stability of 0.1 Hz/rt(Hz) above 70 Hz Fourier frequency, which surpasses previous demonstrations of fibre optic references. Building on prior fibre reference investigations, the new system discussed here is designed around an unbalanced Mach-Zehnder interferometer, removing the impact of first-order Rayleigh backscattering as seen in previous designs. The implementation of DI is modified to enable real-time phase reconstruction instead of at a decimated speed, reducing non-linear errors and improving readout fidelity. The new interferometers are individually enclosed in two updated dual-layer passive isolation chambers. In system characterisation, we provide the first long-term temperature analysis of the isolation chambers. Their individual time constant is modelled and experimentally measured, at 13.2 hrs and 11.4 hrs respectively. The 14% difference between the two chambers is in alignment with the temperature independence observed in a three-reference optical measurement. We also comprehensively survey the laboratory mechanical profile, and identify the driving source for each mechanical feature in the experimental noise floor. In addition to temperature and mechanical stability, noise limitations in other Fourier regimes are also identified and characterised. We adapt the Duan fibre thermal noise model for a long armlength interferometer, and experimentally achieve thermo-mechanical noise limited relative stability between 0.4 - 2 Hz. We also develop the first quantitative model for double Rayleigh scattering (DRS) in a fibre interferometer including effects from DI integration and suppression. The modelled contribution from DRS is shown to be in close agreement with the experimental noise floor above 70 Hz Fourier frequencies. The achieved 0.1 Hz/rt(Hz) frequency stability represents the state-of-the-art performance for fibre references and is comparable with room temperature cavity systems. This makes our system a potential alternative for laser frequency stabilisation at short timescales, particularly in applications where the robustness of fibre systems and their intrinsic optical alignment are important considerations

    Embedded electronic systems driven by run-time reconfigurable hardware

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    Abstract This doctoral thesis addresses the design of embedded electronic systems based on run-time reconfigurable hardware technology –available through SRAM-based FPGA/SoC devices– aimed at contributing to enhance the life quality of the human beings. This work does research on the conception of the system architecture and the reconfiguration engine that provides to the FPGA the capability of dynamic partial reconfiguration in order to synthesize, by means of hardware/software co-design, a given application partitioned in processing tasks which are multiplexed in time and space, optimizing thus its physical implementation –silicon area, processing time, complexity, flexibility, functional density, cost and power consumption– in comparison with other alternatives based on static hardware (MCU, DSP, GPU, ASSP, ASIC, etc.). The design flow of such technology is evaluated through the prototyping of several engineering applications (control systems, mathematical coprocessors, complex image processors, etc.), showing a high enough level of maturity for its exploitation in the industry.Resumen Esta tesis doctoral abarca el diseño de sistemas electrónicos embebidos basados en tecnología hardware dinámicamente reconfigurable –disponible a través de dispositivos lógicos programables SRAM FPGA/SoC– que contribuyan a la mejora de la calidad de vida de la sociedad. Se investiga la arquitectura del sistema y del motor de reconfiguración que proporcione a la FPGA la capacidad de reconfiguración dinámica parcial de sus recursos programables, con objeto de sintetizar, mediante codiseño hardware/software, una determinada aplicación particionada en tareas multiplexadas en tiempo y en espacio, optimizando así su implementación física –área de silicio, tiempo de procesado, complejidad, flexibilidad, densidad funcional, coste y potencia disipada– comparada con otras alternativas basadas en hardware estático (MCU, DSP, GPU, ASSP, ASIC, etc.). Se evalúa el flujo de diseño de dicha tecnología a través del prototipado de varias aplicaciones de ingeniería (sistemas de control, coprocesadores aritméticos, procesadores de imagen, etc.), evidenciando un nivel de madurez viable ya para su explotación en la industria.Resum Aquesta tesi doctoral està orientada al disseny de sistemes electrònics empotrats basats en tecnologia hardware dinàmicament reconfigurable –disponible mitjançant dispositius lògics programables SRAM FPGA/SoC– que contribueixin a la millora de la qualitat de vida de la societat. S’investiga l’arquitectura del sistema i del motor de reconfiguració que proporcioni a la FPGA la capacitat de reconfiguració dinàmica parcial dels seus recursos programables, amb l’objectiu de sintetitzar, mitjançant codisseny hardware/software, una determinada aplicació particionada en tasques multiplexades en temps i en espai, optimizant així la seva implementació física –àrea de silici, temps de processat, complexitat, flexibilitat, densitat funcional, cost i potència dissipada– comparada amb altres alternatives basades en hardware estàtic (MCU, DSP, GPU, ASSP, ASIC, etc.). S’evalúa el fluxe de disseny d’aquesta tecnologia a través del prototipat de varies aplicacions d’enginyeria (sistemes de control, coprocessadors aritmètics, processadors d’imatge, etc.), demostrant un nivell de maduresa viable ja per a la seva explotació a la indústria

    Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

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    With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumption and high energy efficiency have emerged as the two key criteria for embedded microprocessor design. In this thesis we present a range of microarchitectural low-power design techniques which enable the increase of performance for embedded microprocessors and/or the reduction of energy consumption, e.g., through voltage scaling. In the context of cryptographic applications, we explore the effectiveness of instruction set extensions (ISEs) for a range of different cryptographic hash functions (SHA-3 candidates) on a 16-bit microcontroller architecture (PIC24). Specifically, we demonstrate the effectiveness of light-weight ISEs based on lookup table integration and microcoded instructions using finite state machines for operand and address generation. On-node processing in autonomous wireless sensor node devices requires deeply embedded cores with extremely low power consumption. To address this need, we present TamaRISC, a custom-designed ISA with a corresponding ultra-low-power microarchitecture implementation. The TamaRISC architecture is employed in conjunction with an ISE and standard cell memories to design a sub-threshold capable processor system targeted at compressed sensing applications. We furthermore employ TamaRISC in a hybrid SIMD/MIMD multi-core architecture targeted at moderate to high processing requirements (> 1 MOPS). A range of different microarchitectural techniques for efficient memory organization are presented. Specifically, we introduce a configurable data memory mapping technique for private and shared access, as well as instruction broadcast together with synchronized code execution based on checkpointing. We then study an inherent suboptimality due to the worst-case design principle in synchronous circuits, and introduce the concept of dynamic timing margins. We show that dynamic timing margins exist in microprocessor circuits, and that these margins are to a large extent state-dependent and that they are correlated to the sequences of instruction types which are executed within the processor pipeline. To perform this analysis we propose a circuit/processor characterization flow and tool called dynamic timing analysis. Moreover, this flow is employed in order to devise a high-level instruction set simulation environment for impact-evaluation of timing errors on application performance. The presented approach improves the state of the art significantly in terms of simulation accuracy through the use of statistical fault injection. The dynamic timing margins in microprocessors are then systematically exploited for throughput improvements or energy reductions via our proposed instruction-based dynamic clock adjustment (DCA) technique. To this end, we introduce a 6-stage 32-bit microprocessor with cycle-by-cycle DCA. Besides a comprehensive design flow and simulation environment for evaluation of the DCA approach, we additionally present a silicon prototype of a DCA-enabled OpenRISC microarchitecture fabricated in 28 nm FD-SOI CMOS. The test chip includes a suitable clock generation unit which allows for cycle-by-cycle DCA over a wide range with fine granularity at frequencies exceeding 1 GHz. Measurement results of speedups and power reductions are provided

    Longitudinal oxygen imaging in 3D (bio)printed models

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    Electron paramagnetic resonance (EPR), and its molecular imaging modality, is a powerful tool to noninvasively map various biological and chemical markers within objects of interest. Reliable data acquisition is a major impeding factor for longitudinal hands-off measurements. Measurements are especially challenging in biomedical applications, as live objects are not static. Frequent changes occur that require constant fine recalibration of the EPR detection system, called the resonator. To enable longitudinal imaging, a technology permitting automatic digital control of resonator coupling, tuning, and EPR data acquisition was developed. Automation was achieved through the utilization of a microcontroller and digital peripheral components such as digitally controlled capacitors, a digital frequency source, and a printed circuit board resonator. Several applications of this technology have been suggested and tested, including in vivo EPR imaging. The first was to develop a tool for the optimization of light-based 3D printing, for which oxygen plays a major role. Towards this goal, an EPR oxygen-sensitive probe was incorporated into 3D printing resin. Oxygen depletion was measured during the 3D printing process as the polymerization front progressed. After printing, oxygen depletion was again measured during the post-curing process, proposed as a method to optimize post-curing light intensity, temperature, and duration in order to produce quality 3D printed constructs. The second application of longitudinal EPR imaging was directed toward resolving an important problem of oxygen delivery to thick (\u3e1 cm) bioprinted models. Oxygen-sensitive EPR probes (water-soluble trityls or crystalline lithium octa-n-butoxynaphthalocyanine) were introduced into bioinks (liquid hydrogels containing cells, nutrients, and other biological factors) before printing. Bioinks become solid structures after printing due to crosslinking. EPR imaging was demonstrated to measure oxygen consumption by the cells embedded in the bioprints. As expected, an increase of oxygen depletion was observed by introducing a nutrient (pyruvate) to bioink. A numerical MATLAB simulation program was developed to predict rates of oxygen consumption by the cells in the bioprint. The input parameters for the mathematical model include the size and number of cells, the diffusion coefficient of the media, and rates of oxygen transfer through the cell membrane. The software is being further refined and optimized for computational speed. Future efforts will be aimed at improving the speed and scope of EPR automatic digital control, imaging the oxygen depletion process in commercial 3D printers, and applying EPR mapping of oxygen consumption rate to quantify the delivery of oxygen to cells deep inside bioprinted tissue models. Optimizing the delivery of oxygen to cells would overcome the challenge of the limit of diffusion, facilitating the development of larger and more complex bioprinted tissues and organs. These complex tissue and organ models are envisioned for use in drug testing, biomedical research, and, in the distant future, implants in humans

    MIMO OFDM Radar-Communication System with Mutual Interference Cancellation

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    This work describes the OFDM-based MIMO Radar-Communication System, intended for operation in a multiple-user network, especially the automotive sector in the vehicle-to vehicle/infrastructure network. The OFDM signals however are weak towards frequency offsets causing subcarrier misalignment and corrupts the radar estimation and the demodulation of the communication signal. A simple yet effective interference cancellation algorithm is detailed here with real time measurement verification
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