Intra-Cortical Microelectrode Arrays for Neuro-Interfacing

Neuro-engineering is an emerging multi-disciplinary domain which investigates the electrophysiological activities of the nervous system. It provides procedures and techniques to explore, analyze and characterize the functions of the different components comprising the nervous system. Neuro-engineering is not limited to research applications; it is employed in developing unconventional therapeutic techniques for treating different neurological disorders and restoring lost sensory or motor functions. Microelectrodes are principal elements in functional electric stimulation (FES) systems used in electrophysiological procedures. They are used in establishing an interface with the individual neurons or in clusters to record activities and communications, as well as modulate neuron behaviour through stimulation. Microelectrode technologies progressed through several modifications and innovations to improve their functionality and usability. However, conventional electrode technologies are open to further development, and advancement in microelectrodes technology will progressively meliorate the neuro-interfacing and electrotherapeutic techniques. This research introduced design methodology and fabrication processes for intra-cortical microelectrodes capable of befitting a wide range of design requirements and applications. The design process was employed in developing and implementing an ensemble of intra-cortical microelectrodes customized for different neuro-interfacing applications. The proposed designs presented several innovations and novelties. The research addressed practical considerations including assembly and interconnection to external circuitry. The research was concluded by exhibiting the Waterloo Array which is a high channel count flexible 3-D neuro-interfacing array. Finally, the dissertation was concluded by demonstrating the characterization, in vitro and acute in vivo testing results of the Waterloo Array. The implemented electrodes were tested and benchmarked against commercial equivalents and the results manifested improvement in the electrode performance compared to conventional electrodes. Electrode testing and evaluation were conducted in the Krembil Neuroscience Centre Research Lab (Toronto Western Hospital), and the Neurosciences & Mental Health Research Institute (the Sick Kids hospital). The research results and outcomes are currently being employed in developing chronic intra-cortical and electrocorticography (ECoG) electrode arrays for the epilepsy research and rodents nervous system investigations. The introduced electrode technologies will be used to develop customized designs for the clinical research labs collaborating with CIRFE Lab.1 yea

3D modeling and integration of current and future interconnect technologies

Title from PDF of title page viewed June 21, 2021Dissertation advisor: Masud H. ChowdhuryVitaIncludes bibliographical references (pages 133-138)Thesis (Ph.D.)--School of Computing and Engineering and Department of Physics and Astronomy. University of Missouri--Kansas City, 2021To ensure maximum circuit reliability it is very important to estimate the circuit performance and signal integrity in the circuit design phase. A full phase simulation for performance estimation of a large-scale circuit not only require a massive computational resource but also need a lot of time to produce acceptable results. The estimation of performance/signal integrity of sub-nanometer circuits mostly depends on the interconnect capacitance. So, an accurate model for interconnect capacitance can be used in the circuit CAD (computer-aided design) tools for circuit performance estimation before circuit fabrication which reduces the computational resource requirement as well as the time constraints. We propose a new capacitance models for interconnect lines in multilevel interconnect structures by geometrically modeling the electrical flux lines of the interconnect lines. Closed-form equations have been derived analytically for ground and coupling capacitance. First, the capacitance model for a single line is developed, and then the new model is used to derive expressions for the capacitance of a line surrounded by neighboring lines in the same and the adjacent layers above and below. These expressions are simple, and the calculated results are within 10% of Ansys Q3D extracted values. Through silicon via (TSV) is one of the key components of the emerging 3D ICs. However, increasing number of TSVs in smaller silicon area leads to some severe negative impacts on the performance of the 3D IC. Growing signal integrity issues in TSVs is one of the major challenges of 3D integration. In this paper, different materials for the cores of the vias and the interposers are investigated to find the best possible combination that can reduce crosstalk and other losses like return loss and insertion loss in the TSVs. We have explored glass and silicon as interposer materials. The simulation results indicate that glass is the best option as interposer material although silicon interposer has some distinct advantages. For via cores three materials - copper (Cu), tungsten (W) and Cu-W bimetal are considered. From the analysis it can concluded that W would be better for high frequency applications due to lower transmission coefficient. Cu offers higher conductivity, but it has larger thermal expansion coefficient mismatch with silicon. The performance of Cu-W bimetal via would be in between Cu and W. However, W has a thermal expansion coefficient close to silicon. Therefore, bimetal Cu-W based TSV with W as the outer layer would be a suitable option for high frequency 3D IC. Here, we performed the analysis in terms of return loss, transmission coefficient and crosstalk in the vias. Signal speed in current digital systems depends mainly on the delay of interconnects. To overcome this delay problem and keep up with Moore’s law, 3D integrated circuit (vertical integration of multiple dies) with through-silicon via (TSV) has been introduced to ensure much smaller interconnect lengths, and lower delay and power consumption compared to conventional 2D IC technology. Like 2D circuit, the estimation of 3D circuit performance depends on different electrical parameters (capacitance, resistance, inductance) of the TSV. So, accurate modeling of the electrical parameters of the TSV is essential for the design and analysis of 3D ICs. We propose a set of new models to estimate the capacitance, resistance, and inductance of a Cu-filled TSV. The proposed analytical models are derived from the physical shape and the size of the TSV. The modeling approach is comprehensive and includes both the cylindrical and tapered TSVs as well as the bumps. On-chip integration of inductors has always been very challenging. However, for sub- 14nm on-chip applications, large area overhead imposed by the on-chip capacitors and inductors has become a more severe concern. To overcome this issue and ensure power integrity, a novel 3D Through-Silicon-Via (TSV) based inductor design is presented. The proposed TSV based inductor has the potential to achieve both high density and high performance. A new design of a Voltage Controlled Oscillator (VCO) utilizing the TSV based inductor is also presented. The implementation of the VCO is intended to study the feasibility, performance, and real-world application of the proposed TSV based inductor.Introduction -- Background of capacitance modeling of on-chip interconnect -- Accurate modeling of interconnect capacitance in multilevel interconnect structures for sub 22nm technology -- Analysis of different materials and structures for through silicon via and through glass via in 3D integrated circuits -- Impacts of different shapes of through-silicon-via core on 3D IC performance -- Accurate electrical modeling of cu-filled through-silicon-via (TSV) -- Design and characterize TSV based inductor for high frequency voltage-controlled oscillator design -- Conclusion and future wor

Impedance Transformers

Non

Symmetry-Related Electromagnetic Properties of Resonator-Loaded Transmission Lines and Applications

This paper reviews the recent progress in the analysis and applications of the symmetry-related electromagnetic properties of transmission lines loaded with symmetric configurations of resonant elements. It will be shown that the transmission characteristics of these reactively loaded lines can be controlled by the relative orientation between the line and the resonant elements. Two main types of loaded lines are considered: (i) resonance-based structures; and (ii) frequency-splitting structures. In resonance-based transmission lines, a line is loaded with a single resonant (and symmetric) element. For a perfectly symmetric structure, the line is transparent if the line and resonator exhibit symmetry planes of different electromagnetic nature (electric or magnetic wall), whereas the line exhibits a notch (resonance) in the transmission coefficient if the symmetry planes behave as either electric or magnetic walls (symmetric configuration), or if symmetry is broken. In frequency-splitting lines, paired resonators are typically loaded to the transmission line; the structure exhibits a single notch for the symmetric configuration, whereas generally two split notches appear when symmetry is disrupted. Applications of these structures include microwave sensors (e.g., contactless sensors of spatial variables), selective mode suppressors (of application in common-mode suppressed differential lines, for instance) and spectral signature barcodes, among others

Passive Planar Microwave Devices

The aim of this book is to highlight some recent advances in microwave planar devices. The development of planar technologies still generates great interest because of their many applications in fields as diverse as wireless communications, medical instrumentation, remote sensing, etc. In this book, particular interest has been focused on an electronically controllable phase shifter, wireless sensing, a multiband textile antenna, a MIMO antenna in microstrip technology, a miniaturized spoof plasmonic antipodal Vivaldi antenna, a dual-band balanced bandpass filter, glide-symmetric structures, a transparent multiband antenna for vehicle communications, a multilayer bandpass filter with high selectivity, microwave planar cutoff probes, and a wideband transition from microstrip to ridge empty substrate integrated waveguide

Modeling of integrated inductors for RF circuit design

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnic

Ultra-Wideband Phased Arrays for Small Mobile Platforms

This dissertation presents the development of a new class of Ultra-Wideband (UWB) apertures for aerial applications by introducing designs with over 50:1 bandwidth and novel differential feeding approaches. Designs that enable vertical integration for flip-chip millimeter-wave (UWB) transceivers are presented for small aerial platforms. Specifically, a new scalable tightly coupled array is introduced with differential feeding for chip integration. This new class of beam-forming arrays are fabricated and experimentally tested for validation with operation from as low as 130 MHz up to 18 GHz. A major achievement is the study of millimeter wave beamforming designs that operate from 22-80 GHz, fabricated using low-cost printed circuit board (PCB) methods. This low-cost fabrication approach and associated testing of the beamforming arrays are unique and game-changing

Aspectos de interconectividade dos moduladores de polímero

Orientador: Hugo Enrique Hernández-FigueroaTese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de ComputaçãoResumo: As interconexões ópticas e elétricas são de grande interese na area de encapsulamento de circuitos integrados híbridos fotônicos. Baixas perdas e banda larga são necessárias para o desenvolvimento de novas tecnologías na área. Nesta tese apresentan-se as seguintes contribuições originais: uma metodologia do modelamento de interconexões elétricas em encapsulamento de moduladores de polímero eletro-óptico, um dispositivo óptico compacto de banda larga para interconectar a plataforma de silício sobre isolante com a plataforma de filmes finos de polímero sobre silícioAbstract: Electrical and optical interconnects are of great interest for photonic integrated circuits with hybrid platforms. Low loss and wide band are essential for the development of new technologies in this area. In this thesis, we present the following original contributions: a methodology for modeling electrical ceramic interconnects inside an electrooptic polymer packaging, and a compact low-loss optical interconnect for the silicon-on-insulator platform to the thin-film polymer on silicon platformDoutoradoTelecomunicações e TelemáticaDoutor em Engenharia Elétrica07/2014-36CAPE