GaN heterojunction FET device Fabrication, Characterization and Modeling

This dissertation is focused on the research efforts to develop the growth, processing, and modeling technologies for GaN-based Heterojunction Field Effect Transistors (HFETs). The interest in investigating GaN HFETs is motivated by the advantageous material properties of nitride semiconductor such as large band gap, large breakdown voltage, and high saturation velocity, which make it very promising for the high power and microwave applications. Although enormous progress has been made on GaN transistors in the past decades, the technologies for nitride transistors are still not mature, especially concerning the reliability and stability of the device. In order to improve the device performance, we first optimized the growth and fabrication procedures for the conventional AlGaN barrier HFET, on which high carrier mobility and sheet density were achieved. Second, the AlInN barrier HFET was successfully processed, with which we obtained improved I-V characteristics compared with conventional structure. The lattice-matched AlInN barrier is beneficial in the removal of strain, which leads to better carrier transport characteristics. Furthermore, new device structures have been examined, including recess-gate HFET with n+ GaN cap layer and gate-on-insulator HFET, among which the insertion of gate dielectrics helps to leverage both DC and microwave performances. In order to depict the microwave behavior of the HFET, small signal modeling approaches were used to extract the extrinsic and intrinsic parameters of the device. An 18-element equivalent circuit model for GaN HFET has been proposed, from which various extraction methods have been tested. Combining the advantages from the cold-FET measurements and hot-FET optimizations, a hybrid extraction method has been developed, in which the parasitic capacitances were attained from the cold pinch-off measurements while the rest of the parameters from the optimization routine. Small simulation error can be achieved by this method over various bias conditions, demonstrating its capability for the circuit level design applications for GaN HFET. Device physics modeling, on the other hand, can help us to reveal the underlying physics for the device to operate. With the development of quantum drift-diffusion modeling, the self-consistent solution to the Schrödinger-Poisson equations and carrier transport equations were fulfilled. Lots of useful information such as band diagram, potential profile, and carrier distribution can be retrieved. The calculated results were validated with experiments, especially on the AlInN layer structures after considering the influence from the parasitic Ga-rich layer on top of the spacer. Two dimensional cross-section simulation shows that the peak of electrical field locates at the gate edge towards the drain, and of different kinds of structures the device with gate field-plate was found to efficiently reduce the possibility of breakdown failure

Design and performance analysis of Tri-gate GaN HEMTs

GaN-based high electron mobility transistors (HEMT) are promising devices for radio frequency (RF) and high-power electronics and are already in use for RF power amplifiers and for power switches. Commonly, these devices are normally-on transistors, i.e., they are in the on-state at zero applied gate voltage, what limits their suitability for various applications, such as fail-safe power switches and RF amplifiers with single-polarity power supply. Unfortunately, in contrast to GaAs- and InP HEMTs, achieving normally-off operation, i.e., a positive thresh-old voltage, for GaN heterostructures is difficult due to the high density of the polarization-induced two-dimensional electron gas (2DEG) at the barrier/buffer interface. For fast RF HEMTs, short gates are required. However, HEMTs with aggres-sively scaled gate length frequently suffer from short-channel effects caused by a degraded control of the gate over the channel. This leads to a deterioration of the transistors off-state performance (increased subthreshold swing and drain-induced barrier lowering) and on-state behavior (increased drain conductance). The tri-gate design has recently been applied to MOSFETs and HEMTs to improve the gate control and suppress short channel effects. Experimental tri-gate transistors show excellent down-scaling characteristics, improved performance, and, in particular for GaN tri-gate HEMTs, a significant shift of the threshold voltage toward positive values. On the other hand, tri-gate GaN normally-off HEMTs are still suffering from increased parasitics causing degraded RF performance (particularly in terms of cutoff frequency) compared to their planar counterparts. Improving the RF performance of GaN tri-gate HEMTs by reducing the parasitics is essential, but this requires a deep understanding of device physics and a thorough analysis of the root causes. In the present work, in-depth theoretical investigations of GaN tri-gate HEMT operation are performed and extensive simulation studies for these devices are conducted. As a result of these efforts, improved insights in the physics of GaN tri-gate HEMTs are achieved, the potential of this transistor type is assessed, design guidelines are elaborated, and advantageous designs are developed. It is shown that the 2DEG sheet density decreases by shrinking the body width, that the threshold voltage of GaN tri-gate HEMTs strongly depends on the width of AlGaN/GaN bodies, and that solely by decreasing the body width a transition from normally-on to normally-off operation can be achieved. The separation between adjacent bodies is shown to have less impact on threshold voltage. The results also show that for wide bodies (> 200 nm) the channel is controlled by both the top-gate and the sidewall gates, while for decreasing body width the control by top-gate gradually diminishes and the channel will be only controlled by side-gates. Furthermore, the impact of AlGaN barrier design (Al content, thickness) is studied, and the results show a limited dependency of the threshold voltage on the barrier design for very narrow bodies. The tri-gate concept enables normally-off operation, provides improved on-state performance (higher transconductance), and effectively suppresses short-channel effects in the off-state. Moreover, the simulation results show that GaN tri-gate HEMTs can exhibit higher breakdown voltages and operate closer to the theoretical limit for GaN devices than their planar counterparts. Moreover, the simulations indicate that the RF performance of GaN tri-gate HEMTs with optimized body designs can be superior to that of conventional planar devices. A means to improve the RF performance is the reduction of the body etch height, leading to a decreased parasitic coupling between the sidewalls and the source/drain electrodes. Thus, reducing the body height leads to a decreased overall gate capacitance and an improved RF performance. Another way to reduce the overall gate capacitance is to cover the body sidewalls with a dielectric (e.g. SiN). This reduces the fringing capacitance components since the gap between neighboring bodies that is filled with gate metal is narrower compared to the case without dielectrics. Finally, the polarization charge at the barrier/channel interface and thus the electron density in the 2DEG) can be increased either by increasing the aluminium content of the AlGaN barrier or by using a different barrier material (e.g., lattice matched In0.17 Al0.83 N). In the frame of a joint DFG project, GaN tri-gate HEMTs designed based on the improved insights in the physics of these devices have been fabricated and characterized at Fraunhofer IAF. These devices having a gate length of 100 nm are by far the fastest GaN tri-gate HEMTs worldwide and show record performance in terms of cutoff frequency (120 GHz) and maximum frequency of oscillation (300 GHz).HEMTs (high electron mobility transistors) auf GaN-Basis besitzen großes Potenzial für die HF- (Hochfrequenz) und Leistungselektronik und werden bereits in HF-Leistungsverstärkern und als Leistungsschalter verwendet. Üblicherweise sind GaN HEMTs Normally-On Transistoren (d.h. Transistoren, die sich bei einer Gatespannung von 0 V im Ein-Zustand befinden), was für Anwendungen wie Fail-Safe-Leistungsschalter und HF-Verstärker mit nur einer Versorgungsspannung nachteilig ist. Es schwierig, GaN HEMTs mit Normally-Off-Charakteristik (HEMTs mit positiver Schwellspannung) zu realisieren, da in diesen Transistoren die Dichte des sich an der Grenzfläche Barriere/Puffer ausbildenden 2DEG (zweidimensionales Elektronengas) auf Grund starker Polarisationseffekte erheblich größer als in GaAs und InP HEMTs ist. Die Realisierung schneller HF-HEMTs erfordert kurze Gates. Allerdings leiden Transistoren mit sehr kurzen Gates häufig unter Kurzkanaleffekten und einer reduzierten Steuerwirkung des Gates, was zu einer Verschlechterung des Verhaltens im Aus-Zustand (erhöhte Werte für den Subthreshold Swing und das Drain-Induced Barrier Low-ering) und im Ein-Zustand (erhöhter Drainleitwert) führt. In jüngster Zeit wird bei MOSFETs und HEMTs das Tri-Gate-Design angewendet, um die Gatesteuerwirkung zu verbessern und Kurzkanaleffekte zu unterdrücken. So wurden bereits Tri-Gate-Transistoren mit ausgezeichnetem Skalierungsverhalten, verbesserten Eigenschaften und, speziell im Fall von GaN Tri-Gate-HEMTs, positiver Schwellspannung, demonstriert. Auf der anderen Seite leiden GaN Tri-Gate-HEMTs mit Normally-Off-Charakteristik jedoch unter großen Parasitäten, die das HF-Verhalten (insbesondere die Transitfrequenz) beeinträchtigen. Die Verbesserung des HF-Verhaltens und eine Reduzierung der Parasitäten von GaN Tri-Gate-HEMTs ist daher dringend nötig. Das erfordert jedoch ein tiefes Eindringen in die Physik dieser Bauelemente. In der vorliegenden Arbeit werden umfassende theoretische Untersuchungen und Bauelementesimulationen zu GaN Tri-Gate-HEMT beschrieben, die zu einem deutlichen verbesserten Verständnis der Wirkungsweise von GaN Tri-Gate-HEMTs führten. So konnten das Potential dieses Transistortyps bewertet, Designregeln erarbeitet und vorteilhafte Transistordesigns entwickelt werden. In der Arbeit wird gezeigt, dass eine Verringerung der Bodyweite bei gegebener Gatespannung zu einer Verringerung der Ladungsträgerdichte im 2DEG führt, dass die Schwellspannung maßgeblich von der Bodyweite bestimmt wird und dass bei hinreichend geringer Bodyweite der Übergang vom Normall-On- zum Normally-Off-Betrieb erfolgt. Es wird auch gezeigt, dass der Abstand zwischen benachbarten Bodies nur einen geringen Einfluss auf die Schwellspannung hat. Darüber hinaus wird demonstriert, dass im Fall weiter Bodies (> 200 nm) der Kanal sowohl durch das Top-Gate als auch durch die Seiten-Gates gesteuert wird, während bei schmaleren Bodies die Steuerwirkung durch das Top-Gate geringer wird und die Verhältnisse im Kanal im Wesentlichen durch das Seiten-Gates bestimmt werden. In der Arbeit wird weiterhin Rolle des Designs der AlGaN-Barriere (Al-Gehalt, Dicke) untersucht und demonstriert, dass die Gestaltung der Barriere bei schmalen Bodies nur einen begrenzten Einfluss auf die Schwellspannung hat. Die Untersuchungen zeigen deutlich, dass das mit dem Tri-Gate-Konzept Normally-Off-Transistoren realisierbar sind, dass das Transistorverhalten im Ein-Zustand verbessert (höhere Steilheit) wird, und dass Kurzkanaleffekte im Aus-Zustand wirkungsvoll unterdrückt. Es wird auch demonstriert, dass GaN Tri-Gate HEMTs höhere Durchbruchspannungen zeigen und näher an der theoretischen Grenze für GaN-Bauelemente arbeiten als planare GaN HEMTs. Ein weiteres Ergebnis der vorliegenden Arbeit ist der Nachweis, dass GaN Tri-Gate-HEMTs mit sorgfältig optimiertem Design den planaren HEMTs auch hinsichtlich des HF-Verhaltens überlegen sind. Ein Mittel zur Verbesserung des HF-Verhaltens ist die Reduzierung der Body-Ätzhöhe, die zur Verringerung der parasitären Kopplung zwischen den Body-Seitenwänden und den Source/Drain-Elektroden und somit zu einer geringeren Gatekapazität führt. Eine weitere Maßnahme zur Reduzierung der Gatekapazität ist die Beschichtung der Body-Seitenwände mit einem Dielektrikum (z.B. SiN). Das verringert die Streukapazität, da jetzt die mit dem Gatemetall gefüllte Lücken zwischen benachbarten Bodies schmaler sind. Schließlich wird gezeigt, dass die Polarisationsladung an der Grenzfläche Barrier/Kanal und somit die Elektronendichte im 2DEG durch Erhöhung des Al-Gehalts der AlGaN-Barriere oder durch Nutzung eines anderen Materials für die Barriere (z.B. gitterangepasstes In0.17 Al0.83 N) gesteigert werden kann

Development of InAlN HEMTs for space application

This thesis investigates the emerging InAlN high electron mobility transistor (HEMT) technology with respect to its application in the space industry. The manufacturing processes and device performance of InAlN HEMTs were compared to AlGaN HEMTs, also produced as part of this work. RF gain up to 4 GHz was demonstrated in both InAlN and AlGaN HEMTs with gate lengths of 1 μm, with InAlN HEMTs generally showing higher channel currents (~150 c.f. 60 mA/mm) but also degraded leakage properties (~ 1 x 10-4 c.f. < 1 x 10-8 A/mm) with respect to AlGaN. An analysis of device reliability was undertaken using thermal stability, radiation hardness and off-state breakdown measurements. Both InAlN and AlGaN HEMTs showed excellent stability under space-like conditions, with electrical operation maintained after exposure to 9.2 Mrad of gamma radiation at a dose rate of 6.6 krad/hour over two months and after storage at 250°C for four weeks. Furthermore a link was established between the optimisation of device performance (RF gain, power handling capabilities and leakage properties) and reliability (radiation hardness, thermal stability and breakdown properties), particularly with respect to surface passivation. Following analysis of performance and reliability data, the InAlN HEMT device fabrication process was optimised by adjusting the metal Ohmic contact formation process (specifically metal stack thicknesses and anneal conditions) and surface passivation techniques (plasma power during dielectric layer deposition), based on an existing AlGaN HEMT process. This resulted in both a reduction of the contact resistivity to around 1 x 10-4 Ω.cm2 and the suppression of degrading trap-related effects, bringing the measured gate-lag close to zero. These discoveries fostered a greater understanding of the physical mechanisms involved in device operation and manufacture, which is elaborated upon in the final chapter

Advanced III-Nitride Technology for mm-Wave Applications

Within wireless communication, there is a continuously growing need for more bandwidth due to an increasing number of users and data intense services. The development within sensor systems such as radars, is largely driven by the need for increased detection range and robustness. In such systems, power amplification and generation at high frequency are of importance. High-electron mobility transistors based on gallium nitride (GaN HEMTs) offer efficient generation of high output power at high frequency. This is enabled by the unique characteristics of GaN and its heterostructures, with a large breakdown field, related to the wide bandgap, and excellent electron transport properties. Due to this, it is today used in high-performing radar, telecommunications, as well as power electronic systems. Despite substantial progress over the last decade, the GaN HEMT is still the subject of intense research to reach its full potential. \ua0Recent development within epitaxy has significantly improved the quality of III-nitride semiconductors, and enabled indium aluminum nitride (InAlN) and InAlGaN as alternatives to AlGaN in the conventional AlGaN/GaN heterostructure. The higher polarization charge in these materials allows for considerable downscaling of the barrier layer thickness with a sustained high sheet carrier density. \ua0This has opened new possibilities for optimization of the high frequency performance. \ua0\ua0In this work, HEMTs with downscaled InAl(Ga)N barrier layers have been developed with the goal to optimize the devices for power amplification in the mm-wave range. Electron trapping and short-channel effects have been addressed in the design of the epi and in the optimization of the process modules. Different surface passivation layers and deposition methods have been evaluated to mitigate electron trapping at the surface. The output power density of a HEMT increased from 1.7 to 4.1 W/mm after passivation with a SiNx layer. The deposition method for Al2O3 passivation layers showed to have a profound impact on the electron trapping. A layer deposited by plasma-assisted atomic layer deposition (ALD) exhibited superior passivation of the surface traps as compared to the layer deposited by thermal ALD, resulting in an output power at 3 GHz of 3.3, and 1.9 W/mm, respectively. The effect of the channel layer thickness (50 – 150 nm) in InAlGaN/AlN/GaN HEMTs with and AlGaN back barrier demonstrated a trade-off between short-channel effects and deep-level electron trapping in the back barrier. The maximum output power was 5.3 W/mm at 30 GHz, obtained for a GaN layer thickness of 100 nm. To further enhance the high frequency performance, the ohmic contacts were optimized by the development of a Ta-based, Au free, metal scheme. Competitive contact resistance of &lt; 0.2 Ωmm was achieved on both AlGaN/GaN and InAlN heterostructures with a Ta/Al/Ta metal stack. The contacts are annealed at a low temperature (550 – 575 \ubaC) compared to more conventional contact schemes, resulting in a smooth morphology and good edge acuity.\ua0 The implementation of microwave monolithic integrated circuits (MMICs) based on III-nitride HEMTs facilitate the use of III-nitride HEMTs in a system where frequency and compactness are key requirements. Thin film resistors (TFRs) are one of the passive components required in MMICs. In this work, a low-resistance titanium nitride (TiN) TFR was developed as a complement to the higher resistance tantalum nitride (TaN) TFR and mesa resistor in the in-house MMIC process. The developed TiN TFR exhibits a sheet resistance of 10 Ω/□, compared to 50 and 200-300 Ω/□ of the TaN TFR and semiconductor resistor, respectively. The critical dissipated power in the TFR showed a correlation to the footprint area, indicating that Joule-heating was the main cause of failure. TiN- and TaN films exhibit different signs of the thermal coefficient of resistance. This feature was used to demonstrate a temperature compensated TFR (TCR = -60 ppm \ubaC) with application in MMICs operating in a wide temperature range

Circuits Techniques for Wireless Sensing Systems in High-Temperature Environments

RÉSUMÉ Dans ce projet, nous proposons de nouvelles techniques d’intégration basées sur la technologie de nitrure de gallium (GaN). Ces techniques permettent de mettre en œuvre un système de transmission de données sans fil entièrement intégré dédié aux capteurs de surveillance pour des applications d'environnement hostile. Le travail nécessite de trouver une technologie capable de résister à l'environnement sévère, principalement à haute température, et de permettre un niveau d'intégration élevé. Le système réalisé serait le premier dispositif de transmission de données basé sur la technologie GaN. En plus de supporter les conditions de haute température (HT) dépassant 600 oC, le système de transmission sans fil attendu devrait fonctionner à travers une barrière métallique séparant le module émetteur du récepteur. Une revue de la littérature sur les applications en environnements hostiles ainsi que sur l'électronique correspondante a été réalisée pour sélectionner la technologie AlGaN/GaN HEMT (transistor à haute mobilité d'électrons) comme une technologie appropriée. Le kit de conception GaN500, fourni par le Conseil national de recherches du Canada (CNRC), a été adopté pour concevoir et mettre en œuvre le système proposé. Cette technologie a été initialement introduite pour desservir les applications radiofréquences (RF) et micro-ondes. Par conséquent, elle n'avait pas été validée pour concevoir et fabriquer des circuits intégrés analogiques et numériques complexes et son utilisation à des températures extrêmes n’était pas validée. Nous avons donc caractérisé à haute température des dispositifs fabriqués en GaN500 et des éléments passifs intégrés correspondants ont été réalisés. Ces composants ont été testés sur la plage de température comprise entre 25 et 600 oC dans cette thèse. Les résultats de caractérisation ont été utilisés pour extraire les modèles HT des HEMT intégrés et des éléments passifs à utiliser dans les simulations. En outre, plusieurs composants intégrés basés sur la technologie GaN500, notamment des NOT, NOR, NAND, XOR, XNOR, registres, éléments de délais et oscillateurs ont été mis en œuvre et testés en HT. Des circuits analogiques à base de GaN500, comprenant un amplificateur de tension, un comparateur, un redresseur simple alternance, un redresseur double alternance, une pompe de charge et une référence de tension ont également été mis en œuvre et testés en HT. Le système de transmission de données mis en œuvre se compose d'un module de modulation situé dans la partie émettrice et d'un module de démodulation situé dans la partie réceptrice.----------ABSTRACT In this project, we propose new integrated-circuit design techniques based on the Gallium Nitride (GaN) technology to implement a fully-integrated data transmission system dedicated to wireless sensing in harsh environment applications. The goal in this thesis is to find a proper technology able to withstand harsh-environments (HEs), mainly characterized by high temperatures, and to allow a high-integration level. The reported design is the first data transmission system based on GaN technology. In addition to high temperature (HT) environment exceeding 600 oC, the expected wireless transmission systems may need to operate through metallic barriers separating the transmitting from the receiving modules. A wide literature review on the HE applications and corresponding electronics has been done to select the AlGaN/GaN HEMT (high-electron-mobility transistor) technology. The GaN500 design kit, provided by National Research Council of Canada (NRC), was adopted to design and implement the proposed system. This technology was initially provided to serve radio frequency (RF) and microwave circuits and applications. Consequently, it was not validated to implement complex integrated systems and to withstand extreme temperatures. Therefore, the high-temperature characterization of fabricated GaN500 devices and corresponding integrated passive elements was performed over the temperature range 25-600 oC in this thesis. The characterization results were used to extract HT models of the integrated HEMTs and passive elements to be used in simulations. Also, several GaN500-based digital circuits including NOT, NOR, NAND, XOR, XNOR, register, Delay and Ring oscillator were implemented and tested at HT. GaN500-based Analog circuits including front-end amplifier, comparator, half-bridge rectifier, full-bridge rectifier, charge pump and voltage reference were implemented and tested at HT as well. The implemented data transmission system consists of a modulation module located in the transmitting part and a demodulation block located in the receiving part. The proposed modulation system is based on the delta-sigma modulation technique and composed of a front-end amplifier, a comparator, a register, a charge pump and a ring oscillator. The output stage of the transmitter is intended to perform the load-shift-keying (LSK) modulation required to accomplish the data transmission through the dedicated inductive link. At the receiver level, three demodulation topologies were proposed to acquire the delivered LSK-modulated signals

Advanced AlGaN/GaN HEMT technology, design, fabrication and characterization

Nowadays, the microelectronics technology is based on the mature and very well established silicon (Si) technology. However, Si exhibits some important limitations regarding its voltage blocking capability, operation temperature and switching frequency. In this sense, Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) devices have the potential to make this change possible. The unique combination of the high-breakdown field, the high-channel electron mobility of the two dimensional electron gas (2DEG), and high-temperature of operation has attracted enormous interest from social, academia and industry and in this context this PhD dissertation has been made. This thesis has focused on improving the device performance through the advanced design, fabrication and characterization of AlGaN/GaN HEMTs, primarily grown on Si templates. The first milestone of this PhD dissertation has been the establishment of a know-how on GaN HEMT technology from several points of view: the device design, the device modeling, the process fabrication and the advanced characterization primarily using devices fabricated at Centre de Recherche sur l'Hétéro-Epitaxie (CRHEA-CNRS) (France) in the framework of a collaborative project. In this project, the main workhorse of this dissertation was the explorative analysis performed on the AlGaN/GaN HEMTs by innovative electrical and physical characterization methods. A relevant objective of this thesis was also to merge the nanotechnology approach with the conventional characterization techniques at the device scale to understand the device performance. A number of physical characterization techniques have been imaginatively used during this PhD determine the main physical parameters of our devices such as the morphology, the composition, the threading dislocations density, the nanoscale conductive pattern and others. The conductive atomic force microscopy (CAFM) tool have been widely described and used to understand the conduction mechanisms through the AlGaN/GaN Ohmic contact by performing simultaneously topography and electrical conductivity measurements. As it occurs with the most of the electronic switches, the gate stack is maybe the critical part of the device in terms of performance and longtime reliability. For this reason, how the AlGaN/GaN HEMT gate contact affects the overall HEMT behaviour by means of advanced characterization and modeling has been intensively investigated. It is worth mentioning that the high-temperature characterization is also a cornerstone of this PhD. It has been reported the elevated temperature impact on the forward and the reverse leakage currents for analogous Schottky gate HEMTs grown on different substrates: Si, sapphire and free-standing GaN (FS-GaN). The HEMT' forward-current temperature coefficients (T^a) as well as the thermal activation energies have been determined in the range of 25-300 ºC. Besides, the impact of the elevated temperature on the Ohmic and gate contacts has also been investigated. The main results of the gold-free AlGaN/GaN HEMTs high-voltage devices fabricated with a 4 inch Si CMOS compatible technology at the clean room of the CNM in the framework of the industrial contract with ON semiconductor were presented. We have shown that the fabricated devices are in the state-of-the-art (gold-free Ohmic and Schottky contacts) taking into account their power device figure-of-merit ((VB^2)/Ron) of 4.05×10^8 W/cm^2. Basically, two different families of AlGaN/GaN-on-Si MIS-HEMTs devices were fabricated on commercial 4 inch wafers: (i) using a thin ALD HfO2 (deposited on the CNM clean room) and (ii) thin in-situ grown Si3N4, as a gate insulator (grown by the vendor). The scientific impact of this PhD in terms of science indicators is of 17 journal papers (8 as first author) and 10 contributions at international conferences

Wide Bandgap Based Devices: Design, Fabrication and Applications, Volume II

Wide bandgap (WBG) semiconductors are becoming a key enabling technology for several strategic fields, including power electronics, illumination, and sensors. This reprint collects the 23 papers covering the full spectrum of the above applications and providing contributions from the on-going research at different levels, from materials to devices and from circuits to systems

Growth Optimization of Metal-polar III-Nitride High-electron-mobility Transistor Structures by Molecular Beam Epitaxy

GaN-based high-electron-mobility transistors (HEMTs) will play an important role in the next generation of high-frequency amplifiers and power-switching devices. Since parasitic conduction (leakage) through the GaN buffer layer and (Al,Ga,In)N barrier reduces the efficiency of operation, HEMT performance hinges on the epitaxial quality of these layers. Increasing the sheet charge density and mobility of the two-dimensional electron gas (2DEG) is also essential for reducing the channel resistance and improving output. The growth conditions applied in plasma-assisted molecular beam epitaxy (PAMBE) and ammonia-based molecular beam epitaxy (NH3-MBE) that result in high-quality metal-polar HEMT structures are described. The effects of threading dislocations on the gate leakage and channel conductivity of AlGaN/GaN HEMTs were studied in detail. For this purpose, a series of HEMT structures were grown on GaN templates with threading dislocation densities (TDDs) that spanned three orders of magnitude. There was a clear trend of reduced gate leakage with reduced TDD for HEMTs grown by Ga-rich PAMBE; however, a reduction in TDD also entailed an increase in buffer leakage. By reducing the unintentionally doped (UID) GaN buffer thickness and including an AlGaN back barrier, a HEMT regrown by Ga-rich PAMBE on low-TDD free-standing (FS) GaN (~5 x 107 cm-2 TDD) yielded a three-terminal breakdown voltage greater than 50 V and a power output (power-added efficiency) of 6.7 W/mm (50 %) at 4 GHz with a 40 V drain bias. High TDD was then shown to severely degrade the 2DEG mobility of AlxGa1-xN/GaN (x = 0.24, 0.12, 0.06) and AlGaN/AlN/GaN heterostructures grown by Ga-rich PAMBE. By regrowing on low-TDD FS GaN and including a 2.5 nm AlN interlayer, an Al0.24Ga0.76N/AlN/GaN heterostructure achieved a room temperature (RT) 2DEG sheet resistance of 169 Ω/?. As evidenced by atom probe tomography, the AlN interlayer grown by Ga-rich PAMBE was pure with abrupt interfaces. The pure AlN interlayer greatly reduced alloy-related scattering. When AlGaN/AlN/GaN heterostructures were grown by NH3-MBE at 820 °C, the 2DEG sheet density was lower than expected. These AlN interlayers were shown to have a significant concentration of Ga impurities by atom probe tomography. The source of these impurities was most likely the decomposition of the underlying GaN layers, as reduction of the growth temperature below 750 °C yielded a much lower concentration of Ga impurities. Flux optimization and application of an In surfactant was necessary to reduce the interface roughness in AlGaN/AlN/GaN heterostructures grown by NH3-MBE at low temperature, yielding sheet resistances below 300 Ω/?. The growth of InAlN/(GaN)/(AlN)/GaN heterostructures with lattice-matched In0.17Al0.83N barriers by N-rich PAMBE is also described. Through flux optimization, the columnar microstructure previously observed in N-rich PAMBE-grown InAlN layers was eliminated. By including a 3 nm AlN interlayer and 2 nm GaN interlayer, an In0.17Al0.83N/GaN/AlN/GaN heterostructure regrown on low-TDD FS GaN achieved an exceptionally low RT 2DEG sheet resistance of 145 Ω/?

Advanced GaN HEMTs for high performance microwave power amplifiers

The ever increasing demand for high power levels at higher frequencies from the industry has stimulated extensive research in gallium nitride (GaN) transistor technology over the past two decades. This has led to significant advances of the technology, but the degradation in the device performance due to device self-heating and trap generation in the device epilayers during device operation is still a major challenge with the current GaN high electron mobility transistor (HEMT) technology. This thesis focuses on minimising device self-heating effects by means of efficient heat distribution within the device. Two approaches are analysed in this work. Firstly, the impact on the device DC performance of improved wafer growth conditions by using method called hot-wall MOCVD (metal organic chemical vapour deposition) are investigated. It was found that 2 µm × 100 µm devices on this wafer exhibit only 4% degradation in the saturated output current density at 20 V compared with 13% for devices fabricated on a wafer grown by standard MOCVD growth. This improved performance was attributed to lower thermal boundary resistance achieved by improved growth quality of the epitaxial material layers. In the second approach, the impact on self-heating was investigated through the use of a distributed device channel, i.e. introducing inactive regions along the device channel to distribute the hot spots in the device. Here a planar isolation method was used to achieve planar distributed gate devices that led to low leakage currents below 200 nA/mm at gate voltage of -20 V. A decrease in the peak channel temperature of 30°C was found through thermal simulations over a single 100 µm wide gate finger. Moreover, these distributed channel devices with gate periphery of 10 ×100 µm showed 13 % higher saturated current density than standard devices with the same active device area. The other major issue addressed in this thesis is the so-called current collapse which is a degradation in the output current caused by electron trapping in the device structure. An alternative solution to the conventionally used dielectric passivation is proposed and it entails the use of a thick undoped GaN cap layer to reduce the surface effects by moving the surface further away from the device channel. Drain lag measurements show 15% and 35% decrease in the current at quiescent bias decrease points of [-7 V; 10 V] and [-7 V; 20 V] respectively for the proposed structure compared with 80% decrease and complete current collapse at these quiescent bias points in the same geometry devices on a standard wafer with 2 nm GaN cap layer and a thin 10 nm thin SiNx passivation, respectively. The 10 nm thin passivation layer does not minimise the surface effects, but it protects the devices from oxidation. Finally, a single stage class A amplifier was demonstrated using the developed technology exhibiting peak output power of 30 dBm at 10 GHz and associated power added efficiency of 44% and gain of 10 dB. Also, gain of at least 9.4 dB was shown over 8-13 GHz bandwidth

Wide Bandgap Based Devices

Emerging wide bandgap (WBG) semiconductors hold the potential to advance the global industry in the same way that, more than 50 years ago, the invention of the silicon (Si) chip enabled the modern computer era. SiC- and GaN-based devices are starting to become more commercially available. Smaller, faster, and more efficient than their counterpart Si-based components, these WBG devices also offer greater expected reliability in tougher operating conditions. Furthermore, in this frame, a new class of microelectronic-grade semiconducting materials that have an even larger bandgap than the previously established wide bandgap semiconductors, such as GaN and SiC, have been created, and are thus referred to as “ultra-wide bandgap” materials. These materials, which include AlGaN, AlN, diamond, Ga2O3, and BN, offer theoretically superior properties, including a higher critical breakdown field, higher temperature operation, and potentially higher radiation tolerance. These attributes, in turn, make it possible to use revolutionary new devices for extreme environments, such as high-efficiency power transistors, because of the improved Baliga figure of merit, ultra-high voltage pulsed power switches, high-efficiency UV-LEDs, and electronics. This Special Issue aims to collect high quality research papers, short communications, and review articles that focus on wide bandgap device design, fabrication, and advanced characterization. The Special Issue will also publish selected papers from the 43rd Workshop on Compound Semiconductor Devices and Integrated Circuits, held in France (WOCSDICE 2019), which brings together scientists and engineers working in the area of III–V, and other compound semiconductor devices and integrated circuits