Design of multimedia processor based on metric computation

Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-time constraints of those media applications have taxing demands on today's processor performances with low cost, low power and reduced design delay. To satisfy those challenges, a fast and efficient strategy consists in upgrading a low cost general purpose processor core. This approach is based on the personalization of a general RISC processor core according the target multimedia application requirements. Thus, if the extra cost is justified, the general purpose processor GPP core can be enforced with instruction level coprocessors, coarse grain dedicated hardware, ad hoc memories or new GPP cores. In this way the final design solution is tailored to the application requirements. The proposed approach is based on three main steps: the first one is the analysis of the targeted application using efficient metrics. The second step is the selection of the appropriate architecture template according to the first step results and recommendations. The third step is the architecture generation. This approach is experimented using various image and video algorithms showing its feasibility

Processor Enhancements for Media Streaming Applications

The development of more processing demanding applications on the Internet (video broadcasting) on one hand and the popularity of recent devices at the user level (digital cameras, wireless videophones, ...) on the other hand introduce challenges at several levels. Today, such devices present processing capabilities and bandwidth settings that are inefficient to manage scalable QoS requirements in a typical media delivery framework. In this paper, we present an impact study of such a scalable data representation optimized for QoS (Matching Pursuit 3D algorithms) on processor architectures to achieve the best performance and power efficiency. A review of state of the art techniques for processor architecture enhancement let us expect promising opportunities from the latest developments in the reconfigurable computing research field. We present here the first design steps of an efficient reconfigurable coprocessor especially designed to cope with future video delivery and multimedia processing requirements. Architecture perspectives are proposed with respect to low development cost constraints, backward compatibilty and easy coprocessor usage using an original strategy based on a hardware/software codesign methodolog

Review of System Design Frameworks

In the last decade, the enormous development of the semiconductor industry with ever-increasing complexities of digital embedded systems and strong market competition with fast time-to-market and low design cost demands have imposed serious difficulty to a conventional design method. Therefore, there emerges a new design flow named model-based system design, which is based on high-level abstraction models, heavy design automation, and extensive component reuse to increase productivity and satisfy the market pressure. This thesis presents reviews of ten high level academic system design frameworks and tools that have been proposed and implemented recently to support the model based design flow, namely System-on-Chip Environment (SCE), Embedded System Environment (ESE), Metropolis, Daedalus, SystemCoDesigner (SCD), xPilot, GAUT, No-Instruction-Set Computer (NISC), Formal System Design (ForSyDe), and Ptolemy II. These tools are then compared to each other in various aspects comprising objective, technique, implementation and capability. Following that, three design flow frameworks, including ESE, Daedalus, and SystemCoDesigner, are experimented for their real usage, performance and practicality. The frameworks and tools implementing the model-based design flow all show promising results. Modelling tools (ForSyDe, and Ptolemy II) can sufficiently capture a wide range of complicated modern systems, while high-level synthesis tools (xPilot, GAUT, and NISC) produce better design qualities in terms of area, power, and cost in comparison to traditional works. Study cases of design flow frameworks (SCE, ESE, Metropolis, Daedalus, and SCD) show the model-based method significantly reduces developing time as well as facilitates the system design process. However, most of these tools and frameworks are being incomplete, and still under the experimental stage. There still be a lot of works needed until the method can be put into practice

Scalability of parallel video decoding on heterogeneous manycore architectures

This paper presents an analysis of the scalability of the parallel video decoding on heterogeneous many core architectures. As benchmark, we use a highly parallel H.264/AVC video decoder that generates a large number of independent tasks. In order to translate task-level parallelism into performance gains both the video decoder and the architecture have been optimized. The video decoder was modified for exploiting coarse-grain frame-level parallelism in the entropy decoding kernel which has been considered the main bottleneck. Second, a heterogeneous combination of cores is evaluated for executing different type of tasks. Finally, an evaluation of the memory requirements of the whole system has been carried out. Experiments conducted using a trace-driven simulation methodology shows that the evaluated system exhibits a good parallel scalability up to 68 cores. At this point the parallel video decoder is able to decode more than 200 HD frames per second using simple low power processors.Postprint (published version

VLSI architecture design approaches for real-time video processing

This paper discusses the programmable and dedicated approaches for real-time video processing applications. Various VLSI architecture including the design examples of both approaches are reviewed. Finally, discussions of several practical designs in real-time video processing applications are then considered in VLSI architectures to provide significant guidelines to VLSI designers for any further real-time video processing design works

Exploration d'une méthodologie de développement matériel et logiciel au niveau système appliqué à un système d'encodage de flux vidéo évolutif

La compagnie Grass Valley, fabricant de cartes de traitement vidéo, désire mettre à jour leur sous-système « thumbnail » qui produit des vidéos à échelle réduite à des fins de diagnostic. Afin de le moderniser, ils ont arrêté leur choix sur une implémentation d’un « proxy » vidéo produisant un flux vidéo compressé avec la norme H.264. Afin d’épargner en coût de développement et assurer son indépendance au cycle de vie des composantes tierces, Grass Valley est à la recherche d’une implémentation évolutive et indépendante d’une plateforme. Afin de résoudre ce problème, Grass Valley a fait appel à Polytechnique. Le développement d’un encodeur H.264 pour système sur puce personnalisé peut nécessiter plusieurs mois à plusieurs années de développement pour une équipe d’ingénierie. Il existe actuellement peu de solutions possibles pour concevoir un tel sous-système rapidement. Afin de développer le sous-système d’encodage H.264 rapidement, nous avons opté pour une méthodologie de développement à l’aide de l’approche du point de vue du système basée sur une spécification exécutable d’un encodeur H.264 en utilisant l’outil SpaceStudio. SpaceStudio est un logiciel permettant l’exploration architecturale à l’aide de plateforme virtuelle configurable. La conception de système à l’aide de cet outil se fait par une approche modulaire sous SystemC. Le système est séparé en module logiciel et matériel fonctionnel et ceux-ci sont développés itérativement. L’utilisation d’un code applicatif comme base afin d’en produire un système embarqué sous SpaceStudio n’a pas été expérimentée. Dans cette optique, ce travail à deux objectifs : 1) développer un système pouvant encoder un flux vidéo et 2) expérimenter avec une approche de développement du point de vue du système à l’aide d’une spécification exécutable sous SpaceStudio. Il est donc question de développer la méthodologie et le projet en parallèle. Au terme de ce projet, nous aurons implémenté un système d’encodage H.264 sur une plateforme virtuel et défini la méthodologie nécessaire afin de produire un système sur puce à l’aide d’une référence logicielle. Cette recherche nous a permis de découvrir les obstacles à la conception de système complexe à l’aide de code C/C++ existant sous SpaceStudio et de développer les bases nécessaires pour rendre la totalité de la méthodologie réalisable dans le futur.----------ABSTRACT: GrassValley, a manufacturer of video processing cards, wants to upgrade their thumbnail subsystem which produces scaled-down videos for diagnostic purposes. In order to modernize this subsystem, they have decided to go with a video proxy producing a video stream compressed with the H.264 standard. In order to save development costs and ensure its independence of third-party components, Grass Valley is looking for a scalable platformindependent implementation. To solve this problem, they called upon Polytechnique. The development of an H.264 encoder for custom system-on-a-chip may take several months to several years of development for an engineering team. There are currently very few possible solutions to design such a subsystem quickly. In order to do so, we opted for a development methodology using the system-level approach based on an executable specification of an H.264 encoder using SpaceStudio. SpaceStudio is a computer aided design software for architectural exploration using a configurable virtual platform. Designing a system with this tool is done through a modular approach using the SystemC library. The designed system is separated into functional software / hardware modules developed iteratively. The use of a software application as a basis to produce a system under SpaceStudio has not been yet tested. This work has two objectives: 1) to develop a system capable of encoding a video stream and 2) to experiment with a system level development approach using a executable specification under SpaceStudio. It is therefore a question of developing the methodology and the encoder in parallel. At the end of this project, we will have implemented a H.264 encoding system on a virtual platform and defined the methodology needed to produce a full system on chip using a software reference as a basis for development. This research allowed us to discover the obstacles associated to the design of a complex systems using C "legacy" code under SpaceStudio and to develop the necessary tools to make the whole methodology achievable in the future