SELF REFERENCED EDGE DETECTION FOR CMOS PWM TRANSCEIVER

Technique is used to implement the CMOS PWM Transceiver circuit is presented. In this paper, A Self Referenced Edge Detection technique is implemented to analyze a CMOS PWM Transceiver circuit, by comparing the rising edge that is self-delayed by about 0.5 T and the modulated falling edge in one carrier clock cycle. An Area-efficient and high robustness (against timing fluctuations) edge detection enabling PWM communication is achieved without requiring elaborate phase-locked loops. Self-referenced edge detection circuit has the capability of timing error measurement while changing the length of self delay element, adaptive data-rate optimization and delay-line calibration are realized. The measured results with a 65-nm CMOS prototype demonstrate a 2-bit PWM communication, high data rate (4Gbps), small peak to peak jitter(4.8ns), and high reliability (BER > 10−12) with small area occupation (540 μm2) and with high RMS (1.3). For reliability improvement, error check and correction associated with intercycle edge detection is introduced and its effectiveness is verified by 2-bit PWM measurement

広帯域低雑音増幅回路の研究

修士論

Spectrally and temporally resolved single photon counting in advanced biophotonics applications

Biomedicine requires highly sensitive and efficient light sensors to analyse light-tissue or light-sample interactions. Single-photon avalanche diode (SPAD) sensors implemented with complementary metal-oxide-semiconductor (CMOS) technology have a growing range of applications in this field. Single-photon detection coupled with integrated timing circuits enables us to timestamp each detected photon with high temporal resolution (down to picoseconds). Arrays of SPAD based pixels and CMOS technology offer massively parallel time-resolved single-photon counting for spectrally and temporally resolved analysis of various light phenomena.This thesis examines how time-resolved CMOS SPAD based line sensors with per pixel timing circuits can be utilized to advance biophotonic applications. The study focuses on improving the existing techniques of fluorescence and Raman spectroscopy, and demonstrates for the first time CMOS SPAD based detection in optical coherence tomography (OCT). A novel detection scheme is proposed combining low-coherence interferometry and time-resolved photon counting. In this approach the interferometric information is revealed from spectral intensity measurements, which is supplemented by time-stamping of the photons building up the spectra.Two CMOS SPAD line sensors (Ra-I and its improved version, Ra-II) were characterized and the effect of their parameters on the selected techniques was analysed. The thesis demonstrates the deployment of the Ra-I line sensor in time-resolved fluorescence spectroscopy with indications of the applicability in time-resolved Raman spectroscopy. The work includes integration of the sensor with surrounding electrical and optical systems, and the implementation of firmware and software for controlling the optical setup. As a result, a versatile platform is demonstrated capable of micro- and millisecond sampling of spectral fluorescence lifetime changes in a single transient of fast chemical reactions.OCT operating in the spectral domain traditionally uses CMOS photodiode and charge-coupled device (CCD) based detectors. The applicability of CMOS SPAD sensors is investigated for the first time with focus on the main limitations and related challenges. Finally, a new detection method is proposed relying on both the wave and particle nature of light, recording time-resolved interferometric spectra from a Michelson interferometer. This method offers an alternative approach to analyse luminous effects and improves techniques based on the light’s time of flight. As an example, a proof of concept study is presented for the removal of unwanted reflections from along the sample and the optical path in an OCT setup

デルタシグマ時間デジタイザ回路の位相ノイズ測定・生成に関する研究

修士論

時間信号測定回路の研究

修士論

Design and implementation of a modular controller for robotic machines

This research focused on the design and implementation of an Intelligent Modular Controller (IMC) architecture designed to be reconfigurable over a robust network. The design incorporates novel communication, hardware, and software architectures. This was motivated by current industrial needs for distributed control systems due to growing demand for less complexity, more processing power, flexibility, and greater fault tolerance. To this end, three main contributions were made. Most distributed control architectures depend on multi-tier heterogeneous communication networks requiring linking devices and/or complex middleware. In this study, first, a communication architecture was proposed and implemented with a homogenous network employing the ubiquitous Ethernet for both real-time and non real-time communication. This was achieved by a producer-consumer coordination model for real-time data communication over a segmented network, and a client-server model for point-to-point transactions. The protocols deployed use a Time-Triggered (TT) approach to schedule real-time tasks on the network. Unlike other TT approaches, the scheduling mechanism does not need to be configured explicitly when controller nodes are added or removed. An implicit clock synchronization technique was also developed to complement the architecture. Second, a reconfigurable mechanism based on an auto-configuration protocol was developed. Modules on the network use this protocol to automatically detect themselves, establish communication, and negotiate for a desired configuration. Third, the research demonstrated hardware/software co-design as a contribution to the growing discipline of mechatronics. The IMC consists of a motion controller board designed and prototyped in-house, and a Java microcontroller. An IMC is mapped to each machine/robot axis, and an additional IMC can be configured to serve as a real-time coordinator. The entire architecture was implemented in Java, thus reinforcing uniformity, simplicity, modularity, and openness. Evaluation results showed the potential of the flexible controller to meet medium to high performance machining requirements

Man-Computer Interactive Data Access System (McIDAS). Continued development of McIDAS and operation in the GARP Atlantic tropical experiment

The complete output of the Synchronous Meteorological Satellite was recorded on one inch magnetic tape. A quality control subsystem tests cloud track vectors against four sets of criteria: (1) rejection if best match occurs on correlation boundary; (2) rejection if major correlation peak is not distinct and significantly greater than secondary peak; (3) rejection if correlation is not persistent; and (4) rejection if acceleration is too great. A cloud height program determines cloud optical thickness from visible data and computer infrared emissivity. From infrared data and temperature profile, cloud height is determined. A functional description and electronic schematics of equipment are given

Low Latency Rendering with Dataflow Architectures

The research presented in this thesis concerns latency in VR and synthetic environments. Latency is the end-to-end delay experienced by the user of an interactive computer system, between their physical actions and the perceived response to these actions. Latency is a product of the various processing, transport and buffering delays present in any current computer system. For many computer mediated applications, latency can be distracting, but it is not critical to the utility of the application. Synthetic environments on the other hand attempt to facilitate direct interaction with a digitised world. Direct interaction here implies the formation of a sensorimotor loop between the user and the digitised world - that is, the user makes predictions about how their actions affect the world, and see these predictions realised. By facilitating the formation of the this loop, the synthetic environment allows users to directly sense the digitised world, rather than the interface, and induce perceptions, such as that of the digital world existing as a distinct physical place. This has many applications for knowledge transfer and efficient interaction through the use of enhanced communication cues. The complication is, the formation of the sensorimotor loop that underpins this is highly dependent on the fidelity of the virtual stimuli, including latency. The main research questions we ask are how can the characteristics of dataflow computing be leveraged to improve the temporal fidelity of the visual stimuli, and what implications does this have on other aspects of the fidelity. Secondarily, we ask what effects latency itself has on user interaction. We test the effects of latency on physical interaction at levels previously hypothesized but unexplored. We also test for a previously unconsidered effect of latency on higher level cognitive functions. To do this, we create prototype image generators for interactive systems and virtual reality, using dataflow computing platforms. We integrate these into real interactive systems to gain practical experience of how the real perceptible benefits of alternative rendering approaches, but also what implications are when they are subject to the constraints of real systems. We quantify the differences of our systems compared with traditional systems using latency and objective image fidelity measures. We use our novel systems to perform user studies into the effects of latency. Our high performance apparatuses allow experimentation at latencies lower than previously tested in comparable studies. The low latency apparatuses are designed to minimise what is currently the largest delay in traditional rendering pipelines and we find that the approach is successful in this respect. Our 3D low latency apparatus achieves lower latencies and higher fidelities than traditional systems. The conditions under which it can do this are highly constrained however. We do not foresee dataflow computing shouldering the bulk of the rendering workload in the future but rather facilitating the augmentation of the traditional pipeline with a very high speed local loop. This may be an image distortion stage or otherwise. Our latency experiments revealed that many predictions about the effects of low latency should be re-evaluated and experimenting in this range requires great care

Research and technology

As the NASA center responsible for assembly, checkout, servicing, launch, recovery, and operational support of Space Transportation System elements and payloads, Kennedy Space Center (KSC) is placing increasing emphasis on KSC's research and technology program. In addition to strengthening those areas of engineering and operations technology that contribute to safer, more efficient, and more economical execution of the current mission, the technological tools needed to execute KSC's mission relative to future programs are being developed. The Engineering Development Directorate encompasses most of the laboratories and other KSC resources that are key elements of research and technology program implementation and is responsible for implementation of the majority of the projects in this KSC 1990 annual report. Projects under the following topics are covered: (1) materials science; (2) hazardous emissions and contamination monitoring; (3) biosciences; (4) autonomous systems; (5) communications and control; (6) meteorology; (7) technology utilization; and (8) mechanics, structures, and cryogenics

NASA Tech Briefs, March 1995

This issue contains articles with a special focus on Computer-Aided design and engineering amd a research report on the Ames Research Center. Other subjects in this issue are: Electronic Components and Circuits, Electronic Systems, Physical Sciences, Materials, Computer Programs, Mechanics, Machinery, Manufacturing/Fabrication, Mathematics and Information Sciences and Life Science