EMC in Power Electronics and PCB Design

This dissertation consists of two parts. Part I is about Electromagnetic Compatibility (EMC) in power electronics and part II is about the Maximum Radiated Electromagnetic Emissions Calculator (MREMC), which is a software tool for EMC in printed circuit board (PCB) design. Switched-mode power converters can be significant sources of electromagnetic fields that interfere with the proper operation of nearby circuits or distant radio receivers. Part I of this dissertation provides comprehensive and organized information on the latest EMC developments in power converters. It describes and evaluates different technologies to ensure that power converters meet electromagnetic compatibility requirements. Chapters 2 and 3 describe EMC noise sources and coupling mechanisms in power converters. Chapter 4 reviews the measurements used to characterize and troubleshoot EMC problems. Chapters 5 - 8 cover passive filter solutions, active filter solutions, noise cancellation methods and reduced-noise driving schemes. Part II describes the methods used, calculations made, and implementation details of the MREMC, which is a software tool that allows the user to calculate the maximum possible radiated emissions that could occur due to specific source geometries on a PCB. Chapters 9 - 13 covers the I/O coupling EMI algorithm, Common-mode EMI algorithm, Power Bus EMI algorithm and Differential-Mode EMI algorithm used in the MREMC

High Power and High Frequency Class-DE Inverters

This thesis investigates the various aspects of the theory. design and construction of a Class-DE type inverter and how these affect the power and frequency limits over which a Class-DE inverter can feasibly be used to produce AC (or RF) power. To this extent. an analysis of Class-DE operation in a half-bridge inverter is performed. A similar approach to Hamill [61 is adopted but a different time reference was used. This allows the concept of a conduction angle to b1: introduced and hence enables a more intuitive understanding of the. equations thereafter. Equations to calculate circuit element values LCR ne1wor'k are developed. The amount above the resonant frequency of the LCR network that the switching frequency must be in order to obtain the correct phase lag of the load current is shown. The effect of a non-linear output capacitance is studied, and equations are modified lo take this effect into account. It was found that a Class-DE topology offers a theoretical power advantage over a Clalls-E topology. However, this power advantage decreases with increasing frequency and is dependent on the output capacitance of the active switching devices. Using currently available MOSFETs, a Class-OE topology has a theoretical power advantage over a Class-E topology up to approximately 10MHz. However, the prac1ical problems of implementing a Class-DE invener lO work into the HF band are formidable. These practical problems and the extent to which they ltml! !he operating frequency and power of a Class-DE type inverter are investigated Guidelines to solving these practical problems are discussed and some novel soluuons are developed that considerably extend the feasible operating frequency and power of a Class-DE inverter. These solutions enabled a brc,adband design of the control circuitry. communication-link and gate-drive to be developed. Using these des[gns, a prototype broadband half-bridge inverter was developed which was capable of switching from 50k.Hz through to 6MHz. When operated in the Class-DE mode, the inverter was found to be capable of delivering a power output of over J kW from SOk.l-lz to 5Mllz with an efficiency of over 91 %. The waveforms obtained from the inverter clearly show Class-OE operation. The results of this thesis prove that a Class-DE series resonant inverter can produce. RF power up to a frequency of 5MHz with a higher combination of power and efficiency than any other present topology. The pracucal problems of even higher operaun& frequencies are discussed and some possible solutions suggested. The mismatched load tolerance of a Class-DE type inverter is briefly investigated. A Class-DE Lype inverter could be used for any applications requiring RF power in the HF band, such as AM or SW rransmirters, induction neating and plasma generators. The information presented in this thesis will be useful 10 designers wishing lo implement such an impeller. In add1non a Class-DE inverter could form the first stage of a highly efficient and high frequency DC-DC converter and the 1nformat1on presented here is directly applicable to such an applicatio

Optimisation of High Reliability Integrated Motor Drives

The development of integrated motor drives (IMDs) with high volumetric power density and reliability are crucial for the continued development and adoption of electric vehicles (EV). The development of the wide bandgap (WBG) devices, especially Silicon Carbide (SiC) MOSFETs, enables new possibilities for traction drive systems. However, to maximise the benefits of SiC, the IMD design process, including passive component selection, control and thermal management should be optimised. This thesis goes through the initial major design steps in SiC power system design, from SiC device analysis and modelling to circuit design and electrothermal simulation of an IMD system. A novel approach to discrete SiC MOSFET selection, using a method of calculating performance based on experimental data, is described. Dynamic behaviour of a family of 1200 V MOSFETs is studied at temperatures up to 175 °C using a double pulse test to show the combined effect of the differences in internal design between MOSFETs with different current ratings. It is observed that the 30 mΩ MOSFET had a 24 % higher switching loss than a 140 mΩ at a 30 A load current. The study then goes on to compare the effect of switching frequency, paralleling of MOSFETs and the device type used to demonstrate the inverter design with the lowest power losses, which will equate to low temperatures and high lifetime. The novel methodology can find the optimal choice of MOSFET from the family, and number required through paralleling, for a circuit when given the load current, temperature and switching. Understanding the device interdependencies in a single family is utilised to also predict the relative performance between SiC MOSFETs from different manufacturers. An axial-flux permanent magnet synchronous motor (PMSM) driven by a three-phase SiC inverter is simulated in PLECS using experimentally validated MOSFET models chosen by the device selection methodology. Electrothermal analysis shows the influence of switching frequency, temperature, MOSFETs paralleling and DC-link capacitance on voltage ripple, total harmonic distortion, efficiency and MOSFET loss and temperature profiles. With a 60 % decrease in THD and 50 % increase in maximum MOSFET junction temperature when switching frequency is increased from 10 to 100 kHz. The high-temperature stress on the semiconductors due to close proximity with the ma- chine stator means reliability is an important consideration that is yet to be fully investigated in IMD optimisations. This study uses a lifetime model specific to the transistor package TO-247 in reliability optimisation for IMD for the first time. It requires detailed MOSFET simulation outputs to provide a highly accurate lifetime for discrete SiC MOSFETs. Both single and multi-objective optimisations of the volume and lifetime of the three- phase inverter are presented. The single objective optimisation demonstrates the minimum volume and the corresponding switching frequency and lifetime when between three and six MOSFETs are paralleled at a temperature range between 50 and 150 °C. Design constraints were set limiting the feasible switching frequency range to between 13 kHz because of THD and 118 kHz because of efficiency limits, corresponding to required DC-link capacitors of 520 and 55 μF respectively. Increases in temperature were found to further limit the maximum switching frequency and therefore increase the minimum volume of the inverter. A Pareto front identifies a range of possible solutions for the volume and lifetime of an inverter with six paralleled MOSFETs through the multi-objective objective procedure. Further analysis of these possible solutions identified a single optimal solution for the system, using a DC-link capacitance of 190 μF at 45 kHz, giving a combined volume of the capacitor and MOSFETs of 440 cm3 and a lifetime of 12,000 hours. Finally, the electrothermal analysis of a dual inverter driving a symmetric six-phase PMSM is presented with the benefits of modular multi-phase systems in IMDs summarised. Effect on performance of lower per-phase current, interleaving strategies and fault tolerance are analysed and compared to equivalent three-phase systems, for 60 kW and 120 kW operation. A novel method for lifetime prediction of systems with paralleled MOSFETs or fault tolerance capabilities considering incremental damage is developed based on TO-247 lifetime calculations from PLECS simulation, and component-level reliability profiles using Monte Carlo analysis. The dual inverter is used to model the system and implements control schemes for both single-phase and single inverter failure while maintaining the 4000 rpm and 140 Nm speed and torque requirements. A twofold increase in B10 lifetime of is observed when the effect of paralleled SiC MOSFETs prevents immediate system failure in a three-phase inverter. A computational fluid dynamics (CFD) and 3D finite element thermal model are designed to study the inverter behaviour based on the thermal analysis of its shared cooling plate with a 300 mm diameter axial flux PMSM. Concentric layout designs minimise the variation of junction temperatures to 5 °C and the effect of the flow rate and temperature of the coolant in the PMSM cold plate is presented between 5 and 30 l/min. The multi-objective optimisation procedure used to compare the dual inverter demonstrated it outperformed the three-phase inverter with 15 % smaller required DC-link capacitance, higher efficiency and increased lifetime in part due to its fault-tolerant nature. The optimal dual inverter considering the design constraints consists of four 40 μF KEMET film capacitors operating with a switching frequency of 46 kHz giving an inverter volume of 300 cm3 and a lifetime of 16.3 years, assuming 1000 hours of operation annually

Resonant Behaviour of Pulse Generators for the Efficient Drive of Optical Radiation Sources Based on Dielectric Barrier Discharges

Dielectric barrier discharge (DBD) excimer lamps emit vacuum-UV optical radiation. This work presents novel methods for efficiently operating DBDs with short, high-voltage pulses. Transformer-less systems utilising SiC power semiconductor switches are presented. Pulse frequencies of up to 3.1 MHz and peak inverter efficiencies of 92 % were achieved. The work encloses both mathematical backgrounds of pulsed resonant circuits and practical implementation of low-inductive power stages

RF CMOS Transmitter Front-end with Output Power Combiner

In this thesis strategies to achieve a high efficiency RF front-end are studied and presented. A high efficiency Power Amplifier is also proposed and simulated. The applications for this type of designs are vast, but the main ones are in mobile transmission devices where the only power supply source available is a battery. In order to perform this thesis several topologies of power amplifiers were studied, and the decision fell to those based on a switching behavior. The reason for this decision was the need for high efficiency (it’s one of the main objectives). The Class-D power amplifier with its ideal potential efficiency of 100% has proven the most promising for implementation. The objectives for this thesis in terms of implementation were an efficiency of 20% and an output power of 0dBm. Finally, a power-combining technique was used to explore the potential of achieving high output power without affecting the efficiency