1,565 research outputs found

    Robust Circuit & Architecture Design in the Nanoscale Regime

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    Silicon based integrated circuit (IC) technology is approaching its physical limits. For sub 10nm technology nodes, the carbon nanotube (CNT) based field effect transistor has emerged as a promising device because of its excellent electronic properties. One of the major challenges faced by the CNT technology is the unwanted growth of metallic tubes. At present, there is no known CNT fabrication technology which allows the fabrication of 100% semiconducting CNTs. The presence of metallic tubes creates a short between the drain and source terminals of the transistor and has a detrimental impact on the delay, static power and yield of CNT based gates. This thesis will address the challenge of designing robust carbon nanotube based circuits in the presence of metallic tubes. For a small percentage of metallic tubes, circuit level solutions are proposed to increase the functional yield of CNT based gates in the presence of metallic tubes. Accurate analytical models with less than a 3% inaccuracy rate are developed to estimate the yield of CNT based circuit for a different percentage of metallic tubes and different drive strengths of logic gates. Moreover, a design methodology is developed for yield-aware carbon nanotube based circuits in the presence of metallic tubes using different CNFET transistor configurations. Architecture based on regular logic bricks with underlying hybrid CNFET configurations are developed which gives better trade-offs in terms of performance, power, and functional yield. In the case when the percentage of metallic tubes is large, the proposed circuit level techniques are not sufficient. Extra processing techniques must be applied to remove the metallic tubes. The tube removal techniques have trade-offs, as the removal process is not perfect and removes semiconducting tubes in addition to removing unwanted metallic tubes. As a result, stochastic removal of tubes from the drive and fanout gate(s) results in large variation in the performance of CNFET based gates and in the worst case open circuit gates. A Monte Carlo simulation engine is developed to estimate the impact of the removal of tubes on the performance and power of CNFET based logic gates. For a quick estimation of functional yield of logic gates, accurate analytical models are developed to estimate the functional yield of logic gates when a fraction of the tubes are removed. An efficient tube level redundancy (TLR) is proposed, resulting in a high functional yield of carbon nanotube based circuits with minimal overheads in terms of area and power when large fraction of tubes are removed. Furthermore, for applications where parallelism can be utilized we propose to increase the functional yield of the CNFET based circuits by increasing the logic depth of gates

    Computational design of chemical nanosensors: Transition metal doped single-walled carbon nanotubes

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    We present a general approach to the computational design of nanostructured chemical sensors. The scheme is based on identification and calculation of microscopic descriptors (design parameters) which are used as input to a thermodynamic model to obtain the relevant macroscopic properties. In particular, we consider the functionalization of a (6,6) metallic armchair single-walled carbon nanotube (SWNT) by nine different 3d transition metal (TM) atoms occupying three types of vacancies. For six gas molecules (N_{2}, O_{2}, H_{2}O, CO, NH_{3}, H_{2}S) we calculate the binding energy and change in conductance due to adsorption on each of the 27 TM sites. For a given type of TM functionalization, this allows us to obtain the equilibrium coverage and change in conductance as a function of the partial pressure of the "target" molecule in a background of atmospheric air. Specifically, we show how Ni and Cu doped metallic (6,6) SWNTs may work as effective multifunctional sensors for both CO and NH_{3}. In this way, the scheme presented allows one to obtain macroscopic device characteristics and performance data for nanoscale (in this case SWNT) based devices.Comment: Chapter 7 in "Chemical Sensors: Simulation and Modeling", Ghenadii Korotcenkov (ed.), 47 pages, 22 figures, 10 table

    The role of contacts in molecular electronics

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    Molecular electronic devices are the upmost destiny of the miniaturization trend of electronic components. Although not yet reproducible on large scale, molecular devices are since recently subject of intense studies both experimentally and theoretically, which agree in pointing out the extreme sensitivity of such devices on the nature and quality of the contacts. This chapter intends to provide a general theoretical framework for modelling electronic transport at the molecular scale by describing the implementation of a hybrid method based on Green function theory and density functional algorithms. In order to show the presence of contact-dependent features in the molecular conductance, we discuss three archetypal molecular devices, which are intended to focus on the importance of the different sub-parts of a molecular two-terminal setup.Comment: 17 pages, 8 figure

    Determination of key device parameters for short- and long-channel Schottky-type carbon nanotube field-effect transistors

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    The Schottky barrier, contact resistance and carrier mobility in carbon nanotube (CNT) field-effect transistors (FETs) are discussed in detail in this thesis. Novel extraction methods and definitions are proposed for these parameters. A technology comparison with other emerging transistor technologies and a performance projection study are also presented. A Schottky barrier height extraction method for CNTFETs considering one-dimensional (1D) conditions is developed. The methodology is applied to simulation and experimental data of CNTFETs feasible for manufacturing. Y-function-based methods (YFMs) have been applied to simulation and experimental data in order to extract a contact resistance for CNTFETs. Both extraction methods are more efficient and accurate than other conventional approaches. Practical mobility expressions are derived for CNTFETs covering the ballistic as well as the non-ballistic transport regime which enable a straightforward evaluation of the transport in CNTs. They have been applied to simulation and experimental data of devices with different channel lengths and Schottky barrier heights. A comparison of fabricated emerging transistors based on similar criteria for various application scenarios reveals CNTFETs as promising candidates to compete with Si-based technologies in low-power static and dynamic applications. A performance projection study is suggested for specific applications in terms of the studied design parameters

    Sensing abilities of embedded vertically aligned carbon nanotube forests in structural composites: From nanoscale properties to mesoscale functionalities

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    In this paper, Vertically Aligned Carbon Nanotube (VACNT) forests are embedded into two different glass fibre/epoxy composite systems to study their sensing abilities to strain and temperature. Through a bottom-up approach, performing studies of the VACNT forest and its individual carbon nanotubes on the nano-, micro-, and mesoscale, the observed thermoresistive effect is determined to be due to fluctuation-assisted tunnelling, and the linear piezoresistive effect due to the intrinsic piezoresistivity of individual carbon nanotubes. The VACNT forests offer great freedom of placement into the structure and reproducibility of sensing sensitivity in both composite systems, independent of conductivity and volume fraction, producing a robust sensor to strain and temperature

    Variability and reliability analysis of carbon nanotube technology in the presence of manufacturing imperfections

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    In 1925, Lilienfeld patented the basic principle of field effect transistor (FET). Thirty-four years later, Kahng and Atalla invented the MOSFET. Since that time, it has become the most widely used type of transistor in Integrated Circuits (ICs) and then the most important device in the electronics industry. Progress in the field for at least the last 40 years has followed an exponential behavior in accordance with Moore¿s Law. That is, in order to achieve higher densities and performance at lower power consumption, MOS devices have been scaled down. But this aggressive scaling down of the physical dimensions of MOSFETs has required the introduction of a wide variety of innovative factors to ensure that they could still be properly manufactured. Transistors have expe- rienced an amazing journey in the last 10 years starting with strained channel CMOS transistors at 90nm, carrying on the introduction of the high-k/metal-gate silicon CMOS transistors at 45nm until the use of the multiple-gate transistor architectures at 22nm and at recently achieved 14nm technology node. But, what technology will be able to produce sub-10nm transistors? Different novel materials and devices are being investigated. As an extension and enhancement to current MOSFETs some promising devices are n-type III-V and p-type Germanium FETs, Nanowire and Tunnel FETs, Graphene FETs and Carbon Nanotube FETs. Also, non-conventional FETs and other charge-based information carrier devices and alternative information processing devices are being studied. This thesis is focused on carbon nanotube technology as a possible option for sub-10nm transistors. In recent years, carbon nanotubes (CNTs) have been attracting considerable attention in the field of nanotechnology. They are considered to be a promising substitute for silicon channel because of their small size, unusual geometry (1D structure), and extraordinary electronic properties, including excellent carrier mobility and quasi-ballistic transport. In the same way, carbon nanotube field-effect transistors (CNFETs) could be potential substitutes for MOSFETs. Ideal CNFETs (meaning all CNTs in the transistor behave as semiconductors, have the same diameter and doping level, and are aligned and well-positioned) are predicted to be 5x faster than silicon CMOS, while consuming the same power. However, nowadays CNFETs are also affected by manufacturing variability, and several significant challenges must be overcome before these benefits can be achieved. Certain CNFET manufacturing imperfections, such as CNT diameter and doping variations, mispositioned and misaligned CNTs, high metal-CNT contact resistance, the presence of metallic CNTs (m-CNTs), and CNT density variations, can affect CNFET performance and reliability and must be addressed. The main objective of this thesis is to analyze the impact of the current CNFET manufacturing challenges on multi-channel CNFET performance from the point of view of variability and reliability and at different levels, device and circuit level. Assuming that CNFETs are not ideal or non-homogeneous because of today CNFET manufacturing imperfections, we propose a methodology of analysis that based on a CNFET ideal compact model is able to simulate heterogeneous or non-ideal CNFETs; that is, transistors with different number of tubes that have different diameters, are not uniformly spaced, have different source/drain doping levels, and, most importantly, are made up not only of semiconducting CNTs but also metallic ones. This method will allow us to analyze how CNT-specific variations affect CNFET device characteristics and parameters and CNFET digital circuit performance. Furthermore, we also derive a CNFET failure model and propose an alternative technique based on fault-tolerant architectures to deal with the presence of m-CNTs, one of the main causes of failure in CNFET circuits

    Low-Dimensional Materials for Disruptive Microwave Antennas Design

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    This chapter is devoted to a complete analysis of remarkable electromagnetic properties of nanomaterials suitable for antenna design miniaturization. After a review of state of the art mesoscopic scale modeling tools and characterization techniques in microwave domain, new approaches based on wideband material parameters identification (complex permittivity and conductivity) will be described from impedance equivalence formulation achievement by de-embedding techniques applicable in integrated technology or in free space. A focus on performances of 1D materials such as vertically aligned multi-wall carbon nanotube (VA-MWCNT) bundles, from theory to technology, will be presented as a disruptive demonstration for defense and civil applications as in radar systems
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