Model order reduction for delay systems by iterative interpolation

AbstractAdaptive algorithms for computing the reduced‐order model of time‐delay systems (TDSs) are proposed in this work. The algorithms are based on interpolating the transfer function at multiple expansion points and greedy iterations for selecting the expansion points. The ‐error of the reduced transfer function is used as the criterion for choosing the next new expansion point. One heuristic greedy algorithm and one algorithm based on the error system and adaptive sub‐interval selection are developed. Results on four TDSs with tens of delays from electromagnetic applications are presented and show the efficiency of the proposed algorithms

Accurate estimating simultaneous switching noises by using application specific device modeling

Abstract In this paper, we study the simultaneous switching noise problem by using an application-specific modeling method.

Analysis and mitigation of parallel-plate noise for high-isolation applications

Achieving highs levels of isolation between different functionalities in a PCB can be challenging. One of the major issues is that vertically adjacent planes or area fills in a PCB can form a parallel-plate waveguide with no cutoff frequency and serve as an efficient coupling mechanism between interconnects. Due to the finite size of the conductors, reflections off the edges of these parallel-plate cavities can result in the formation of standing-wave patterns with very high field strengths, resulting in high coupling at certain frequencies. This noise coupling mechanism can be suppressed by connecting the parallel plates together with an adequate amount of vias. However, adjacent power and ground conductors can not be conductively connected together because they are at different DC potentials. As a result, there is no way to eliminate the existence of parallel-plate noise in a power/ground cavity. A fundamental understanding of this problem is needed to determine how it can be mitigated. The first part of the thesis develops a qualitative understanding of the underlying physics of how noise is coupled to the parallel plates from a variety of interconnects and how the noise can spread throughout the design. This discussion is then expanded to more complex geometries that are representative of what could occur in actual designs. Test vehicles are created to study the noise coupling to various interconnects from noise injected into the power distribution network by an amplifier. Parameters affecting the transfer of noise from an amplifier to the power distribution network, such as the addition of capacitors, are then explored. An expression to predict the noise coupling using S-parameter measurements of the PCB and the amplifier is developed. It is demonstrated that results from full-wave electromagnetic simulation can be used to predict the amount of noise coupling before PCB fabrication. General design recommendations are then presented to improve design robustness to the parallel-plate noise --Abstract, page iii

Técnicas de reducción del ruido de conmutación en circuitos integrados CMOS

El ruido de conmutación generado por los circuitos digitales representa un problema importante que a menudolimita las prestaciones de los circuitos integradosdigitales y mixtos. éste ruido de conmutación estápresente en los terminales de alimentación internos delos circuitos y es debido a la inductancia parásita quepresentan los terminales y conductores del encapsulado.Estos componentes inductivos transforman en ruido detensión la derivada temporal de los pulsos de corrientedemandados por la lógica al conmutar. Al estar presenteen los terminales de alimentación puede afectar acualquier zona del circuito. Además, dado que losterminales de alimentación se utilizan para polarizar elsubstrato o el pozo de los CI semiconductores el ruido esinyectado en dicho substrato y puede propagarse por él,afectando incluso a circuitos que no comparten la mismaalimentación que los circuitos digitales generadores delruido.En los últimos años se han propuesto diferentesalternativas para solucionar este problema, la mayoría deellas centradas en dos aspectos. El primero de ellosconsiste en introducir condensadores de desacoplo dentrodel encapsulado y/o reducir el valor de la inductanciadel encapsulado a base de incrementar el número determinales dedicados a alimentaciones o a base deutilizar técnicas de encapsulado avanzadas. El segundo secentra en el diseño de circuitos de salida que generenbajos niveles de ruido, pues los condensadores internosde desacoplo no reducen el ruido generado por estoscircuitos. En este trabajo de tesis se analizan todasestas técnicas y se realiza un estudio más detallado delruido generado internamente. Se proponen técnicas dereducción del ruido de conmutación en todos los aspectos:distribución de la alimentación, diseño lógico y diseñode los circuitos de salida de los CI CMOS, y se presentanresultados experimentales medidos sobre prototiposfabricados qu

Técnicas de reducción del ruido de conmutación en circuitos integrados CMOS

El ruido de conmutación generado por los circuitos digitales representa un problema importante que a menudolimita las prestaciones de los circuitos integradosdigitales y mixtos. éste ruido de conmutación estápresente en los terminales de alimentación internos delos circuitos y es debido a la inductancia parásita quepresentan los terminales y conductores del encapsulado.Estos componentes inductivos transforman en ruido detensión la derivada temporal de los pulsos de corrientedemandados por la lógica al conmutar. Al estar presenteen los terminales de alimentación puede afectar acualquier zona del circuito. Además, dado que losterminales de alimentación se utilizan para polarizar elsubstrato o el pozo de los CI semiconductores el ruido esinyectado en dicho substrato y puede propagarse por él,afectando incluso a circuitos que no comparten la mismaalimentación que los circuitos digitales generadores delruido.En los últimos años se han propuesto diferentesalternativas para solucionar este problema, la mayoría deellas centradas en dos aspectos. El primero de ellosconsiste en introducir condensadores de desacoplo dentrodel encapsulado y/o reducir el valor de la inductanciadel encapsulado a base de incrementar el número determinales dedicados a alimentaciones o a base deutilizar técnicas de encapsulado avanzadas. El segundo secentra en el diseño de circuitos de salida que generenbajos niveles de ruido, pues los condensadores internosde desacoplo no reducen el ruido generado por estoscircuitos. En este trabajo de tesis se analizan todasestas técnicas y se realiza un estudio más detallado delruido generado internamente. Se proponen técnicas dereducción del ruido de conmutación en todos los aspectos:distribución de la alimentación, diseño lógico y diseñode los circuitos de salida de los CI CMOS, y se presentanresultados experimentales medidos sobre prototiposfabricados quePostprint (published version

Design of high frequency operating mechatronic systems : tools and methods of characterization of electromagnetic couplings between electromechanic converters and power electronics converters

From the more electrically operated aircraft, to the hybridization of motor vehicles, all the way to electromechanic cardiac implants, compactness has become the holy grail of modern embedded electrical engineering. Indeed, the power-to-weight ratio demands for electromechanical systems has greatly increased. To meet these high integration needs, power electronic converters find a vector of development by increasing their temperature and operating frequencies but also by reducing the switching time of power switches, thus enabling them to reduce their power losses and thereby reducing their cooling requirements. Electric motors and generators operate with various innovative topologies that meet integration, robustness and reliability needs. Motor windings, particularly, are the first motor components on the battle front. It is at the heart of the winding that occur the exchanges between motor and converter. In terms of electromagnetic compatibility (EMC) for embedded systems, the increased frequency and transient stresses in the form of current and voltage edges from the power electronic assemblies are considered steep challenges. The work presented herein is the result of a close cooperation between the company Novatem and the laboratory Génie de Production of ENIT de Tarbes, through CIFRE funding, in combination with the Labceem platform of IUT of Tarbes. Its aim is to develop predictive models that will serve to determine the consequences of such integration constraints in power mechatronic systems that are in the early stages of design. Conducted disturbances whose HF source is located at the inverter power switches are shaped by the impedances characterizing the coupling path of which the electrical machine is an integral part. This work proposes to develop methods and tools to support the predictive study of electromagnetic compatibility (EMC) of mechatronic assemblies, by attempting to cover a modeling frequency range that goes from 0 to 300 MHz’s. In the first chapter of this work, a literature review is detailed for the definition of the context and boundaries of the study. A second chapter focuses on the analytical modeling of concentrated windings in electric motors. The analytical models that are established allow determination of circuit networks settings to perform time- and frequency- domain simulations. Unlike the widespread behavioral models of electrical machine in the literature, the models that are synthesized here take into account the physical parameters of the coils. The user of such models is offered the opportunity to account for the different winding architectures, by changing core parameters such as geometry, insulation materials or permeability. A third chapter describes the establishment of a rational method for extraction of functional and parasitic parameters in multilayer Power PCBs. This method being of a generic and predictive logic aims to account for physical parameters. Finally, in the last chapter, the previously established tools and methods are applied to the study of a real electric vehicle drive system developed by the company Novatem. The physical and predictive value of these tools allows for execution of virtual experimentations on the motorconverter assembly without the need for prototypes. This chapter illustrates the value of a physical approach to modeling the electromagnetic compatibility of mechatronic systems