Silicon carbide power devices

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Simulation study of silicon carbide Clustered Insulated Gate Bipolar Transistor (CIGBT)

Power semiconductor devices are inevitable parts of a power electronic converter system, with nearly 50% of electricity used in the world controlled by them. Silicon power devices have been used in power systems ever since the vacuum tubes were replaced by them in the 1950s. The performance of devices in a circuit is decided by the switching strategies and the inherent device performance like its on-state voltage, turn-on and turn-off times and hence their losses. Due to their inherent material properties, the growing interest in wide band gap devices is in applications beyond the limits of Si or GaAs. SiC is a wide bandgap material with properties that make it an attractive alternative to Silicon for high power applications. Silicon Insulated Gate Bipolar Transistor (IGBT) is the most favourable device in the industry today for medium/high power applications. Silicon Clustered Insulated Gate Bipolar Transistor (CIGBT) is experimentally proven to demonstrate better performance as compared to their IGBT counterparts. In this work, the theoretical limit of silicon CIGBT is studied in great detail and compared to previously predicted IGBT limit. Later part of this thesis would explain the design and optimization of CIGBT in 4H- SiC. An in-depth simulation study of the same device is performed for both static and dynamic characteristics. Both planar and trench gate CIGBT devices are discussed here along with possible fabrication process. Along with this, a comparison study between CIGBT with its equivalent IGBT in SiC is also performed through extensive 2D simulations in MEDICITM in terms of their static and dynamic characteristics. Finally, a comparative study of P channel and N channel SiC CIGBT devices is evaluated through simulations

Novel Developments and Challenges for the SiC Power Devices

Silicon Carbide (SiC) is believed to be a revolutionary semiconductor material for power devices of the future; many SiC power devices have emerged as superior alternative power switch technology, especially in harsh environments with high temperature or high electric field. In this chapter, the challenges and recent developments of SiC power devices are discussed. The first part is focused on SiC power diodes including SiC Schottky barrier diode (SBD), SiC PiN diodes (PiN,) SiC junction/Schottky diodes (JBS), then SiC UMOSFETs, DMOSFETs and several MESFETs are introduced, and the third part is about SiC bipolar devices such as BJT and IGBT. Finally, the challenges during the development of SiC power devices, especially about its material growth and packaging are discussed

Design, Simulation and Analysis of Novel Types of Unipolar Diodes

With the growing demand of low and medium voltage switch-mode power supplies (SMPS) for use in the state-of-the-art integrated circuits, the development of output rectifiers with low forward voltage drop and low reverse leakage current becomes essential. In low voltage SMPS applications (1 to 5 V), the on-state loss of the fast recovery p-i-n diode or the Schottky diode contributes greatly to the total power loss in power supplies. This is due to their forward threshold voltage. One possible way to achieve low on-state losses is to reduce or remove the forward threshold voltage. The first part of this thesis is mainly devoted to a novel Regenerative diode structure based on Silicon material. Its main advantages are reduction or removal of forward threshold voltage and much improved reverse characteristics without the necessity of a gate control like in synchronous rectifiers. The silicon unipolar device application is, however, restricted to relatively low voltages because of on-state and blocking problems at device blocking capabilities above 200 V. For high voltage applications (> 200 V), SiC Schottky or JBS rectifiers have demonstrated a good differential on state resistance and reasonable blocking behavior. In principle, one could try to construct a Regenerative diode like device based on SiC material, but poor hole mobility and much less developed integrated device technology seem to discourage such efforts. However, the second part of this thesis work presents a simulation study on a Si/6H-SiC heterojunction. The p-Si/N-6H-SiC heterojunction diode behaves like a Schottky diode but with much lower threshold voltage than that of the 6H-SiC SBD. Therefore, the heterojunction diode has better on state characteristics than 6H-SiC SBD without sacrificing in blocking

Feature Papers in Electronic Materials Section

This book entitled "Feature Papers in Electronic Materials Section" is a collection of selected papers recently published on the journal Materials, focusing on the latest advances in electronic materials and devices in different fields (e.g., power- and high-frequency electronics, optoelectronic devices, detectors, etc.). In the first part of the book, many articles are dedicated to wide band gap semiconductors (e.g., SiC, GaN, Ga2O3, diamond), focusing on the current relevant materials and devices technology issues. The second part of the book is a miscellaneous of other electronics materials for various applications, including two-dimensional materials for optoelectronic and high-frequency devices. Finally, some recent advances in materials and flexible sensors for bioelectronics and medical applications are presented at the end of the book

High-voltage SiC power devices for improved energy efficiency

Silicon carbide (SiC) power devices significantly outperform the well-established silicon (Si) devices in terms of high breakdown voltage, low power loss, and fast switching. This review briefly introduces the major features of SiC power devices and then presents research works on breakdown phenomena in SiC pn junctions and related discussion which takes into account the energy band structure. Next, recent progress in SiC metal-oxide-semiconductor field effect transistors, which are the most important unipolar devices, is described with an emphasis on the improvement of channel mobility at the SiO2/SiC interface. The development of SiC bipolar devices such as pin diodes and insulated gate bipolar transistors, which are promising for ultrahigh-voltage (>10 kV) applications, are introduced and the effect of carrier lifetime enhancement is demonstrated. The current status of mass production and how SiC power devices can contribute to energy saving are also described

Analysis of the 1st and 3rd Quadrant Transients of Symmetrical and Asymmetrical Double-Trench SiC Power MOSFETs

In this paper, performance at 1 st and 3 rd quadrant operation of Silicon and Silicon Carbide (SiC) symmetrical and asymmetrical double-trench, superjunction and planar power MOSFETs is analysed through a wide range of experimental measurements using compact modeling. The devices are evaluated on a high voltage clamped inductive switching test rig and switched at a range of switching rates at elevated junction temperatures. It is shown, experimentally, that in the 1 st quadrant, CoolSiC (SiC asymmetrical double-trench) MOSFET and SiC symmetrical double-trench MOSFET demonstrate more stable temperature coefficients. Silicon Superjunction MOSFETs exhibits the lowest turn-off switching rates due to the large input capacitance. The evaluated SiC Planar MOSFET also performs sub-optimally at turn-on switching due to its higher input capacitance and shows more temperature sensitivity due to its lower threshold voltage. In the 3 rd quadrant, the relatively larger reverse recovery charge of Silicon Superjunction MOSFET negatively impacts the turn-OFF transients compared with the SiC MOSFETs. It is also seen that among the SiC MOSFETs, the two double-trench MOSFET structures outperform the selected SiC planar MOSFET in terms of reverse recovery

Fabrication and analysis of 4H-SiC diodes

Despite the excellent electrical and thermal properties of 4H-silicon carbide (SiC) and the advancements in the field of 4H-SiC epitaxial growth, the existence of defects in the material can considerably reduce the electrical performance of the SiC power devices. Defects can result in low carrier lifetime affecting the on-state resistance of bipolar devices, such as PiN diodes, and increased leakage current affecting the reverse blocking performance of power devices, such as Schottky diodes. A commonly found surface morphological defect in available 4H-SiC substrates is the triangular defect. In this thesis, the formation mechanism of this defect and its impact on the electrical performance of the fabricated 4H-SiC PiN diodes is discussed. 4H-SiC PiN diodes were intentionally fabricated on the triangular defects and in areas with no visible morphological defects. The devices were then packaged and tested to assess the impact of these defects on the resulting on-state and reverse leakage characteristics. It was shown for the first time the impact of triangular defects on switching characteristics of 4H-SiC PiN diodes fabricated on- and off-defects. Moreover, triangular defects were characterised using methods including AFM, SEM, Photoluminescence and HRTEM. Other complex structures were observed on the triangular defect using HRTEM such as double positioning boundary (DPB), which resulted in a leakage path through the drift region of the devices and increased the leakage current. Furthermore, this thesis focuses on the fabrication and analysis of 4H-SiC power diodes for high voltage applications with particular focus on improving the performance of 4H-SiC SBDs using a novel metal-semiconductor interface treatment and 4H-SiC PiN diodes using high temperature processing techniques to improve the carrier lifetime, on-state resistance and conductivity modulation of the diode. Carrier lifetime enhancement in 4H-SiC PiN diodes in this thesis was achieved using a combined high temperature oxidation and successive argon annealing process at 1550°C for 1 hour. This resulted in an increase of nearly 45% of the reverse recovery current and approximately 40% of the carrier lifetime. The findings of this study could be potentially used for other 4H-SiC bipolar devices such as IGBTs, BJTs and thyristors. This thesis has also investigated the impact of various surface passivation treatments to improve the quality of the 4H-SiC surface and the metal-semiconductor interface using Mo/Ti, and Ni-4H-SiC Schottky diodes. The most significant outcome of this investigation was the performance of P2O5 treated Mo/SiC Schottky diodes which retained a barrier height equivalent to that of titanium, but with a leakage current lower than any Ni diode, seemingly combining the benefits of both a low- and high-SBH metal. Furthermore, P2O5 treated Mo/SiC Schottky diodes were the only diodes to undergo any significant leakage current reduction after any of the pre-treatments exhibiting exceptionally low leakage, even at 300°C. XPS and SIMS analysis on all Mo/SiC SBDs revealed that the stoichiometry of the SiC underneath the contact was enhanced using P2O5 treatment and that traces of P2O5 were found after removal of the passivation layer and post-treatment metallisation. It was also found that the Mo-4HSiC interface on the P2O5 treated sample was very sharp and uniform compared to the untreated sample where Mo-SiC interface looks uneven and cloudy. The developed novel metal-semiconductor interface treatment can be potentially used for MOS interface improvements

Development of a fault tolerant MOS field effect power semiconductor switching transistor

This work describes the development of a semiconductor switch to replace an electromechanical contactor as used within the electrical power distribution system of the More Electric Aircraft (MEA; a project begun in the 1990‟s by the United States Air Force). The MEA is safety critical and therefore requires highest reliability components and systems, but subsequent to a short circuit load fault the electro-mechanical contactor switch often welds shut. This risk is increased when using high discharge energy lithium ion dc batteries. Predominately the semiconductor switch controls inductive loads and is required to safely turn off current of up to 10 times the nominal level during sporadic load fault events. The switch requires the lowest static loss (lowest on state resistance), but also the lowest dynamic loss (losses due to the switching event). Presently, unipolar devices provide the lowest dynamic loss, but bipolar devices provide the lowest static loss. One possible solution is use of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the area of which is sized to suit the fault current, but at relatively high cost in terms of silicon area. The resultant area is typically achieved by several die connected in parallel, unfortunately, such a solution suffers from current share imbalance and the potential of cascade die failure. The use of a parallel combination of unipolar and bipolar device types (MOSFET and Insulated Gate Bipolar Transistors, IGBTs) to form a hybrid appears to offer the potential to reduce the silicon area, and static loss, whilst reducing the impact of the increased dynamic losses of the IGBT. Unfortunately, this goal requires optimised gate timing of the resultant hybrid which proves challenging if the load current is to be shared appropriately during fault switching in order to prevent failure. Some form of single MOS (Metal Oxide Semiconductor) gated integrated hybrid device with self biased bipolar injection is therefore required to ensure highest reliability through a non latching design which offers lowest losses under all conditions and achieves an even temperature distribution. In this work the novel concept of the integrated hybrid device has been investigated at a low Blocking Voltage (BV) rating of 100 V, using computer simulation. The three terminal hybrid silicon DMOS (Double diffused Metal Oxide Semiconductor) device utilises a novel merged Schottky p-type injector to provide self biased entry into a reduced static loss bipolar state in the event of high fault current. The device achieves a specific on state resistance, R(ON,SP) = 1.16 mΩcm2 in bipolar mode (with BV=84 V), that is below the silicon limit line and requires half the area of a traditional unipolar MOSFET to conduct fault current. During comparative standard unclamped inductive switching trials, the hybrid device provides a self clamping action which enables increased inductive energy switching (higher inductance and/or higher load current), relative to that achieved by either the MOSFET or IGBT. The hybrid conducting in bipolar mode switches an inductive load off much faster than that typically achieved by an IGBT (toff =20 ns, in comparison to typically >10 μs for an IGBT). This results in a low turn off energy for the hybrid (1.26*10-4 J/cm2) as compared to that of the IGBT (8.72*10-3 J/cm2). The hybrid dynamic performance is enhanced by the action of the merged Schottky contact which, unlike the IGBT, acts to limit the emitter base voltage (VEB) of the internal PNP Bipolar Junction Transistor, BJT (the integral PNP BJT is otherwise a shared feature with the IGBT). The self biased bipolar activation is achieved at a forward bias (VAK) =1.3 V at temperature (T)= 300 K. The device is latch up free across the operational temperature range of T=233 K to 400 K. A viable charge balanced structure to increase the BV rating to approximately 600 V is also proposed. The resulting performance of the single gated, self biased, hybrid, utilising a novel merged Schottky/P type injector, could lead to a new class of rugged MOS gated power switching devices in silicon and potentially silicon carbide

Reliability analysis of planar and symmetrical & asymmetrical trench discrete SiC Power MOSFETs

Silicon Carbide MOSFETs are shown in research to outperform Silicon counterparts on many performance metrics, including switching rates and power losses. To further improve their performance, trench and double-trench structures have recently been developed. To replace conventional planar SiC MOSFETs, besides the performance parameters which are mostly stated in datasheets, reliability studies under stress are also needed. This thesis presents a comprehensive comparison between 3rd generation trench SiC power MOSFETs, namely symmetrical double-trench and asymmetrical trench with planar SiC power MOSFETs on four aspects of: switching slew rates (dI/dt & dV/dt), crosstalk characteristics, bias temperature instability and power cycling stability.First, the dynamic performance in both 1st quadrant and 3rd quadrant has been eval- uated on the differences in stress by dI/dt & dV/dt and resultant losses. This is key in understanding many other reliability criterions, i.e. severity of crosstalk induced switchings. In the 1st quadrant, the source current and drain-source voltage switching rates at both turn-ON and turn-OFF are measured under a range of test conditions. Both the symmetrical and asymmetrical trench MOSFETs have up to 2 times faster voltage and current slew rates compared with the planar one. They also indicate only slight changes in switching rate with junction temperature. In the 3rd quadrant, the reverse recovery peak current and total reverse recovery charge are measured with respect to junction temper- ature and load current level. Both the symmetrical and asymmetrical trench MOSFETs have less than half of the reverse recovery charge of that of the planar SiC MOSFET.In the evaluation of crosstalk characteristics, peak shoot-through current and induced gate voltage at crosstalk are measured with respect to junction temperature and external gate resistance. With particularly large external gate resistances connected to intentionally induce parasitic turn-ON, the symmetrical double-trench MOSFET is shown to be more prone to crosstalk with 23 A peak shoot-through current measured while it is only 10 A for asymmetrical trench and 4 A for planar MOSFET under similar test conditions. As the temperature increase, the peak shoot-through current drops for the symmetrical double-trench, while constant for the asymmetrical trench and rising for the planar device.Threshold voltage drift is also measured to reflect the degradation happened with bias temperature instability at various junction temperatures, stressing voltages and time periods. Under low-magnitude gate stress (within the range of datasheets) in both positive and negative bias cases, there is more threshold drift observed on the two trench MOSFETs at all junction temperatures than the planar MOSFET. When the stress magnitude is raised, there is less threshold drift observed on the two trench MOSFETs.To evaluate the ruggedness in continuous switchings, the devices are placed under repetitive turn-ON events. The thermal performance under such operation are compared. The asymmetrical trench MOSFET experiences the highest case temperature rise while the least is observed for the planar MOSFET. With an external heatsink equipped to achieve more efficient cooling, the repetitive turn-ON test transforms into the conventional power cycling. In this condition, both the symmetrical and asymmetrical trench MOSFETs fail earlier than the degraded (but not failed) planar MOSFET