659 research outputs found

    RF MEMS reference oscillators platform for wireless communications

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    A complete platform for RF MEMS reference oscillator is built to replace bulky quartz from mobile devices, thus reducing size and cost. The design targets LTE transceivers. A low phase noise 76.8 MHz reference oscillator is designed using material temperature compensated AlN-on-silicon resonator. The thesis proposes a system combining piezoelectric resonator with low loading CMOS cross coupled series resonance oscillator to reach state-of-the-art LTE phase noise specifications. The designed resonator is a two port fundamental width extensional mode resonator. The resonator characterized by high unloaded quality factor in vacuum is designed with low temperature coefficient of frequency (TCF) using as compensation material which enhances the TCF from - 3000 ppm to 105 ppm across temperature ranges of -40˚C to 85˚C. By using a series resonant CMOS oscillator, phase noise of -123 dBc/Hz at 1 kHz, and -162 dBc/Hz at 1MHz offset is achieved. The oscillator’s integrated RMS jitter is 106 fs (10 kHz–20 MHz), consuming 850 μA, with startup time is 250μs, achieving a Figure-of-merit (FOM) of 216 dB. Electronic frequency compensation is presented to further enhance the frequency stability of the oscillator. Initial frequency offset of 8000 ppm and temperature drift errors are combined and further addressed electronically. A simple digital compensation circuitry generates a compensation word as an input to 21 bit MASH 1 -1-1 sigma delta modulator incorporated in RF LTE fractional N-PLL for frequency compensation. Temperature is sensed using low power BJT band-gap front end circuitry with 12 bit temperature to digital converter characterized by a resolution of 0.075˚C. The smart temperature sensor consumes only 4.6 μA. 700 MHz band LTE signal proved to have the stringent phase noise and frequency resolution specifications among all LTE bands. For this band, the achieved jitter value is 1.29 ps and the output frequency stability is 0.5 ppm over temperature ranges from -40˚C to 85˚C. The system is built on 32nm CMOS technology using 1.8V IO device

    Reducing phase noise degradation due to vibration of crystal oscillators

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    In the radio communications industry, one major problem is the vibration induced on to a frequency standard. The most commonly used frequency standard is the crystal oscillator; as the crystal oscillator gets vibrated with varying force and frequencies of vibration the phase noise of the signal changes. As the phase noise increases, the signal to noise ratio decreases causing the likelihood of transmitting or receiving an incorrect signal to rise. This makes it critical to limit the phase noise increase that occurs in the frequency standard of the system. Mechanical isolation systems have been implemented in the industry to limit the system vibration that propagates to the frequency standard. These systems add weight and size to the overall design, which make them not ideal for all applications. For systems that can not use isolators, open loop cancellation has been implemented in past designs. This cancellation measures the vibration and subtracts it from the phase noise, but such a system has drawbacks with changes in vibration frequency and force. A closed loop design is suggested to correct this. In order to maximize performance an IQ modulation feedback system was designed. The feedback system utilizes information about both the vibration and the measured phase noise. It uses these two inputs concurrently to correct the output frequency of the crystal as it changes with vibration. In order to reduce the space and weight of the design, mechanical vibration dampeners were removed. After various tests and simulations it was determined that using this feedback to the oscillator could correct the oscillator\u27s frequency change based on the vibration experienced. This would reduce the phase noise of the oscillator compared to an oscillator vibrated without any compensation. Using this compensation system would reduce the overall phase noise of any communication system currently in use that utilizes crystal oscillator

    A Low-Power BFSK/OOK Transmitter for Wireless Sensors

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    In recent years, significant improvements in semiconductor technology have allowed consistent development of wireless chipsets in terms of functionality and form factor. This has opened up a broad range of applications for implantable wireless sensors and telemetry devices in multiple categories, such as military, industrial, and medical uses. The nature of these applications often requires the wireless sensors to be low-weight and energy-efficient to achieve long battery life. Among the various functions of these sensors, the communication block, used to transmit the gathered data, is typically the most power-hungry block. In typical wireless sensor networks, transmission range is below 10 meters and required radiated power is below 1 milliwatt. In such cases, power consumption of the frequency-synthesis circuits prior to the power amplifier of the transmitter becomes significant. Reducing this power consumption is currently the focus of various research endeavors. A popular method of achieving this goal is using a direct-modulation transmitter where the generated carrier is directly modulated with baseband data using simple modulation schemes. Among the different variations of direct-modulation transmitters, transmitters using unlocked digitally-controlled oscillators and transmitters with injection or resonator-locked oscillators are widely investigated because of their simple structure. These transmitters can achieve low-power and stable operation either with the help of recalibration or by sacrificing tuning capability. In contrast, phase-locked-loop-based (PLL) transmitters are less researched. The PLL uses a feedback loop to lock the carrier to a reference frequency with a programmable ratio and thus achieves good frequency stability and convenient tunability. This work focuses on PLL-based transmitters. The initial goal of this work is to reduce the power consumption of the oscillator and frequency divider, the two most power-consuming blocks in a PLL. Novel topologies for these two blocks are proposed which achieve ultra-low-power operation. Along with measured performance, mathematical analysis to derive rule-of-thumb design approaches are presented. Finally, the full transmitter is implemented using these blocks in a 130 nanometer CMOS process and is successfully tested for low-power operation

    Ultra-low power, low-voltage transmitter at ISM band for short range transceivers

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    Tezin basılısı İstanbul Şehir Üniversitesi Kütüphanesi'ndedir.The increasing demand for technology to be used in every aspect of our lives has led the way to many new applications and communication standards. WSN and BAN are some of the new examples that utilize electronic circuit design in the form of very small sensors to perform their applications. They consist of small sensor nodes and have applications ranging from entertainment to medicine. Requirements such as decreasing the area and the power consumption help to have longer-lasting batteries and smaller devices. The standard paves the way for the devices from different vendors to communicate with each other, and that motivates us to make designs as compatible with the standard as it can be. In this thesis, an ultra-low power high efficient transmitter with a small area working at 2.4 GHz have been designed for BAN applications. A study on the system-view perspective is important in optimizing the area and power since the transmitter architecture can change the circuit design. From a circuit design perspective, seeking to decrease power consumption means thinking of new techniques to implement the same function or a new system. Inspired by new trends, this research presents a design solution to the previously mentioned problem and hopefully, after fabrication, the measured results will match the simulated results to prove the validity of the design.Declaration of Authorship ii Abstract iv Öz v Acknowledgments vii List of Figures x List of Tables xiii Abbreviations xiv 1 Introduction 1 1.1 Background and Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Communication Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2.1 Digital Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2.2 Unwanted Power Limitations . . . . . . . . . . . . . . . . . . . . . 3 1.2.3 Multiple Access Techniques . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Transmitter System Level Specifications . . . . . . . . . . . . . . . . . . . 4 1.3.1 Low Power Wireless Standards . . . . . . . . . . . . . . . . . . . . 4 1.4 Low-Power Wireless Transceiver systems . . . . . . . . . . . . . . . . . . . 6 1.4.1 Survey of the previous work . . . . . . . . . . . . . . . . . . . . . . 7 1.4.2 The Designed Transmitter System . . . . . . . . . . . . . . . . . . 8 1.5 Ultra-Low Power Transmitters Performance Metrics . . . . . . . . . . . . 9 1.6 Thesis Contribution and Outline . . . . . . . . . . . . . . . . . . . . . . . 10 2 Circuit Design for The Transmitter 11 2.1 Technology Characterization and Modeling for Low-Power Designs . . . 11 2.1.1 Passive Components modeling . . . . . . . . . . . . . . . . . . . . 11 2.1.2 Active Components Modeling . . . . . . . . . . . . . . . . . . . . . 13 2.1.3 MOS Transistor Sub-threshold Modeling . . . . . . . . . . . . . . 13 2.1.4 MOS Transistor Simulation-Based Modeling . . . . . . . . . . . . . 14 2.2 Low-Voltage Low-Power Analog and RF Design Principles . . . . . . . . . 17 2.2.1 Separate Gate Biasing of The Inverter . . . . . . . . . . . . . . . . 17 2.2.2 Body Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.3 Low-Voltage Analog Mixed Biasing Circuit Designs . . . . . . . . . . . . . 18 2.3.1 DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.3.2 Operational Amplifier Design . . . . . . . . . . . . . . . . . . . . . 19 2.4 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.4.1 The MEMS Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.4.2 Crystal Oscillator Topologies . . . . . . . . . . . . . . . . . . . . . 23 2.4.3 Design of The CMOS Crystal Oscillator . . . . . . . . . . . . . . . 26 2.5 Pre-Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2.6 OOK Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2.7 BPSK Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 2.8 Digital Control of the Modulators . . . . . . . . . . . . . . . . . . . . . . . 35 2.9 Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2.9.1 ULP PA Topologies Survey . . . . . . . . . . . . . . . . . . . . . . 38 2.9.2 The Push-Pull PA Design Methodology . . . . . . . . . . . . . . . 41 2.10 Transmit/Receive (T/R) Switch . . . . . . . . . . . . . . . . . . . . . . . 43 2.10.1 T/R Switch Topologies . . . . . . . . . . . . . . . . . . . . . . . . . 43 2.10.2 Suggested Low-Area Low-Voltage RF Switch . . . . . . . . . . . . 46 3 Transmitter Integration and Final Results 48 3.1 Transmitter Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 3.2 Transmitter Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 3.3 Results Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 3.4 Results Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 4 Conclusions 59 4.1 Thesis Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 4.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 A Bond Wire Parasitic Modeling 61 B Crystal Oscillator With Parasitic Effects 67 B.1 Simulation of FBAR with Parasitic Effects . . . . . . . . . . . . . . . . . 67 B.2 Root Locus Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Bibliography 7

    Um amplificador de transimpedância de ganho variável para aplicação em osciladores baseados em MEMS

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    Orientador: José Alexandre DinizDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de ComputaçãoResumo: Um amplificador de transimpedância (TIA) de ganho variável é apresentado. Implementado em tecnologia 0,18 'mi'm, o projeto relatado possui a finalidade de prover um amplificador de sustentação para osciladores baseados em ressonadores do tipo MEMS (Micro-Electro-Mechanical System). Entre outros, as peculiaridades de projeto envolvem um desafiante compromisso entre Ganho, Largura de Banda, Ruído e Consumo de potência. Sendo assim, o amplificador foi implementado através do cascateamento de quatro estágios de ganho similares, lançando-se mão de realimentação do tipo shunt-shunt para diminuir as impedâncias de entrada e saída. Através do emprego de um estágio de ganho variável, uma alta faixa dinâmica de ganho é alcançada (53 dB), com um ganho máximo de transimpedância de 118 dB'ômega'...Observação: O resumo, na íntegra, poderá ser visualizado no texto completo da tese digitalAbstract: A variable gain Transimpedance Amplifier (TIA) is presented. Realized in 0.18 'mi'm technology, this amplifier was conceived with the purpose of providing oscillation sustaining for Micro-Electro-Mechanical System (MEMS) based oscillators. Facing a quite challenging trade-off between Gain, Bandwidth, Noise and Power consumption, the TIA was implemented through the cascade of four similar gain stages, with the application of shunt-shunt feedback to lower both input and output resistances. With the employment of a variable-gain stage, this TIA presents a large gain tunability of 53 dB, with a also large maximum transimpedance gain of 118 dB'omega'...Note: The complete abstract is available with the full electronic documentMestradoEletrônica, Microeletrônica e OptoeletrônicaMestre em Engenharia Elétric

    Theory of phaselock techniques as applied to aerospace transponders

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    Phaselock techniques as applied to aerospace transponder

    Thin Film Piezoelectric on Substrate Resonators Electrical Characterization and Oscillator Circuit Design

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    Electronic systems require at least one reference signal to enable system synchronization. Oscillators and resonators are frequency selective devices that generate a desired reference signal for the systems. MEMS frequency selective devices offer alternative solutions for mechanically vibrating devices. MEMS are suitable for vibration applications by their rugged structure. In the present work, resonant behavior of thin film piezoelectric on substrate resonator (TPoS) is studied. Equivalent electrical circuit model parameters are extracted. It is observed that TPoS resonance characteristics are influenced by design aspects. The effects of perforated and continuous electrode designs on resonant behavior and also the change in resonance characteristics with the substrate thickness are reported. The colpitts oscillator circuit is implemented on a PC Board with a 27 MHz TPoS resonator and a 27 MHz quartz resonator. Jitter results are presented for both device.School of Electrical & Computer Engineerin

    MICRO-ELECTRO-MECHANICAL SYSTEM OSCILLATING ACCELERAMETERS WITH CMOS READOUT CIRCUITS

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    Ph.DDOCTOR OF PHILOSOPH

    A study of universal modulation techniques applied to satellite data collection

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    A universal modulation and frequency control system for use with data collection platform (DCP) transmitters is examined. The final design discussed can, under software/firmwave control, generate all of the specific digital data modulation formats currently used in the NASA satellite data collection service and can simultaneously synthesize the proper RF carrier frequencies employed. A novel technique for DCP time and frequency control is presented. The emissions of NBS radio station WWV/WWVH are received, detected, and finally decoded in microcomputer software to generate a highly accurate time base for the platform; with the assistance of external hardware, the microcomputer also directs the recalibration of all DCP oscillators to achieve very high frequency accuracies and low drift rates versus temperature, supply voltage, and time. The final programmable DCP design also employs direct microcomputer control of data reduction, formatting, transmitter switching, and system power management

    Physics and Applications of Laser Diode Chaos

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    An overview of chaos in laser diodes is provided which surveys experimental achievements in the area and explains the theory behind the phenomenon. The fundamental physics underpinning this behaviour and also the opportunities for harnessing laser diode chaos for potential applications are discussed. The availability and ease of operation of laser diodes, in a wide range of configurations, make them a convenient test-bed for exploring basic aspects of nonlinear and chaotic dynamics. It also makes them attractive for practical tasks, such as chaos-based secure communications and random number generation. Avenues for future research and development of chaotic laser diodes are also identified.Comment: Published in Nature Photonic
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