1,975 research outputs found

    Visible Light Communications towards 5G

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    5G networks have to offer extremely high capacity for novel streaming applications. One of the most promising approaches is to embed large numbers of co-operating small cells into the macro-cell coverage area. Alternatively, optical wireless based technologies can be adopted as an alternative physical layer offering higher data rates. Visible light communications (VLC) is an emerging technology for future high capacity communication links (it has been accepted to 5GPP) in the visible range of the electromagnetic spectrum (~370–780 nm) utilizing light-emitting diodes (LEDs) simultaneously provide data transmission and room illumination. A major challenge in VLC is the LED modulation bandwidths, which are limited to a few MHz. However, myriad gigabit speed transmission links have already been demonstrated. Non line-of-sight (NLOS) optical wireless is resistant to blocking by people and obstacles and is capable of adapting its’ throughput according to the current channel state information. Concurrently, organic polymer LEDs (PLEDs) have become the focus of enormous attention for solid-state lighting applications due to their advantages over conventional white LEDs such as ultra-low costs, low heating temperature, mechanical flexibility and large photoactive areas when produced with wet processing methods. This paper discusses development of such VLC links with a view to implementing ubiquitous broadcasting networks featuring advanced modulation formats such as orthogonal frequency division multiplexing (OFDM) or carrier-less amplitude and phase modulation (CAP) in conjunction with equalization techniques. Finally, this paper will also summarize the results of the European project ICT COST IC1101 OPTICWISE (Optical Wireless Communications - An Emerging Technology) dealing VLC and OLEDs towards 5G networks

    Perception of Reverberation in Domestic and Automotive Environments

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    A review of gallium nitride LEDs for multi-gigabit-per-second visible light data communications

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    The field of visible light communications (VLC) has gained significant interest over the last decade, in both fibre and free-space embodiments. In fibre systems, the availability of low cost plastic optical fibre (POF) that is compatible with visible data communications has been a key enabler. In free-space applications, the availability of hundreds of THz of the unregulated spectrum makes VLC attractive for wireless communications. This paper provides an overview of the recent developments in VLC systems based on gallium nitride (GaN) light-emitting diodes (LEDs), covering aspects from sources to systems. The state-of-the-art technology enabling bandwidth of GaN LEDs in the range of >400 MHz is explored. Furthermore, advances in key technologies, including advanced modulation, equalisation, and multiplexing that have enabled free-space VLC data rates beyond 10 Gb/s are also outlined

    suppression of dc link voltage unbalance in three level neutral point clamped converters

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    Abstract Two different control approaches for suppressing DC-link voltage unbalance in Three-Level Neutral-Point Clamped Converters (NPCs) are presented in this paper. They both guarantee DC-link voltage equalization over any NPC operating conditions, i.e. when the NPC feeds or is supplied by the main AC grid at different active and/or reactive power rates. The proposed control approaches consist of either a hysteresis or a proportional regulator, each of which synthesizes the most suitable control action based on the actual DC-link voltage unbalance. Particularly, two different PWM techniques have been developed in order to achieve DC-link voltage equalization successfully, preserving NPC voltage and current waveforms at the same time. The performances achievable by means of both the proposed control approaches have been compared to each other through an extensive simulation study in order to highlight their most important advantages and drawbacks, as well as their effectiveness over any operating conditions. Particularly, both control approaches are validated in the Matlab-Simulink environment referring to DC-link voltage equalization of an NPC that represents the point of common coupling between a DC microgrid and the main AC grid

    Analysis and Design of High Speed Serial Interfaces for Automotive Applications

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    The demand for an enriched end-user experience and increased performance in next generation electronic applications is never ending, and it is a common trend for a wide spectrum of applications owing to different markets, like computing, mobile communication and automotive. For this reason High Speed Serial Interface have become widespread components for nowadays electronics with a constant demand for power reduction and data rate increase. In the frame of gigabit serial systems, the work discussed in this thesis develops in two directions: on one hand, the aim is to support the continuous data rate increase with the development of novel link modeling approaches that will be employed for system level evaluation and as support in the design and characterization phases. On the other hand, the design considerations and challenges in the implementation of the transmitter, one of the most delicate blocks for the signal integrity performance of the link, are central. The first part of the activity regarding link performance predictions lead to the development of an enhanced statistical simulation approach, capable to account for the transmitter waveform shape in the ISI analysis, a characteristic that is missed by the available state-ofthe- art simulation approaches. The proposed approach has been extensively tested by comparison with traditional simulation approaches (Spice-like simulators) and validated against experimental characterization of a test system, with satisfactory results. The second part of the activity consists in the design of a high speed transmitter in a deeply scaled CMOS technology, spanning from the concept of the circuit, its implementation and characterization. Targets of the design are to achieve a data rate of 5 Gb/s with a minimum voltage swing of 800 mV, thus doubling the data rate of the current transmitter implementation, and reduce the power dissipation adopting a voltage mode architecture. The experimental characterization of the fabricated lot draws a twofold picture, with some of the performance figures showing a very good qualitative and quantitative agreement with pre-silicon simulations, and others revealing a poor performance level, especially for the eye diagram. Investigation of the root causes by the analysis of the physical silicon design, of the bonding scheme of the prototypes and of the pre-silicon simulations is reported. Guidelines for the redesign of the circuit are also given.Nel panorama delle applicazioni elettroniche il miglioramento delle performance di un prodotto da una generazione alla successiva ha lo scopo di offrire all\u2019utilizzatore finale nuove funzioni e migliorare quelle esistenti. Negli ultimi anni grazie al costante avanzamento della tecnologia integrata, si \ue8 assistito ad un enorme sviluppo della capacit\ue0 computazionale dei dispositivi in tutti i segmenti di mercato, quali ad esempio l\u2019information technology, la comunicazione mobile e l\u2019automotive. La conseguente necessit\ue0 di mettere in comunicazione dispostivi diversi all\u2019interno della stessa applicazione e di traferire grosse quantit\ue0 di dati ha provocato una capillare diffusione delle interfacce seriali ad alta velocit\ue0, o High Speed Serial Interfaces (HSSIs). La necessit\ue0 di ridurre il consumo di potenza e aumentare il bit rate per questo tipo di applicazioni \ue8 diventata dunque un ambito di ricerca di estremo interesse. Il lavoro discusso in questa tesi si colloca nell\u2019ambito della trasmissione di dati seriali a bit rate superiori ad 1Gb/s e si sviluppa in due direzioni: da un lato, a sostegno del continuo aumento del bit rate nelle nuove generazioni di interfacce, \ue8 stato affrontato lo sviluppo di nuovi approcci di modellazione del sistema, che possano essere impiegati nella valutazione delle prestazioni dell\u2019interfaccia e a supporto delle fasi di progettazione e di caratterizzazione. Dall\u2019altro lato, si \ue8 focalizzata l\u2019attenzione sulle sfide e sulle problematiche inerenti il progetto di uno dei blocchi pi\uf9 delicati per le prestazioni del sistema, il trasmettitore. La prima parte della tesi ha come oggetto lo sviluppo di un approccio di simulazione statistico innovativo, in grado di includere nell\u2019analisi degli effetti dell\u2019interferenza di intersimbolo anche la forma d\u2019onda prodotta all\u2019uscita del trasmettitore, una caratteristica che non \ue8 presente in altri approcci di simulazione proposti in letteratura. La tecnica proposta \ue8 ampiamente testata mediante il confronto con approcci di simulazione tradizionali (di tipo Spice) e mediante il confronto con la caratterizzazione sperimentale di un sistema di test, con risultati pienamente soddisfacenti. La seconda parte dell\u2019attivit\ue0 riguarda il progetto di un trasmettitore integrato high speed in tecnologia CMOS a 40nm e si estende dallo studio di fattibilit\ue0 del circuito fino alla sua realizzazione e caratterizzazione. Gli obiettivi riguardano il raggiungimento di un bit rate pari a 5 Gb/s, raddoppiando cos\uec il bit rate dell\u2019attuale implementazione, e di una tensione differenziale di uscita minima di 800mV (picco-picco) riducendo allo stesso tempo la potenza dissipata mediante l\u2019adozione di una architettura Voltage Mode. I risultati sperimentali ottenuti dal primo lotto fabbricato non delineano un quadro univoco: alcune performance mostrano un ottimo accordo qualitativo e quantitativo con le simulazioni pre-fabbricazione, mentre prestazioni non soddisfacenti sono state ottenute in particolare per il diagramma ad occhio. Grazie all\u2019analisi del layout del prototipo, del bonding tra silicio e package e delle simulazioni pre-fabbricazione \ue8 stato possibile risalire ai fattori responsabili del degrado delle prestazioni rispetto alla previsioni pre-fabbricazione, permettendo inoltre di delineare le linee guida da seguire nella futura progettazione di un nuovo prototipo
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