A Generalized Approach to Analysing a Class of Passively Soft-Switched PWM DC-DC Converters

In this paper, a generalised approach to the analysis of a class of passively soft-switched PWM DC-DC converters is presented. The circuit cell that gives this class of converters its passively soft-switched characteristics is first introduced. The use of this circuit cell to transform the basic hard switched converters (buck, boost, bucklboost, Cuk's, Sepic and Zeta) into their varied passively soft-switched PWM topologies is illustratively presented. A generalised analysis representative of all the soft-switched converter types in the class is carried out

Performance Improvement of AC-DC Power Factor Correction Converters For Distributed Power System

In present situation, the increase in the utilization of computers, laptops,uninterruptable power supplies, telecom and bio-medical equipments has become uncontrollable as its growth is rising exponentially. Hence, increase in functionality of such equipments leads to the higher power consumption and low power density which provided a large market to distributed power systems (DPS). The development of these DPS posed challenges to power engineers for an efficient power delivery with stringent regulating standards; this is the motivation and driving force of this research work. The objective is to minimize the switching losses of front-end converters employed in DPS, with the primary aim of achieving nearly unity power factor operation of converters.Single-phase and three-phase rectifiers are increasingly used in the field of alternating current – direct current (AC-DC) power converters as front-end converters in DPS. For power factor correction (PFC) stage, conventional single-phase AC-DC PFC boost converter is the most suitable topology because of its inherent advantages. These PFC boost converters exhibit poor dynamic regulation of output voltage owing to low pass filter in the voltage feedback loop. Research effort has been made to mitigate this problem of AC-DC PFC boost converters. An extended pulse width modulation switching technique has been investigated and proposed especially for single-phase and three-phase AC-DC PFC boost converters to improve the dynamic response of output voltage during transient periods

Implementación de una técnica de conmutación suave a un convertidor tipo Boost Monofásico para corregir el factor potencia

En este trabajo se realiza el diseño e implementación de un convertidor Boost con conmutación suave monofásico como corrector activo del factor de potencia para la disminución de armónicos de baja y alta frecuencia en la señal de corriente de la red de alimentación. Cuando un sistema eléctrico presenta cargas no lineales, como convertidores de potencia de corriente continua a corriente continua cc-cc, la corriente en la entrada presenta una alta deformación. Esta es debida a la presencia de armónicos de baja frecuencia por la carga y descarga del condensador, y armónicos de alta frecuencia por altas velocidades de conmutación. En ambos casos, un alto contenido de armónicos disminuye el factor de potencia. Se lograron reducir los armónicos de baja frecuencia con la ley de disparo por corriente promedio en modo de conducción continua MCC sobre el transistor. Cuando esto se lleva a cabo se dice que el convertidor se comporta como un emulador resistivo. La disminución de armónicos de alta frecuencia se obtuvo con el diseño de una celda de conmutación suave encargada de reducir las sobretensiones y sobrecorrientes presentes en la alta velocidad de conmutación del interruptor principal. Además, la celda mejora la calidad de la onda de corriente y aumenta la vida útil del dispositivo controlado. Todo lo anterior se implementó en el Laboratorio de Calidad de la Energía en una estación de trabajo. El corazón de ésta es una tarjeta de potencia conocida como Power Pole Board para fines académicos e investigativos en el área de calidad y electrónica de potencia, en especial para trabajar en el tema de fuentes conmutadas o convertidores cc-cc. / Abstract: In this work, the design and implementation of a monophasic Boost converter with smooth switching as active corrector of power factor was performed. The purpose of this was the decrease of high and low frequency harmonics in the current signal of the supply. When an electric system has nonlinear loads, such as the power DC-DC converter, the feed current exhibits a large deformation due to the increased harmonics which decrease the power factor. The condenser charge and discharge leads to low frequency harmonics, while the large switching speed leads to high frequency harmonics. Low frequency harmonics was reduced by means of an average current shooting control law applied on the transistor in continuous conduction mode (CCM). When such a control law is used, the converter is known as resistive emulator. The design of the smooth switching cell gave as result the reduction of high frequency harmonics. The goal of the cell was to reduce the overvoltage and overcurrents in the main switch and generated by high switching speed. Moreover, this not only improves the current wave quality, but also increases the shelf time of the controlled device. The device was implemented in a working station the Energy Quality Laboratory, whose core is the Power Pole Board, used for academic and investigative tasks concerning the power quality and electronics, especially for switching sources or DC-DC converters.Maestrí

Low Voltage Regulator Modules and Single Stage Front-end Converters

Evolution in microprocessor technology poses new challenges for supplying power to these devices. To meet demands for faster and more efficient data processing, modem microprocessors are being designed with lower voltage implementations. More devices will be packed on a single processor chip and the processors will operate at higher frequencies, exceeding 1GHz. New high-performance microprocessors may require from 40 to 80 watts of power for the CPU alone. Load current must be supplied with up to 30A/µs slew rate while keeping the output voltage within tight regulation and response time tolerances. Therefore, special power supplies and Voltage Regulator Modules (VRMs) are needed to provide lower voltage with higher current and fast response. In the part one (chapter 2,3,4) of this dissertation, several low-voltage high-current VRM technologies are proposed for future generation microprocessors and ICs. The developed VRMs with these new technologies have advantages over conventional ones in terms of efficiency, transient response and cost. In most cases, the VRMs draw currents from DC bus for which front-end converters are used as a DC source. As the use of AC/DC frond-end converters continues to increase, more distorted mains current is drawn from the line, resulting in lower power factor and high total harmonic distortion. As a branch of active Power factor correction (PFC) techniques, the single-stage technique receives particular attention because of its low cost implementation. Moreover, with continuously demands for even higher power density, switching mode power supply operating at high-frequency is required because at high switching frequency, the size and weight of circuit components can be remarkably reduced. To boost the switching frequency, the soft-switching technique was introduced to alleviate the switching losses. The part two (chapter 5,6) of the dissertation presents several topologies for this front-end application. The design considerations, simulation results and experimental verification are discussed

Topological issues in single-phase power factor correction

The equipment connected to an electricity distribution network usually needs some kind of power conditioning, typically rectification, which produces a nonsinusoidal line current due to the nonlinear input characteristic. With the steadily increasing use of such equipment, line current harmonics have become a significant problem. Their adverse effects on the power system are well recognized. They include increased magnitudes of neutral currents in three-phase systems, overheating in transformers and induction motors, as well as the degradation of system voltage waveforms. Several international standards now exist, which limit the harmonic content due to line currents of equipment connected to electricity distribution networks. As a result, there is the need for a reduction in line current harmonics, or Power Factor Correction - PFC. In this dissertation, we address several issues concerning the application to single-phase PFC of various high-frequency switching converter topologies. The inherent PFC properties of second-order switching converters operating in Discontinuous Inductor Current Mode - DICM are well known, and Boost converters are widely used. However, their output voltage is always higher than the amplitude of the rectified-sinusoid input voltage. In addition, it is expected that the level of the differential-mode EMI is much higher in DICM, as compared to the Continuous Inductor Current Mode - CICM. Therefore, we first investigated the requirements for the EMI filter for a PFC stage based on a Boost converter operating in DICM. The high-level of differential-mode EMI that is associated with DICM operation prompted our interest to investigate the application of two-switch fourth-order converters for PFC. The switching cell of these converters contains two inductors, which can operate in DICM or in CICM, and one capacitor, which can operate in Discontinuous Capacitor Voltage Mode - DCVM or in Continuous Capacitor Voltage Mode - CCVM. As a consequence, in these topologies several combinations of operating modes can be obtained, which have characteristics that otherwise cannot be obtained in second-order switching converters. We analyze three fourth-order topologies operating in DCVM and CICM, which have both an input current with reduced high-frequency content and an inherent PFC property. One of the converters, i.e. the Buck converter with an LC input filter, is then selected for a more detailed analysis. In addition, a fourth-order topology with galvanic isolation and operating in DCVM and CICM is presented and analyzed, as well. We also consider the operation in CCVM and CICM, which is analyzed for a fourth-order topology with step-down conversion ratio. The 'zero-ripple' technique is applied to obtain an input current having a very low high-frequency content, and average current mode control is used to shape the input current. Methods for improving the efficiency of the PFC stage are addressed, too. We compare several Boost-type topologies that have lower conduction losses than the combined diode bridge and Boost converter, as well as one fourth-order topology that is able to operate with bipolar input voltage, in other words it can perform direct AC/DC conversion. Finally, we propose a novel Zero Voltage Transition - ZVT topology, which reduces the switching losses by creating zero voltage switching conditions at the turn-on of the active switch. This topology can be used in a variety of converters, for DC/DC or PFC applications.reviewe

Review on State-of-the-Art Unidirectional Non-Isolated Power Factor Correction Converters for Short-/Long-Distance Electric Vehicles

Electrification of the transportation sector has originated a worldwide demand towards green-based refueling infrastructure modernization. Global researches and efforts have been pondered to promote optimal Electric Vehicle (EV) charging stations. The EV power electronic systems can be classified into three main divisions: power charging station configuration (e.g., Level 1 (i.e., slow-speed charger), Level 2 (i.e., fast-speed charger), and Level 3 (i.e., ultra-fast speed charger)), the electric drive system, and the auxiliary EV loads. This paper emphasizes the recent development in Power Factor Correction (PFC) converters in the on-board charger system for short-distance EVs (e.g., e-bikes, e-trikes, e-rickshaw, and golf carts) and long-distance EVs (passenger e-cars, e-trucks, and e-buses). The EV battery voltage mainly ranges between 36 V and 900 V based on the EV application. The on-board battery charger consists of either a single-stage converter (a PFC converter that meets the demands of both the supply-side and the battery-side) or a two-stage converter (a PFC converter that meets the supply-side requirements and a DC-DC converter that meets the battery-side requirements). This paper focuses on the single-phase unidirectional non-isolated PFC converters for on-board battery chargers (i.e., Level 1 and Level 2 charging infrastructure). A comprehensive classification is provided for the PFC converters with two main categories: (1) the fundamental PFC topologies (i.e., Buck, Boost, Buck-Boost, SEPIC, C k, and Zeta converters) and (2) the modified PFC topologies (i.e., improved power quality PFC converters derived from the fundamental topologies). This paper provides a review of up-to-date publications for PFC converters in short-/long-distance EV applications.Qatar National Research FundScopu

Técnicas de control robusto basado en modelo de referencia e inyección de la corriente de carga aplicadas a rectificadores monofásicos con corrección activa del factor de potencia

La proliferación en los últimos años de equipos electrónicos conectados a redes de distribución eléctrica, ha provocado la aparición de standards internacionales, como por ejemplo la norma EN 68000-3-2, que regulan la distorsión armónica de baja frecuencia que dichos equipos pueden introducir en la red. En este contexto, los rectificadores con alto factor de potencia constituyen una de las soluciones más adecuadas para reducir la distorsión armónica de la corriente consumida de la red eléctrica. En su versión monofásica y cuando no se requiere devolver energía a la red, los rectificadores con alto factor de potencia suelen implementarse mediante la asociación en cascada de un rectificador pasivo (diodos) y un convertidor dc-dc de tipo boost. Un lazo de regulación de corriente se encarga de mantener la distorsión de la corriente de entrada próxima a cero, recibiendo una señal de consigna de un lazo de regulación de la tensión de salida. Este último lazo se encarga de mantener la tensión de salida cercana a un cierto valor de referencia. El problema más documentado en la literatura al respecto es la pobre respuesta dinámica del lazo de regulación de tensión, debido a que dicho lazo debe ser extremadamente lento para no producir distorsión en la corriente de entrada. En esta tesis se propone la aplicación de las técnicas de control Robust Model Following (RMF) y Load Injection Current (LI2) al diseño del lazo de regulación de la tensión de salida. Dichas técnicas permiten reducir considerablemente la impedancia de salida del convertidor en lazo cerrado, sin que se requiera aumentar la velocidad de respuesta del lazo de tensión. En consecuencia, mejoran de forma notable la respuesta dinámica del convertidor sin distorsionar la corriente de entrada. Una ventaja adicional de las técnicas propuestas es su bajo coste de implementación, lo que las convierte en una alternativa muy interesante para ser implementadas en equipos industriales.Benavent García, JM. (2010). Técnicas de control robusto basado en modelo de referencia e inyección de la corriente de carga aplicadas a rectificadores monofásicos con corrección activa del factor de potencia [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/8684Palanci

Models and methods for the design of isolated power converters in high-frequency high-efficiency applications

2011 - 2012Isolated power supplies design requires the achievement of overall stress, losses, cost, size and reliability trade-off. This problem is of considerable importance in modern applications of power converters, as for energy saving issues as for the achievement of high power density capabilities needed to integrate the power supply into the same boards where the system they feed is hosted. The aim of this PhD dissertation is to discuss the fundamental issues regarding the design of high-efficiency high-power-density isolated power converters, related to the transformers design and to the system-level analysis of functional and parametric correlations existing among transformers and silicon devices in the achievement of high efficiency. Transformer design is the central issue in isolated switching power supplies design. Affording a preliminary reliable investigation of possible feasible power supply designs using off-the-shelf transformers can be of great help in reducing the time to prototyping and the time-to-market. Even though many off-the-shelf transformers are available today for standard applications, many special situations occur such that the design of a custom transformer is required. New design method are needed in order to enable a wider detection and investigation of possible transformer design solutions by means of a straightforward matching between the available magnetic cores, the operating conditions of the transformer to be designed and the design constraints to be fulfilled. A critical re-examination of transformers design methods discussed in technical literature has been afforded to highlighting some common misleading assumptions which can hinder the minimization of the transformer. Thus, a new design approach has been investigated and discussed, which helps in easily identifying possible transformer solutions in critical custom designs for a given application, complying with losses and size constraints. The new method is aimed at quickly identifying possible combinations of magnetic cores and windings turns number when many possible design might be feasible and a fast comparative evaluation is needed for preliminary cores selection. Novel geometric form factors of magnetic core (Kf and Kc) have been introduced and a consequent classification procedure for magnetic cores has been obtained, showing the correlation between the characteristics of the core and the specific applications in which each type of core offers major advantages in terms of minimizing losses and/or size. A magneto-electro-thermal macro model of the transformer has been adopted in order to investigate the dependency of total transformer losses on the temperature and to analyze the temperature sensitivity of form factor constraints of magnetic cores for power loss compliance. In particular, temperature-dependent boundaries curves both for the core window area and cross-section and for the form factors Kf and Kc have been obtained, allowing quick identification of feasible design solutions, complying with all design constraints, included thermal issues. Transformers and silicon devices do inextricably share the responsibility of major losses in isolated power supplies, and the optimization of the former normally impinges the one of the latter. As a consequence, the intimate correlation among these parts need to be jointly considered regarding the way the characteristics of one device influence the losses of the other one. In order to achieve reliable comparative evaluations among different design set-up, a new versatile numerical model for commutations analysis of power MOSFETs has been developed. The model takes into account the non-linear behavior of the inter-electrode capacitances and has been conceived to work as with parameters and information contained in the devices datasheets as with more detailed models. A Modified Forward Euler (MFE) numerical technique has been specifically developed and adopted in the realization of a numerical algorithm which solves the non linear system of differential equations describing the effect of parasitic capacitances in whatever operating conditions, in order to overcome the limitation exhibited by ODEs techniques for stiff problems in this particular application. The new MFE technique allows to compare the switching characteristics of MOSFETs with a good level of reliability and to obtain a detailed analysis of capacitive currents paths circulating between MOSFETs in half-bridge configuration during commutations. The numerical device-level model of the MOSFETs couples has been first tested in the analysis of basic non isolated synchronous rectification buck converter and then used into an integrated model allowing the analysis of Active Clamp Forward converters. It has been also demonstrated that the model adopted for the switching cell can be implemented in circuit simulators like Micro-Cap. The correlations existing between the parasitic parameters which characterize both transformer and MOSFETs and their impact on the switching behavior and the efficiency of such a conversion system can be effectively investigated by using such modeling approach, thus overcoming the limitations and unreliability of simplified analytical formulas for the prediction of the ZVS achievement. In particular, the integrated system model has been successfully used to determine the mutual constraint conditions between magnetic devices and solid state devices to achieve soft-switching, and their effects on the physical feasibility and design/selection of such power devices in order to achieve high efficiency. Experimental activities have been done to validate the methods and models proposed, through the implementation of on-line losses measurements techniques for both magnetic and solid state devices. The high switching frequency, high slew rates, high current and low leakage devices make such measures extremely sensitive to the parasitic circuit layout parameters. In order to achieve reliable measurements, non-conventional measurement techniques have been investigated based on the use of current sensing MOSFETs, and applied in the development and implementation of new measuring circuits. [edited by author]XI n.s