Design knowledge capture for the space station

The benefits of design knowledge availability are identifiable and pervasive. The implementation of design knowledge capture and storage using current technology increases the probability for success, while providing for a degree of access compatibility with future applications. The space station design definition should be expanded to include design knowledge. Design knowledge should be captured. A critical timing relationship exists between the space station development program, and the implementation of this project

Generation of Application Specific Hardware Extensions for Hybrid Architectures: The Development of PIRANHA - A GCC Plugin for High-Level-Synthesis

Architectures combining a field programmable gate array (FPGA) and a general-purpose processor on a single chip became increasingly popular in recent years. On the one hand, such hybrid architectures facilitate the use of application specific hardware accelerators that improve the performance of the software on the host processor. On the other hand, it obliges system designers to handle the whole process of hardware/software co-design. The complexity of this process is still one of the main reasons, that hinders the widespread use of hybrid architectures. Thus, an automated process that aids programmers with the hardware/software partitioning and the generation of application specific accelerators is an important issue. The method presented in this thesis neither requires restrictions of the used high-level-language nor special source code annotations. Usually, this is an entry barrier for programmers without deeper understanding of the underlying hardware platform. This thesis introduces a seamless programming flow that allows generating hardware accelerators for unrestricted, legacy C code. The implementation consists of a GCC plugin that automatically identifies application hot-spots and generates hardware accelerators accordingly. Apart from the accelerator implementation in a hardware description language, the compiler plugin provides the generation of a host processor interfaces and, if necessary, a prototypical integration with the host operating system. An evaluation with typical embedded applications shows general benefits of the approach, but also reveals limiting factors that hamper possible performance improvements

Effects of a structured prototyping strategy on capstone design projects

textPrototyping is often a very important phase in a capstone engineering design project. However, in many cases, prototyping decisions are made arbitrarily by students, adversely affecting the quality of the final product delivered. Previous research efforts at The University of Texas at Austin have developed a structured prototyping strategy tool based on a synthesis of prototyping techniques that have been shown to be effective. This strategy tool leads designers through the process of making decisions about aspects of a prototype program, such as how many concepts to prototype, the number of prototype iterations to complete for a given concept, and whether to use scaled prototypes. In this study the effect of explicit discussion of these prototyping decisions on the results of the capstone design projects was evaluated. Research suggests that early and frequent prototyping leads to increases in the quality and the novelty of designs. Therefore, the goal of this project was to determine if exposure to the prototyping strategy tool leads to an increase in the number of prototypes constructed. At the beginning of the semester, students in the capstone course received instruction on the benefits of prototyping and on the use of the prototyping strategy tool. Interviews were conducted at the end of the semester to evaluate the students' prototyping efforts. These results were compared to previous capstone projects where the students did not receive formal guidance on making prototyping decisions. The results of the comparison show statistically significant increases in the proportion of teams opting to create prototypes and the average number of prototypes per team. This thesis describes the study in detail, analyzes the results, and presents conclusions and future directions for the research.Mechanical Engineerin

Novel Synthesis Methodology in Digital IC Design and Automation to Reduce NRE costs and Time-to-Market

The number of incremental and iterative steps in the digital IC design & automation methodology will decide the non-recurring-engineering (NRE) costs and time-to-market (TTM). Since the aforementioned factors are the major driving factors of the IC design industry, many algorithms were proposed in the last few decades to minimize/optimize the number of design steps in the conventional digital IC design & automation methodology. However, the conventional front end and back end designs have been carried out separately, which has limited the further minimization of design steps. Here we propose a novel digital IC design & automation methodology, which reduces the NRE costs and TTM by merging the front end and back end designs partially. It maps the input RTL description directly to their corresponding physical layouts(derived using the existing CAD tools and stored in a pre-computed library) without going through the all the steps in conventional logic and physical synthesis process. As part of the proposed methodology, we use a pre-computed library which stores all required physical layouts and their Boolean functions. We have exploited the functional symmetry and negation-permutation-negation (NPN) class representations to decoct the library size and number of comparisons. The functional symmetry reduced the number of required pre-computed circuits in our experiments from ] 1031 to 222 (464.4% reduction in the memory size) and helps in maintaining the regularity in the design, which is a major concern for engineering change order

A model-based approach for the specification and refinement of streaming applications

Embedded systems can be found in a wide range of applications. Depending on the application, embedded systems must meet a wide range of constraints. Thus, designing and programming embedded systems is a challenging task. Here, model-based design flows can be a solution. This thesis proposes novel approaches for the specification and refinement of streaming applications. To this end, it focuses on dataflow models. As key result, the proposed dataflow model provides for a seamless model-based design flow from system level to the instruction/logic level for a wide range of streaming applications

Tecnicas de Co-Design Aplicadas ao Desenvolvimento de uma Interface USB

Esta disserta»c~ao aborda a metodologia de desenvolvimento conhecida como hardwa- re/software co-design, motivada pela complexidade emergente do desenvolvimento de sis- temas digitais embarcados e os recentes progressos da tecnologia SoC (System-on-Chip). Nesse contexto, ¶e proposta uma metodologia capaz de atuar num elevado n¶³vel de abstra»c~ao, permitindo aos projetistas: um melhor gerenciamento da complexidade, uma visualiza»c~ao bem de¯nida do processo de desenvolvimento e um re¯namento suave entre os componentes do sistema, de maneira que as decis~oes de projeto e o particionamento entre os componentes de hardware e software possam ser realizados de maneira simples e natural. Com esse objetivo foi utilizado a linguagem de modelagem uni¯cada - UML (Uni¯ed Modeling Language), para especi¯ca»c~ao do sistema em alto n¶³vel, e a linguagem SystemC, para a cria»c~ao de prot¶otipos execut¶aveis e simula»c~oes dos v¶arios n¶³veis de abstra»c~ao de¯- nidos pela proposta. Para demonstra»c~ao da metodologia, a implementa»c~ao de uma interface USB (Univer- sal Serial Bus), que possui caracter¶³sticas co-design que justi¯cam sua utiliza»c~ao como um exemplo de teste, ser¶a especi¯cada e re¯nada suavemente. Dessa maneira, considerando a elevada demanda de produ»c~ao e o tempo de vida relativamente curto destes modernos sistemas que atualmente podem ser encontrados em quase todos os lugares de nosso cotidiano como: carros, celulares, televisores, microondas entre outros, esta disserta»c~ao vem auxiliar os esfor»cos metodol¶ogicos, em busca do aumento de produtividade, no desenvolvimento destes complexos sistemas

Hardware-Debugging durch die Kombination von Emulation und Simulation

'...Zugriffsfehler im Modul xyz...' - solche oder ähnliche Fehlermeldungen sehen Benutzer von Computern meist dann, wenn sie versuchen mit einem Programm Operationen auszuführen, die fehlerhaft programmiert wurden. Die Ursachen für derartige Fehler sind dabei recht vielfältig. Oftmals sind sie bereits in der benutzten Programmiersprache zu suchen, dazu kommen zusätzlich Fehler in den Compilern, Beschränkungen in dem Betriebssystem sowie Seiteneffekte anderer Programme, wie z.B. falsches Speichermanagement. Angeführt wird die Liste möglicher Fehlerquellen allerdings vom Menschen selbst. Wobei auch hier noch zu unterscheiden ist, ob der Mensch einen Fehler aus Unwissenheit gemacht hat, oder ob er dessen Relevanz einfach unterschätzt hat. In beiden Fällen wird es immer schwer sein in einem Endprodukt die genaue Ursache eines Fehlverhaltens zu lokalisieren. Ähnlich wie es zu Problemen bei der Erstellung von Software kommen kann, treten natürlich auch während der Entwicklung einer Schaltung grundlegende Schwierigkeiten auf..

Effiziente Entwurfsverfahren zur hardwarebasierten Signalverabeitung elementarer Funktionen für die drahtlose Kommunikation

Wireless communication is a key aspect of current and future data communication, thus, it is used in several different application areas of daily life. Due to the development in recent years, it is most likely that the overall processing effort in this scope will increase significantly. For example, within the scope of mobile telephony, there is a steady growth of subscribers, which will lead to a higher amount of payload and transceiver activity. For wireless devices, high battery lifetime is also demanded. In order to fulfill the above requirements, efficient digital signal processing has proven itself to be a promising approach. To this end, the signal processing task, e.g. the calculation of algorithms, is directly mapped onto the underlying hardware. However, for future wireless communication systems, this approach will lead to insufficient results, due to the expected increase of algorithmic complexity. This thesis focusses on approximate signal processing of elementary functions in the context of digital circuit design for wireless communication. An adapted design methodology is presented that uses efficient function segmentation as well as hardware-optimized linear equations, in order to reduce the overall signal processing effort. As the translation of the function approxmiation to an equivalent hardware description is performed automatically, this can be embedded into the digital design flow. In this work, several elementary functions from mobile communication and wireless sensor network applications are approximated by this methodology. Model-based simulation and validation is performed, as well as corresponding hardware implementations are presented for each application. Finally, all results are evaluated by comparison to appropriate references

First Annual Workshop on Space Operations Automation and Robotics (SOAR 87)

Several topics relative to automation and robotics technology are discussed. Automation of checkout, ground support, and logistics; automated software development; man-machine interfaces; neural networks; systems engineering and distributed/parallel processing architectures; and artificial intelligence/expert systems are among the topics covered