2,696 research outputs found

    Wide Band Gap Devices and Their Application in Power Electronics

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    Power electronic systems have a great impact on modern society. Their applications target a more sustainable future by minimizing the negative impacts of industrialization on the environment, such as global warming effects and greenhouse gas emission. Power devices based on wide band gap (WBG) material have the potential to deliver a paradigm shift in regard to energy efficiency and working with respect to the devices based on mature silicon (Si). Gallium nitride (GaN) and silicon carbide (SiC) have been treated as one of the most promising WBG materials that allow the performance limits of matured Si switching devices to be significantly exceeded. WBG-based power devices enable fast switching with lower power losses at higher switching frequency and hence, allow the development of high power density and high efficiency power converters. This paper reviews popular SiC and GaN power devices, discusses the associated merits and challenges, and finally their applications in power electronics

    Experimental and analytical performance evaluation of SiC power devices in the matrix converter

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    With the commercial availability of SiC power devices, their acceptance is expected grows in consideration to the excellent low switching loss, high temperature operation and high voltage rating capabilities of these devices. This paper presents the comparative performance evaluation of different SiC power devices in matrix converter at various temperatures and switching frequencies. To this end, firstly, gate or base drive circuits for Normally-off SiC JFET, SiC MOSFET and SiC BJT which taking into account the special demands for these devices are presented. Then, three 2-phase to 1-phase matrix converters are built with different SiC power devices to measure the switching waveforms and power losses for them at different temperatures and switching frequencies. Based on the measured data, three different SiC power devices are compared in terms of switching times, conduction and switching losses and efficiency at different temperatures and switching frequencies. Furthermore, a theoretical investigation of the power losses of three phase matrix converter with Normally-off SiC JFET, SiC MOSFET, SiC BJT and Si IGBT is described. The power losses estimation indicates that a 7 KW matrix converter would potentially have an efficiency of approximately 96% in high switching frequency if equipped with SiC devices

    Modeling and Loss Analysis of SiC Power Semiconductor Devices for Switching Converter Applications

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    Since its inception, power electronics has been to a large extent driven by the available power semiconductor devices. Switching power converter topologies, modes of operation, switching frequencies, passive filtering elements are chosen based on the switching and conduction characteristics of power semiconductor devices. In recent times new wide bandgap power semiconductor devices, such as SiC MOSFETs, are emerging with superior performance as compared to conventional silicon devices. In switching power converter design, power losses of the power semiconductor de- vices play a crucial role in determining the physical characteristics of power converter systems in terms of size, weight, efficiency and, ultimately, cost. Switching losses impose an upper limit to the switching frequency, which in turn determines passive filtering element sizes and dimensioning of the cooling system. An accurate power loss model of the power semiconductor devices is needed for switching power con- verter design and optimization and to quantify the system-level advantages of novel SiC devices compared to conventional silicon devices. Since power semiconductor device performance plays a key role in power electron- ics applications, power electronics designers need circuit-oriented device models to simulate the in-circuit performance of power devices in different applications. The basic objective in device modeling is to obtain a predictive description of the current flow through the device as a function of the applied voltages and currents, environ- mental conditions, such as temperature and radiation, and physical characteristics, such as geometry, doping levels, and so on. In general, there is a trade-off between computational speed and model accuracy. The required accuracy and simulation timeare crucial factors considered by device model designers when making this tradeoff. In this dissertation, the analysis and applications of wide bandgap power devices can be divided into two parts: development of analytical loss model for wide bandgap power devices, and development of wide bandgap power semiconductor device models. In the first part, a simple and accurate analytical switching loss model for SiC power devices is developed. This model considers the device capacitances and the parasitic inductances in the circuit, which have a strong impact on switching losses. In addition, the reverse recovery effect of the body diode of SiC MOSFET is considered. The detailed analysis of turn-on and turn-off transitions is presented. The accuracy of the proposed model is validated by experimental results, and the accuracy of the proposed loss model and conventional piecewise linear loss model is compared. The proposed analytical loss model has several advantages: it gives insight into the switching process, showing how different parameters and parasitics affect switching waveforms and determine switching losses; it provides accurate and simple closed-form switching loss calculation; it is useful for optimization given the fast calculation speed and the absence of numerical convergence problems; all power device parameters can be derived from datasheets (but requires parasitics estimation); it includes MOSFET body diode reverse recovery; it provides piecewise linear estimate of actual switching waveforms. In the second part, a simple and accurate circuit-simulator compact model for sili- con carbide (SiC) MOSFET is proposed and validated under both static and switching conditions. A novel feature of the proposed model is that it takes into account the nonlinear parasitic capacitances of the device and parameter extraction requires only data from device manufacturer datasheet. A parameter extraction procedure is pro- posed. A simulation model is built in Pspice software tool. The PSpice simulation results are compared with datasheet results. The comparison shows good agreement between simulation and datasheet results for both static and dynamic characteris-tics

    Design and Switching Performance Evaluation of a 10 kV SiC MOSFET Based Phase Leg for Medium Voltage Applications

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    10 kV SiC MOSFETs are promising to substantially boost the performance of future medium voltage (MV) converters, ranging from MV motor drives to fast charging stations for electric vehicles (EVs). Numerous factors influence the switching performance of 10 kV SiC MOSFETs with much faster switching speed than their Si counterparts. Thorough evaluation of their switching performance is necessary before applying them in MV converters. Particularly, the impact of parasitic capacitors in the MV converter and the freewheeling diode is investigated to understand the switching performance more comprehensively and guide the converter design based on 10 kV SiC MOSFETs.A 6.5 kV half bridge phase leg based on discrete 10 kV/20 A SiC MOSFETs is designed and fully validated to operate continuously at rated voltage with dv/dt up to 80 V/ns. Based on the phase leg, the impact of parasitic capacitors brought by the load inductor and the heatsink on the switching transients and performance of 10 kV SiC MOSFETs is investigated. Larger parasitic capacitors result in more oscillations, longer switching transients, as well as higher switching energy loss especially at low load current. As for the freewheeling diode, the body diode of 10 kV SiC MOSFETs is suitable to serve as the freewheeling diode, with negligible reverse recovery charge at various temperatures. The switching performance with and without the anti-parallel SiC junction barrier Schottky (JBS) diode is compared quantitatively. It is not recommended to add an anti-parallel diode for the 10 kV SiC MOSFET in the converter because it increases the switching loss

    Analysis and Development of SiC MOSFET Boost Converter as Solar PV Pre-regulator

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    Renewable energy source such as photovoltaic (PV) cell generates power from the sun light by converting solar power to electrical power with no moving parts and less maintenance. A single photovoltaic cell produces voltage of low level. In order to boost up the voltage, a DC-DC boost converter is used. In order to use this DC-DC converter for high voltage and high frequency applications, Silicon Carbide (SiC) device is most preferred because of larger current carrying capability, higher voltage blocking capability, high operating temperature and less static and dynamic losses than the traditional silicon (Si) power switches. In the proposed work, the static and dynamic characteristics of SiC MOSFET for different temperatures are observed. A SiC MOSFET based boost converter is investigated which is powered by PV source. This DC - DC converter is controlled using a Pulse-Width Method (PWM) and the duty cycle d is calculated for tracking the maximum power point using incremental conductance algorithm of the PV systems implemented in FPGA. Simulation studies are carried out in MATLAB/SIMULINK.A prototype of the SiC converter is built and the results are verified experimentally. The performance parameters of the proposed converter such as output voltage ripple input current ripple and losses are computed and it is compared with the classical silicon (Si) MOSFET converter.Comment: 24 page

    High Efficiency Reversible Fuel Cell Power Converter

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    High Power Density and High Efficiency Converter Topologies for Renewable Energy Conversion and EV Applications

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    This dissertation work presents two novel converter topologies (a three-level ANPC inverter utilizing hybrid Si/SiC switches and an Asymmetric Alternate Arm Converter (AAAC) topology) that are suitable for high efficiency and high-power density energy conversion systems. The operation principle, modulation, and control strategy of these newly introduced converter topologies are presented in detail supported by simulation and experimental results. A thorough design optimization of these converter topologies (Si/SiC current rating ratio optimization and gate control strategies for the three-level ANPC inverter topology and component sizing for the asymmetric alternate arm converter topology) are also presented. Performance comparison of the proposed converter topologies with other similar converter topologies is also presented. The performance of the proposed ANPC inverter topology is compared with other ANPC inverter topologies such as an all SiC MOSFET ANPC inverter topology, an all Si IGBT ANPC inverter topology and mixed Si IGBT and SiC MOSFET based ANPC inverter topologies in terms of efficiency and cost. The efficiency and cost comparison results show that the proposed hybrid Si/SiC switch based ANPC inverter has higher efficiency and lower cost compared to the other ANPC inverter topologies considered for the comparison. The performance of the asymmetric alternate arm converter topology is also compared with other similar voltage source converter topologies such as the modular multilevel converter topology, the alternate arm converter topology, and the improved alternate arm converter topology in terms of total device count, number of switches per current conduction path, output voltage levels, dc-fault blocking capability and overmodulation capability. The proposed multilevel converter topology has lower total number of devices and lower number of devices per current conduction path hence it has lower cost and lower conduction power loss. However, it has lower number of output voltage levels (requiring larger ac interface inductors) and lacks dc-fault blocking and overmodulation operation capabilities. A converter figure-of-merit accounting for the hybrid Si/SiC switch and converter topology properties is also proposed to help perform quick performance comparison between different hybrid Si/SiC switch based converter topologies. It eliminates the need for developing full electro-thermal power loss model for different converter topologies that would otherwise be needed to carry out power loss comparison between different converter topologies. Hence it saves time and effort

    Methodology to Improve Switching Speed of SiC MOSFETs in Hard Switching Applications

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    To meet the higher efficiency and power density requirement for power converters, the switching speed of power devices is preferred to increase. Thanks to silicon carbide (SiC) power MOSFETs, their intrinsic superior switching characteristics compared with silicon IGBTs makes it possible to run converters at faster switching speed in hard switching applications. Nevertheless, the switching speed is not only dependent on the device’s characteristics, but also strongly related to the circuit like gate drive and parasitics. To fully utilize the potential of SiC MOSFETs, the impact factors limiting the switching speed are required to be understood. Specific solutions and methods need to be developed to mitigate the influence from these impact factors.The characterization of the switching speed for SiC MOSFETs with different current ratings is conducted with double pulse test (DPT) first. Based on the result, the impact factors of switching speed are evaluated in detail.According to the evaluation, the switching speed of SiC discrete devices with low current rating is mainly limited by the gate drive capability. A current source gate drive as well as a charge pump gate drive are proposed, which can provide higher current during the switching transient regardless of the low transconductance and large internal gate resistance of SiC discrete devices.For SiC power modules with high current rating, the switching speed is mainly determined by the device drain-source overvoltage resulting from circuit parasitics. An analytical model for the multiple switching loops related overvoltage in 3L-ANPC converters is established. A simple modulation is developed to mitigate the effect of the non-linear device output capacitance, which helps reduce the overvoltage and enables higher switching speed operation of SiC power modules.Furthermore, the layout design methodology for three-level converters concerning the multiple commutation loops is introduced. The development of a laminated busbar for a 500 kVA 3L-ANPC converter with SiC power modules is presented in detail.Finally, a SiC based 1 MW inverter is built and tested to operate at cryogenic temperature. The proposed control and busbar above are utilized to increase the switching speed of the SiC power module

    An enhanced single gate driven voltage-balanced SiC MOSFET stack topology suitable for high-voltage low-power applications

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    Abstract In the fabrication of some high‐voltage low‐power applications, low cost is much concerned, and thus using silicon carbide (SiC) MOSFET stack consisting of series connected low‐voltage devices is preferred rather than using an expensive single high‐voltage device. Therefore, a cost‐efficient single gate driven voltage‐balanced SiC MOSFET stack topology is proposed in this paper, where only some passive components are equipped with the stack. With a concept of single gate driver, the gate driver design of an SiC MOSFET stack is simplified. With an automatic balancing circuit which operates well with the sequential lagging single gate driver, good voltage balancing of SiC MOSFETs in the stack is realized without causing much extra loss and no additional active control is required. The working principle is illustrated in detail and the parameter selection together with design consideration is presented. Next, this topology is compared with RCD snubber method and active delay adjusting method to better illustrate its advantages. Finally, in a typical high‐voltage low‐power application, auxiliary power supply, the simulation and experimental results further verify the effectiveness of the proposed topology
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