A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can be properly exploited to obtain a reconfigurable sensor system. This adaptation capability enables the implementation of complex applications using the partial reconfigurability at a very low-power consumption. For highly demanding tasks FPGAs have been favored due to the high efficiency provided by their architectural flexibility (parallelism, on-chip memory, etc.), reconfigurability and superb performance in the development of algorithms. FPGAs have improved the performance of sensor systems and have triggered a clear increase in their use in new fields of application. A new generation of smarter, reconfigurable and lower power consumption sensors is being developed in Spain based on FPGAs. In this paper, a review of these developments is presented, describing as well the FPGA technologies employed by the different research groups and providing an overview of future research within this field.The research leading to these results has received funding from the Spanish Government and European FEDER funds (DPI2012-32390), the Valencia Regional Government (PROMETEO/2013/085) and the University of Alicante (GRE12-17)

Electronic Photonic Integrated Circuits and Control Systems

Photonic systems can operate at frequencies several orders of magnitude higher than electronics, whereas electronics offers extremely high density and easily built memories. Integrated photonic-electronic systems promise to combine advantage of both, leading to advantages in accuracy, reconfigurability and energy efficiency. This work concerns of hybrid and monolithic electronic-photonic system design. First, a high resolution voltage supply to control the thermooptic photonic chip for time-bin entanglement is described, in which the electronics system controller can be scaled with more number of power channels and the ability to daisy-chain the devices. Second, a system identification technique embedded with feedback control for wavelength stabilization and control model in silicon nitride photonic integrated circuits is proposed. Using the system, the wavelength in thermooptic device can be stabilized in dynamic environment. Third, the generation of more deterministic photon sources with temporal multiplexing established using field programmable gate arrays (FPGAs) as controller photonic device is demonstrated for the first time. The result shows an enhancement to the single photon output probability without introducing additional multi-photon noise. Fourth, multiple-input and multiple-output (MIMO) control of a silicon nitride thermooptic photonic circuits incorporating Mach Zehnder interferometers (MZIs) is demonstrated for the first time using a dual proportional integral reference tracking technique. The system exhibits improved performance in term of control accuracy by reducing wavelength peak drift due to internal and external disturbances. Finally, a monolithically integrated complementary metal oxide semiconductor (CMOS) nanophotonic segmented transmitter is characterized. With segmented design, the monolithic Mach Zehnder modulator (MZM) shows a low link sensitivity and low insertion loss with driver flexibility

Embedded electronic systems driven by run-time reconfigurable hardware

Abstract This doctoral thesis addresses the design of embedded electronic systems based on run-time reconfigurable hardware technology –available through SRAM-based FPGA/SoC devices– aimed at contributing to enhance the life quality of the human beings. This work does research on the conception of the system architecture and the reconfiguration engine that provides to the FPGA the capability of dynamic partial reconfiguration in order to synthesize, by means of hardware/software co-design, a given application partitioned in processing tasks which are multiplexed in time and space, optimizing thus its physical implementation –silicon area, processing time, complexity, flexibility, functional density, cost and power consumption– in comparison with other alternatives based on static hardware (MCU, DSP, GPU, ASSP, ASIC, etc.). The design flow of such technology is evaluated through the prototyping of several engineering applications (control systems, mathematical coprocessors, complex image processors, etc.), showing a high enough level of maturity for its exploitation in the industry.Resumen Esta tesis doctoral abarca el diseño de sistemas electrónicos embebidos basados en tecnología hardware dinámicamente reconfigurable –disponible a través de dispositivos lógicos programables SRAM FPGA/SoC– que contribuyan a la mejora de la calidad de vida de la sociedad. Se investiga la arquitectura del sistema y del motor de reconfiguración que proporcione a la FPGA la capacidad de reconfiguración dinámica parcial de sus recursos programables, con objeto de sintetizar, mediante codiseño hardware/software, una determinada aplicación particionada en tareas multiplexadas en tiempo y en espacio, optimizando así su implementación física –área de silicio, tiempo de procesado, complejidad, flexibilidad, densidad funcional, coste y potencia disipada– comparada con otras alternativas basadas en hardware estático (MCU, DSP, GPU, ASSP, ASIC, etc.). Se evalúa el flujo de diseño de dicha tecnología a través del prototipado de varias aplicaciones de ingeniería (sistemas de control, coprocesadores aritméticos, procesadores de imagen, etc.), evidenciando un nivel de madurez viable ya para su explotación en la industria.Resum Aquesta tesi doctoral està orientada al disseny de sistemes electrònics empotrats basats en tecnologia hardware dinàmicament reconfigurable –disponible mitjançant dispositius lògics programables SRAM FPGA/SoC– que contribueixin a la millora de la qualitat de vida de la societat. S’investiga l’arquitectura del sistema i del motor de reconfiguració que proporcioni a la FPGA la capacitat de reconfiguració dinàmica parcial dels seus recursos programables, amb l’objectiu de sintetitzar, mitjançant codisseny hardware/software, una determinada aplicació particionada en tasques multiplexades en temps i en espai, optimizant així la seva implementació física –àrea de silici, temps de processat, complexitat, flexibilitat, densitat funcional, cost i potència dissipada– comparada amb altres alternatives basades en hardware estàtic (MCU, DSP, GPU, ASSP, ASIC, etc.). S’evalúa el fluxe de disseny d’aquesta tecnologia a través del prototipat de varies aplicacions d’enginyeria (sistemes de control, coprocessadors aritmètics, processadors d’imatge, etc.), demostrant un nivell de maduresa viable ja per a la seva explotació a la indústria

RecoNode: Towards an Autonomous Multi-Robot Team Agent for USAR

Urban search and rescue (USAR) robots can benefit from small size as it facilitates movement in cramped quarters. Yet, small size limits actuator power, sensor payloads, computational capacity and battery life. We are alleviating these issues by developing the hardware and software infrastructure for high performance, heterogeneous, dynamically-reconfigurable miniature USAR robots, as well as a host of other relevant applications. In this thesis, a generic modular embedded system architecture based on the RecoNode multiprocessor is proposed, which consists of a set of hardware and software modules that can be configured to construct various types of robot systems for dynamic and unforeseen changes in the USAR environment. The benefit of this Reconfigurable Node is that, at run-time, the system can react to unexpected changes in configuration, such as nodes exhausting their batteries or the failure of sensors. These modules include a high performance microprocessor supporting complete on board processing for autonomous control, a reconfigurable hardware component, and diverse sensor and actuator interfaces. The design of all the modules in the electrical subsystem allows for the replacement of the motion control and serial communication capabilities within a dedicated FPGA logic module, which helps gain system performance by releasing the CPU from these tasks. The selection of module components and real-time scheduler and operating system (OS) are described. The portable power supply solution is also designed and tested

Design, Development and Implementation of Intelligent Algorithms to Increase Autonomy of Quadrotor Unmanned Missions

This thesis presents the development and implementation of intelligent algorithms to increase autonomy of unmanned missions for quadrotor type UAVs. A six-degree-of freedom dynamic model of a quadrotor is developed in Matlab/Simulink in order to support the design of control algorithms previous to real-time implementation. A dynamic inversion based control architecture is developed to minimize nonlinearities and improve robustness when the system is driven outside bounds of nominal design. The design and the implementation of the control laws are described. An immunity-based architecture is introduced for monitoring quadrotor health and its capabilities for detecting abnormal conditions are successfully demonstrated through flight testing. A vision-based navigation scheme is developed to enhance the quadrotor autonomy under GPS denied environments. An optical flow sensor and a laser range finder are used within an Extended Kalman Filter for position estimation and its estimation performance is analyzed by comparing against measurements from a GPS module. Flight testing results are presented where the performances are analyzed, showing a substantial increase of controllability and tracking when the developed algorithms are used under dynamically changing environments. Healthy flights, flights with failures, flight with GPS-denied navigation and post-failure recovery are presented

Practical strategies to stabilize a nanosatellite platform with a space camera and integrated mechanical parts

The growth and speed of nanosatellite capabilities has led to an increasing demand on the respective attitude control systems. Typically, nanosatellites utilise minaturised reaction wheels for 3-axis stabilisation/manoeuvres, which are desaturated using magnetorquers. Small space telescopes have been deployed from nanosatellites in the past with capability ever increasing to push the limit of detectors. Previous work has established the feasibility of achieving GSD of 0.7 m in low Earth orbit for a 2.5 U CubeSat using deployable mirrors from a 400 km orbit. The dynamic model of nanosatellite with the telescope + the deployed mirror systems will be built in this research work. The deployed mirror system will use a diamond turned mirror - it's an off axis paraboloid. The mirror would be light-weighted as much as possible, i.e. the back surface would be carved away with good thermal stability. The mechanisms for mirror systems may use methods like minature geared motors, stiction motors and shape memory alloy hinges. The sensoring and directing of the mirror surface will use an image based detection methods. A closed loop control of the mirror position will be used to iterate to a fully aligned system. This work also considers control strategies to stabilise such a platform against the effects of firstly, the external aerodynamics and secondly, any internal disturbances induced by and the movement of focussing elements. A pointing accuracy of 5-10 arcsec for a 20 min observation over the UK is targeted at a baseline orbit of 350 km sun-synchronous. Following an initial baseline to establish current state-of-art both based on in-orbit performance and off-the-shelf subsystems available to the market within the constraints of a 3U nanosatellite system, a number of feed-forward/feedback control loops and sensor systems are studied to determine a simple process for compensating for the motion

A Compact Camera with a Reconfigurable Real-time Embedded Image Processor for Pharmaceutical Capsule Inspections

The following thesis presents the system requirements, design methodology, final hardware design and system integration of a custom digital camera for high-speed pharmaceutical capsule inspections. The primary goals of the camera design were to minimize the cost of the device and to have a flexible design that could be easily upgraded in the future. For this application, a 3.1 mega pixel CMOS image sensor was used with a USB 2.0 interface. In addition, the custom camera can pre-process image data in an embedded, reconfigurable real-time image processor implemented in a FPGA. All data processing in the camera occurs with only buffering four rows of an image, eliminating the need for RAM on the device and lowering the overall cost. The final design was manufactured and implemented into a complete inspection system which used 16 of these cameras to inspect up to 60 000 capsules per second