On variability and reliability of poly-Si thin-film transistors

In contrast to conventional bulk-silicon technology, polysilicon (poly-Si) thin-film transistors (TFTs) can be implanted in flexible substrate and can have low process temperature. These attributes make poly-Si TFT technology more attractive for new applications, such as flexible displays, biosensors, and smart clothing. However, due to the random nature of grain boundaries (GBs) in poly-Si film and self-heating enhanced negative bias temperature instability (NBTI), the variability and reliability of poly-Si TFTs are the main obstacles that impede the application of poly-Si TFTs in high-performance circuits. The primary focus of this dissertation is to develop new design methodologies and modeling techniques for facilitating new applications of poly-Si TFT technology. In order to do that, a physical model is first presented to characterize the GB-induced transistor threshold voltage (V th)variations considering not only the number but also the position and orientation of each GB in 3-D space. The fast computation time of the proposed model makes it suitable for evaluation of GB-induced transistor Vthvariation in the early design phase. Furthermore, a self-consistent electro-thermal model that considers the effects of device geometry, substrate material, and stress conditions on NBTI is proposed. With the proposed modeling methodology, the significant impacts of device geometry, substrate, and supply voltage on NBTI in poly-Si TFTs are shown. From a circuit design perspective, a voltage programming pixel circuit is developed for active-matrix organic light emitting diode (AMOLED) displays for compensating the shift of Vth and mobility in driver TFTs as well as compensating the supply voltage degradation. In addition, a self-repair design methodology is proposed to compensate the GB-induced variations for liquid crystal displays (LCDs) and AMOLED displays. Based on the simulation results, the proposed circuit can decrease the required supply voltage by 20% without performance and yield degradation. In the final section of this dissertation, an optimization methodology for circuit-level reliability tests is explored. To effectively predict circuit lifetime, accelerated aging (i.e. elevated voltage and temperature) is commonly applied in circuit-level reliability tests, such as constant voltage stress (CVS) and ramp voltage stress (RVS) tests. However, due to the accelerated aging, shifting of dominant degradation mechanism might occur leading to the wrong lifetime prediction. To get around this issue, we proposed a technique to determine the proper stress range for accelerated aging tests

Thin-Film Transistor Integration for Biomedical Imaging and AMOLED Displays

Thin film transistor (TFT) backplanes are being continuously researched for new applications such as active-matrix organic light emitting diode (AMOLED) displays, sensors, and x-ray imagers. However, the circuits implemented in presently available fabrication technologies including poly silicon (poly-Si), hydrogenated amorphous silicon (a-Si:H), and organic semiconductor, are prone to spatial and/or temporal non-uniformities. While current-programmed active matrix (AM) can tolerate mismatches and non-uniformity caused by aging, the long settling time is a significant limitation. Consequently, acceleration schemes are needed and are proposed to reduce the settling time to 20 µs. This technique is used in the development of a pixel circuit and system for biomedical imager and sensor. Here, a metal-insulator-semiconductor (MIS) capacitor is adopted for adjustment and boost of the circuit gain. Thus, the new pixel architecture supports multi-modality imaging for a wide range of applications with various input signal intensities. Also, for applications with lower current levels, a fast current-mode line driver is developed based on positive feedback which controls the effect of the parasitic capacitance. The measured settling time of a conventional current source is around 2 ms for a 100-nA input current and 200-pF parasitic capacitance whereas it is less than 4 μs for the driver presented here. For displays needed in mobile devices such as cell phones and DVD players, another new driving scheme is devised that provides for a high temporal stability, low-power consumption, high tolerance of temperature variations, and high resolution. The performance of the new driving scheme is demonstrated in a 9-inch fabricated display intended for DVD players. Also, a multi-modal imager pixel circuit is developed using this technique to provide for gain-adjustment capability. Here, the readout operation is not destructive, enabling the use of low-cost readout circuitry and noise reduction techniques. In addition, a highly stable and reliable driving scheme, based on step calibration is introduced for high precision displays and imagers. This scheme takes advantage of the slow aging of the electronics in the backplane to simplify the drive electronics. The other attractive features of this newly developed driving scheme are its simplicity, low-power consumption, and fast programming critical for implementation of large-area and high-resolution active matrix arrays for high precision

Pixel design and characterization of high-performance tandem OLED microdisplays

Organic Light-Emitting Diode (OLED) microdisplays - miniature Electronic Displays comprising a sandwich of organic light emitting diode over a substrate containing CMOS circuits designed to function as an active matrix backplane – were first reported in the 1990s and, since then, have advanced to the mainstream. The smaller dimensions and higher performance of CMOS circuit elements compared to that of equivalent thin film transistors implemented in technologies for large OLED display panels offer a distinct advantage for ultra-miniature display screens. Conventional OLED has suffered from lifetime degradation at high brightness and high current density. Recently, tandem-structure OLED devices have been developed using charge generation layers to implement two or more OLED units in a single stack. They can achieve higher brightness at a given current density. The combination of emissive-nature, fast response, medium to high luminance, low power consumption and appropriate lifetime makes OLED a favoured candidate for near-to-eye systems. However, it is also challenging to evaluate the pixel level optical response of OLED microdisplays as the pixel pitch is extremely small and relative low light output per pixel. Advanced CMOS Single Photon Avalanche Diode (SPAD) technology is progressing rapidly and is being deployed in a wide range of applications. It is also suggested as a replacement for photomultiplier tube (PMT) for photonic experiments that require high sensitivity. CMOS SPAD is a potential tool for better and cheaper display optical characterizations. In order to incorporate the novel tandem structure OLED within the computer aided design (CAD) flow of microdisplays, we have developed an equivalent circuit model that accurately describes the tandem OLED electrical characteristics. Specifically, new analogue pulse width modulation (PWM) pixel circuit designs have been implemented and fabricated in small arrays for test and characterization purposes. We report on the design and characterization of these novel pixel drive circuits for OLED microdisplays. Our drive circuits are designed to allow a state-of-the-art sub-pixel pitch of around 5 μm and implemented in 130 nm CMOS. A performance comparison with a previous published analogue PWM pixel is reported. Moreover, we have employed CMOS SPAD sensors to perform detailed optical measurements on the OLED microdisplay pixels at very high sampling rate (50 kHz, 10 μs exposure), very low light level (2×10-4 cd/m2) and over a very wide dynamic range (83 dB) of luminance. This offers a clear demonstration of the potential of the CMOS SPAD technology to reveal hitherto obscure details of the optical characteristics of individual and groups of OLED pixels and thereby in display metrology in general. In summary, there are three key contributions to knowledge reported in this thesis. The first is a new equivalent circuit model specifically for tandem structure OLED. The model is verified to provide accurately illustrate the electrical response of the tandem OLED with different materials. The second is the novel analogue PWM pixel achieve a 5μm sub-pixel pitch with 2.4 % pixel-to-pixel variation. The third is the new application and successful characterization experiment of OLED microdisplay pixels with SPAD sensors. It revealed the OLED pixel overshoot behaviour with a QIS SPAD sensor

Bİyopotansiyel işaretlerin ikinci nesil akım taşıyıcılar ile işlenmesi ve yeni bir EKG devresi tasarımı

06.03.2018 tarihli ve 30352 sayılı Resmi Gazetede yayımlanan “Yükseköğretim Kanunu İle Bazı Kanun Ve Kanun Hükmünde Kararnamelerde Değişiklik Yapılması Hakkında Kanun” ile 18.06.2018 tarihli “Lisansüstü Tezlerin Elektronik Ortamda Toplanması, Düzenlenmesi ve Erişime Açılmasına İlişkin Yönerge” gereğince tam metin erişime açılmıştır.Anahtar kelimeler: CCII, ikinci nesil akım taşıyıcılar, filtre, EKG Bu çalışmada bir EKG cihazı tasarlanmış ve bu cihaz ikinci nesil akım taşıyıcılar ile gerçekleştirilmiştir. Bu EKG devresinde ikinci nesil akım taşıyıcılar filtre olarak kullanılmıştır. Bu cihazın doğruluğunu kontrol edebilmek ve karşılaştırmasını yapabilmek için Sakarya Üniversitesi Elektrik-Elektronik Mühendisliği'ne ait olan BIOPAC Systems Inc. şirketinin imal ettiği MP36 EKG cihazı ile ölçümler eş zamanlı olarak yapılmıştır. Ayrıca OPAMP'larla tasarlanan bir EKG devresi de gerçekleştirilmiş ve sonuçları değerlendirilmiştir. OPAMP'larla gerçekleştirilen bu devre ikinci nesil akım taşıyıcılarla yeniden dizayn edilmiş ve gerçekleştirilerek sonuçları değerlendirilmiştir. Böylece OPAMP'larla gerçekleştirilmiş bir EKG devresi, ikinci nesil akım taşıyıcılarla yeniden dizayn edilmiş bir EKG devresi, bu çalışmada tasarlanmış ve ikinci nesil akım taşıyıcılarla tasarlanmış bir EKG devresi, MP36 devresi ve daha önce literatürde gerçekleştirilmiş EKG devrelerinin kıyaslaması yapılmıştır. Ayrıca biyomedikal cihazlarda sıklıkla kullanılan filtreler, yükselteçler ve bazı devreler simule edilmiştir. CCII tabanlı olan devrede gürültüler minimuma inmiş ve çok net EKG ölçümü yapılabilmiştir. EKG devresi 9,5*9,5 cm2 boyutlarına kadar indirgenebilmiştir. Entegrelerin ve diğer elemanların SMD türlerinin kullanılması ile daha da küçültülebilmesi mümkündür. Gerçeklenen devre maliyet açısından da avantajlıdır. 4 adet kalem pille çalışabilir olması da bir diğer avantajıdır. CMRR oranı, frekans aralığı, yükseltme oranı ve uygulanabilme kolaylığı açısından CCII tabanlı olan EKG devrelerinin daha avantajlı olduğu sonucu ortaya çıkmaktadır. Ayrıca bu çalışmada rezonans frekansını ayarlamak ve daha iyi sonuç elde edebilmek için CCII yapısına ayarlı dirençler eklenmesi sebebiyle 5 Hz ile 100 MHz arasında bir kesim frekansına sahip bir filtre yapısı öne sürüldü ve bu devrede kullanılabilir olduğu gözlemlendi.Keywords: CCII, second generation current conveyors, filter, ECG In this study, an ECG device was designed and this device was carried out with second generation current carriers. Second generation current carriers were used as filters in this ECG circuit. Measurements were simultaneously performed with MP36 ECG device produced by BIOPAC Systems Inc. that is belong to Sakarya University Electrical and Electronics Engineering Department in order to be able to check and compare accuracy of this device. An ECG circuit designed with OPAMPs was also carried out and results were evaluated. This circuit, which was realized with OPAMPs, was redesigned with second generation current carriers and results were evaluated by performing. Thus, an ECG circuit realized with OPAMPs, a redesigned ECG circuit with second generation current carriers were designed in this study, and an ECG circuit with second generation current carriers, MP36 circuit and previous circuits in literature were compared. In addition, filters, amplifiers and some circuits, which are frequently used in biomedical devices are simulated. Noises were reduced to minimum in CCII-based circuit and very clear ECG measurements was done. ECG circuit can be reduced to size of 9.5 * 9.5 cm2. It is possible to further reduce integrals and other elements by use of SMD types. Performed circuit is also advantageous in terms of cost. Another advantage is that it can work with 4 batteries. It was concluded that CCII based ECG circuits are more advantageous in terms of CMRR ratio, frequency range, amplification rate and ease of application. Also, in this study, a filter structure having a cut-off frequency between 5 Hz to 100 MHz was proposed because of adding adjusted resistors to CCII structure to adjust resonance frequency and achieve better results, and it was observed to be usable in this circuit

The Effective Transmission and Processing of Mobile Multimedia

Ph.DDOCTOR OF PHILOSOPH

Active Pixel Sensor Architectures for High Resolution Large Area Digital Imaging

This work extends the technology of amorphous silicon (a-Si) thin film transistors (TFTs) from traditional switching applications to on-pixel signal amplification for large area digital imaging and in particular, is aimed towards enabling emerging low noise, high resolution and high frame rate medical diagnostic imaging modalities such as digital tomosynthesis. A two transistor (2T) pixel amplifier circuit based on a novel charge-gate thin film transistor (TFT) device architecture is introduced to shrink the TFT based pixel readout circuit size and complexity and thus, improve the imaging array resolution and reliability of the TFT fabrication process. The high resolution pixel amplifier results in improved electrical performance such as on-pixel amplification gain, input referred noise and faster readouts. In this research, a charge-gated TFT that operates as both a switched amplifier and driver is used to replace two transistors (the addressing switch and the amplifier transistor) of previously reported three transistor (3T) APS pixel circuits.. In addition to enabling smaller pixels, the proposed 2T pixel amplifier results in better signal-to-noise (SNR) by removing the large flicker noise source associated with the switched TFT and increased pixel transconductance gain since the large ON-state resistance of the switched TFT is removed from the source of the amplifier TFT. Alternate configurations of 2T APS architectures based on source or drain switched TFTs are also investigated, compared, and contrasted to the gate switched architecture using charge-gated TFT. A new driving scheme based on multiple row resetting is introduced which combined with the on-pixel gain of the APS, offers considerable improvements in imaging frame rates beyond those feasible for PPS based pixels. The novel developed 2T APS architectures is implemented in single pixel test structures and in 88 pixel test arrays with a pixel pitch of 100 µm. The devices were fabricated using an in-house developed top-gate TFT fabrication process. Measured characteristics of the test devices confirm the performance expectations of the 2T architecture design. Based on parameters extracted from fabricated TFTs, the input referred noise is calculated, and the instability in pixel transconductance gain over prolonged operation tine is projected for different imaging frame rates. 2T APS test arrays were packaged and integrated with an amorphous selenium (a-Se) direct x-ray detector, and the x-ray response of the a-Se detector integrated with the novel readout circuit was evaluated. The special features of the APS such as non-destructive readout and voltage programmable on-pixel gain control are verified. The research presented in this thesis extends amorphous silicon pixel amplifier technology into the area of high density pixel arrays such as large area medical X-ray imagers for digital mammography tomosynthesis. It underscores novel device and circuit design as an effective method of overcoming the inherent shortcomings of the a-Si material . Although the developed device and circuit ideas were implemented and tested using a-Si TFTs, the scope of the device and circuit designs is not limited to amorphous silicon technology and has the potential to be applied to more mainstream technologies, for example, in CMOS active pixel sensor (APS) based digital cameras

SPATIAL TRANSFORMATION PATTERN DUE TO COMMERCIAL ACTIVITY IN KAMPONG HOUSE

ABSTRACT Kampung houses are houses in kampung area of the city. Kampung House oftenly transformed into others use as urban dynamics. One of the transfomation is related to the commercial activities addition by the house owner. It make house with full private space become into mixused house with more public spaces or completely changed into full public commercial building. This study investigate the spatial transformation pattern of the kampung houses due to their commercial activities addition. Site observations, interviews and questionnaires were performed to study the spatial transformation. This study found that in kampung houses, the spatial transformation pattern was depend on type of commercial activities and owner perceptions, and there are several steps of the spatial transformation related the commercial activity addition. Keywords: spatial transformation pattern; commercial activity; owner perception, kampung house; adaptabilit

High voltage metal oxide thin film transistors to drive arrays of dielectric elastomer actuators

This thesis advances the field of high-voltage thin film transistors (HVTFTs) and dielectric elastomer actuators (DEAs) by demonstrating a strategy for low-voltage addressing of an array of high voltage soft actuators suspended on a flexible substrate. First, I present the first HVTFTs operating at 1 kV drain-source voltage, switching with an on-off ratio of 20 at 80 V gate-source voltage. The HVTFTs can operate at high voltage thanks to geometrical features increasing the breakdown voltage: a thick gate dielectric composed of a bilayer of alumina (100 nm) and Parylene-C (1 um), a long semiconducting channel (500 um), and a 150 &mlong non-gated region between the drain and the gate electrode called the offset gate. The use of an amorphous oxide semiconductor (AOS), zinc tin oxide (ZTO), enables a high on-currents of 0.1 mA. The ZTO was synthesized by a sol-gel process after spin-coating on a flexible polyimide substrate, previously passivated with alumina. I optimized the HVTFT switching properties by doping the ZTO layer with yttrium (5%). It improved the on-off ratio up to 1000 at 500 V operation voltage by decreasing the leakage current down to 100 nA. Then, I show the first integration of HVTFTs with DEAs. My ZTO HVTFTs switch DEAs on and off with only 30 V gate voltage under a bias voltage of 1.4 kV. The system time response in 50 ms. The demonstrator is a 4x4 array of diaphragm DEAs. A layer of 4x4 DEAs is suspended over a layer of 4x4 HVTFTs built on flexible polyimide. The DEAs and the HVTFTs were interconnected thanks to a flexible PCB in a resistive load inverter circuit architecture. A flexible 3D printed chamber was constantly biasing the DEA diaphragms with a back-pressure. The DEAs were made of PDMS and the active region is defined by overlapping carbon-PDMS electrodes. The device operates down to a 5mm radius of curvature. Finally, I demonstrate latching of the HVTFT and the DEA by using triboelectric sensors. Under a constant 500 V circuit bias, the control of the HVTFT gate with triboelectric generators enabled 4s latching of the inverter output voltage at 470 V for the off-state and at 120 V for the on-state. The latching of the DEAs with the HVTFT circuit finally proves that this approach can lead to a bistable control of DEAs. This PhD thesis results show that my HVTFTs are versatile components usable not only to address DEAs but also to interface low voltage sensors with high voltage actuators