Design of a Digital Temperature Sensor based on Thermal Diffusivity in a Nanoscale CMOS Technology

Temperature sensors are widely used in microprocessors to monitor on-chip temperature gradients and hot-spots, which are known to negatively impact reliability. Such sensors should be small to facilitate floor planning, fast to track millisecond thermal transients, and easy to trim to reduce the associated costs. Recently, it has been shown that thermal diffusivity (TD) sensors can meet these requirements. These sensors operate by digitalizing the temperature-dependent delay associated with the diffusion of heat pulses through an electro-thermal filter (ETF), which, in standard CMOS, can be readily implemented as a resistive heater surrounded by a thermopile. Unlike BJT-based temperature sensors, their accuracy actually improves with CMOS scaling, since it is mainly limited by the accuracy of the heather/thermopile spacing. In this work is presented the electrical design of an highly digital TD sensor in 0.13 µm CMOS with an accuracy better than 1 ºC resolution at with 1 kS/s sampling rate, and which compares favourably to state-of-the-art sensors with similar accuracy and sampling rates [1][2][3][4]. This advance is mainly enabled by the adoption of a highly digital CCO-based phasedomain ΔΣ ADC. The TD sensor presented consists of an ETF, a transconductance stage, a current-controlled oscillator (CCO) and a 6 bit digital counter. In order to be easily ported to nanoscale CMOS technologies, it is proposed to use a sigmadelta modulator based on a CCO as an alternative to traditional modulators. And since 70% of the sensor’s area is occupied by digital circuitry, porting the sensor to latest CMOS technologies process should reduce substantially the occupied die area, and thus reduce significantly the total sensor area

Current-mode processing based Temperature-to-Digital Converters for MEMS applications

This thesis presents novel Temperature-to-Digital Converters (TDCs) designed and fabricated in CMOS technology. These integrated smart temperature sensing circuits are widely employed in the Micro-Electro-Mechanical Systems (MEMS) field in order to mitigate the impact of the ambient temperature on their performance. In this framework, the increasingly stringent demands of the market have led the cost-effectiveness specification of these compensation solutions to an higher and higher level, directly translating into the requirement of more and more compact designs (< 0.1 mm²); in addition to this, considering that the great majority of the systems whose thermal drift needs to be compensated is battery supplied, ultra-low energy-per-conversion (< 10 nJ) is another requirement of primary importance. This thesis provides a detailed description of two different test-chips (mas fuerte and es posible) that have been designed with this orientation and that are the result of three years of research activity; for both devices, the conception, design, layout and testing phases are all described in detail and are supported by simulation and measurement results.This thesis presents novel Temperature-to-Digital Converters (TDCs) designed and fabricated in CMOS technology. These integrated smart temperature sensing circuits are widely employed in the Micro-Electro-Mechanical Systems (MEMS) field in order to mitigate the impact of the ambient temperature on their performance. In this framework, the increasingly stringent demands of the market have led the cost-effectiveness specification of these compensation solutions to an higher and higher level, directly translating into the requirement of more and more compact designs (< 0.1 mm²); in addition to this, considering that the great majority of the systems whose thermal drift needs to be compensated is battery supplied, ultra-low energy-per-conversion (< 10 nJ) is another requirement of primary importance. This thesis provides a detailed description of two different test-chips (mas fuerte and es posible) that have been designed with this orientation and that are the result of three years of research activity; for both devices, the conception, design, layout and testing phases are all described in detail and are supported by simulation and measurement results

Integrated temperature sensor bipolar core

Cílem této práce je popsat možné způsoby realizace teplotního senzoru na křemíkovém čipu v běžných CMOS výrobních technologiích a představit konkrétní implementaci analogového jádra teplotního senzoru využívajícího bipolární tranzistory ve výrobní technologii TSMC 110. Techniky jako chopping, dynamic element matching nebo trimování byly použity k navržení obvodů, jejichž simulovaná 3 přesnost měření je ±3.5 °C bez trimování nebo ±0.6 °C s po jedné trimovací operaci napříč vojenským teplotním rozsahem. Navržené obvody zabírají pouze 0.012 mm čtverečních plochy čipu a jejich celkové parametry jsou srovnatelné s výsledky současných publikovaných prací.The aim of this thesis is to describe the main possible ways of implementing a smart temperature sensor on a silicon chip in common CMOS process technologies and to design an analog front-end of a bipolar transistor based smart temperature sensor in TSMC 110 process technology. Techniques such as chopping, dynamic element matching or trimming have been utilized to design circuits whose simulated 3 measurement precision is ±3.5 °C untrimmed or ±0.6 °C after single point trim over the military temperature range. The designed circuits occupy as little as 0.012 mm squared of die area and their overall performance is comparable to the current state of the art.

Analog and mixed-signal design and test techniques for improved reliability

The relentless evolution of semiconductor technology has led to a pervasive reliance on integrated circuits (ICs) across an array of applications, from consumer electronics to safety-critical systems in automotive and medical devices. Ensuring the reliability and robustness of these ICs has become paramount. This dissertation addresses the growing need for defect-oriented testing in analog and mixed-signal (AMS) circuits, introducing a novel digital-like methodology. It emphasizes breaking down complex AMS circuits into smaller, manageable subcircuits, which are rigorously examined using purely digital monitors and injectors. The methodology is resource-efficient, optimizing existing circuit resources to minimize area overhead and power consumption. A significant achievement lies in the development of a Built-In Self-Test (BIST) for a 12-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC), showcasing the approach's effectiveness and flexibility. Additionally, this dissertation pioneers a smart sensor design approach that reduces dependence on intricate device models, thereby ensuring high performance across a broad range of operating conditions. A case study on a temperature-to-digital converter (TDC) design demonstrates its capability to function reliably over an extensive temperature range. The methodology optimizes parameters, allowing energy-efficient sensor designs that meet industry standards while minimizing silicon area and power consumption. These works signify a dedicated commitment to advancing the reliability and functional safety of analog and mixed-signal circuits, contributing to the evolving landscape of IC design

In-situ and In-field temperature and transistor BTI sensing techniques with microprocessor level implementation

In modern deep-scaled CMOS technologies, various silicon-related pitfalls present challenges to the long-term performance of microprocessors. Such challenges include (1) local hot spots, which breach the thermal limitations of a microprocessor, and (2) transistor aging, especially NBTI, which degrades transistor threshold voltage, ultimately threatening the reliability of the entire memory block. In previous systems, the dummy circuit was placed next to the subject, where the dummy was frequently analyzed, and the readout was used to infer the condition of the target. Due to rapidly changing ambient conditions (e.g., temperature and voltage) and the potential scale of the target dimensions, such metrics may not accurately represent the condition of the target. Moreover, such temperature sensors and canary circuits occupy a significant area. Therefore, it would be highly preferable to monitor the target circuit in-situ, i.e., to sense the precise transistor at operation. It is also important to achieve an accurate sensing metric. When the temperature is analyzed, the readout should account for voltage and process variations. While sensing the aging degradation, the readout should account for voltage and temperature fluctuations. This would allow testing during in-field operation, while the circuits achieve area-efficiency. This research had two stages. One result of the first stage was a silicon test chip that was a compact temperature sensor. It involved a family of PTAT+CTAT sensor front-ends that unitized only 6 to 8 conventional CMOS logic devices, yielding a smaller sized chip. The sensor demonstrates accuracy within the target and achieves a 14.3x smaller foot print than preceding published designs. The second product of the first stage was a PMOS aging sensor used in 6T SRAM circuits. The test chip has a real SRAM array, integrated with the proposed PMOS NBTI sensor. It can sense real PMOS NBTI effects in any bit cell (in-situ) and provide robust readings of temperature and voltage (in-field). Intensive aging tests validated the proposed sensing technique. The second stage was focused on implementing the in-situ and in-field sensing techniques in a real processor. The MIPS microprocessor had a modified instruction cache (I$) and instruction set architecture. With the addition of new instruction aging sensing and minor modification of the circuits, the processor can execute aging sensing opportunistically to evaluate the aging level of its instruction cache. A software framework was developed and verified to estimate the retention voltage of the instruction cache over the lifetime of the chip. An area-efficient SoC was developed that could transform the instruction cache into an ambient temperature sensor. It had a physically unclonable function (PUF), and it was built with an area-saving technique similar to the earlier work. This thesis has four chapters. They are presented in chronological and they are aligned with the research described above

Integration of Si/Si-Ge nanostructures in micro-thermoelectric generators

[eng] Silicon and silicon-germanium nanostructures were grown, integrated, optimized and characterized for their application in thermoelectric generation. Specifically two kinds of nanostructures were worked: silicon and silicon-germanium nanowire arrays (Si/Si-Ge NW) and polycrystalline silicon nanotube fabrics (pSi NT). The results are dived in four chapters. Chapters 3, 4 and 5 deal with Si/Si-Ge NWs, while chapter 6 presents the pSi NT fabrics. In Chapter 3 the growth and integration of Si/Si-Ge NWs was studied, in order to optimize their properties for thermoelectric application in micro-thermoelectric generators (µTEG). First, the methods for depositing gold nanoparticles prior to NW growth were studied. Second, the growth of NWs from the gold nanoparticles in a Chemical Vapour Deposition (CVD) process was comprehensively studied and optimized for subsequent integration of NWs in µTEGs, both of Si and Si-Ge. All important properties – NW length, diameter, density, doping and alignment – could be controlled by tuning the seeding gold nanoparticles and the process conditions, namely temperature, pressure, flows of reactants and growth time. Finally, integration was demonstrated in micro-structures for thermoelectric generation and characterization. The optimization process yielded to fully integrated thermoelectric Si/Si-Ge NW arrays with diameters and densities of ~100 nm and 5 NW/µm2 respectively. In Chapter 4 the Si NWs were thermoelectrically characterized. The Seebeck coefficient, electrical conductivity and thermal conductivity of arrays and single Si-NWs were measured in microstructures devoted to characterization comprising NWs integrated as in final µTEG application. Additionally a novel atomic force microscope based method for determination of thermal conductivity was explored. Then the results were discussed comparing them with existing literature. A ZT of 0.022 was found at room temperature, revealing an improvement of factor 2-3 with respect to bulk. In Chapter 5 The harvesting capabilities of µTEGs with integrated Si/Si-Ge NWs was assessed. The thermal gradient and the power of the µTEGs was assessed for two generation of devices and for two thermoelectric materials, namely Si and Si-Ge NWs, which were integrated for the first time in functional generators. Also a study on heat sinking and convection effects was conducted adding insight towards further device improvement. Finally, the results were discussed and compared with literature. The maximum power densities attained were 4.5 µW/cm2 for the Si NWs and 4.9 µW/cm2 for the Si-Ge NWs while harvesting over surfaces at 350 ºC. Chapter 6 deals with pSi NT fibers. First this new material concept and the growth route are presented, showing the fabrication steps and the control of the resulting properties by CVD method. Then the material is thermoelectrically characterized, by measuring its Seebeck coefficient and electrical and thermal conductivities up to 450 ºC. A ZT of 0.12 was found, doubling the optimally doped bulk at this temperature. Finally a proof of concept was demonstrated by assessing the thermal harvesting capabilities of the material on top of hot surfaces. A maximum of 3.5 mW/cm2 was attained at 650 ºC.[spa] Los materiales termoeléctricos permiten la conversión de calor a electricidad y viceversa. Esto permite explotar el efecto termoeléctrico en generadores termoeléctricos, capaces de extraer energía térmica de fuentes calientes y convertirla a electricidad útil. Estos generadores presentan grandes ventajas, como su falta de piezas móviles – y por ende necesidad de mantenimiento alguna – y su total escalabilidad, que permite cambiar su tamaño sin afectar su rendimiento. Esto los hace obvios candidatos para la alimentación y carga de dispositivos portátiles y situados lugares de difícil acceso. A pesar de ello, su uso no está muy extendido debido a que su relación eficiencia-coste es baja en comparación a otros métodos capaces de suplir las funciones de alimentación – como la sustitución periódica de baterías – o de conversión térmica-eléctrica – como las turbinas de vapor. Los materiales termoeléctricos suelen ser o eficientes y caros (como el Bi2Te3 usado en los módulos comerciales) o ineficientes y de bajo coste (como el silicio, barato por su abundancia ya que supone un 28% de la corteza terrestre). En este trabajo se han crecido nanostructuras de silicio y silicio-germano, con dimensiones en el orden de los 100 nm. Los nanomateriales presentan propiedades termoeléctricas mejoradas respecto a sus contrapartes macroscópicas. Gracias a la nanoestructuración pues, se ha abordado del problema de eficiencia-coste por dos vertientes: • En el caso del silicio – normalmente un mal termoeléctrico debido a su alta conductividad térmica – se ha habilitado su uso como termoeléctrico al crecerlo en forma de nanohilos cristalinos y nanotubos de silicio policristalino. • En el caso de silicio-germano – que ya es un buen termoeléctrico para uso en altas temperaturas – se ha aumentado su eficiencia aún más, creciéndolo en forma de nanohilos. Yendo más allá de la síntesis, los nanohilos de silicio/silicio-germano se han optimizado, caracterizado en integrado en gran número micro-generadores termoeléctricos de 1 mm2 de superficie, pensados para la alimentación de pequeños dispositivos y circuitos integrados. Respecto a los nanotubos de Si, estos se han obtenido en densas fibras macroscópicas aptas para su aplicación directa como generadores termoeléctricos de gran área. Cabe mencionar que ambos nanomateriales – así como los microgeneradores basados en nanohilos – fueron obtenidos mediante técnicas actualmente utilizadas para la fabricación de circuitos integrados, pensando en la escalabilidad del proceso para su aplicación. El trabajo presentado en esta tesis consiste en el crecimiento, optimización, estudio e integración de nanostructuras de Si/Si-Ge para su aplicación en generación termoeléctrica. En los Capítulos 1 y 2 se pone un marco a los materiales tratados y su aplicación y se describen los métodos utilizados, respectivamente. Los resultados se han dividido en cuatro capítulos. En los Capítulos 3, 4 y 5 se tratan los nanohilos abordando su crecimiento, caracterización y aplicación en microgeneradores, respectivamente. En el Capítulo 6 se tratan las fibras de nanotubos, integrando todo el estudio en el mismo capítulo. Finalmente en el Capítulo 7 se muestran las conclusiones, resumiendo los resultados e indicando la relevancia del trabajo

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Effect of curing conditions and harvesting stage of maturity on Ethiopian onion bulb drying properties

The study was conducted to investigate the impact of curing conditions and harvesting stageson the drying quality of onion bulbs. The onion bulbs (Bombay Red cultivar) were harvested at three harvesting stages (early, optimum, and late maturity) and cured at three different temperatures (30, 40 and 50 oC) and relative humidity (30, 50 and 70%). The results revealed that curing temperature, RH, and maturity stage had significant effects on all measuredattributesexcept total soluble solids

Microfluidics and Nanofluidics Handbook

The Microfluidics and Nanofluidics Handbook: Two-Volume Set comprehensively captures the cross-disciplinary breadth of the fields of micro- and nanofluidics, which encompass the biological sciences, chemistry, physics and engineering applications. To fill the knowledge gap between engineering and the basic sciences, the editors pulled together key individuals, well known in their respective areas, to author chapters that help graduate students, scientists, and practicing engineers understand the overall area of microfluidics and nanofluidics. Topics covered include Finite Volume Method for Numerical Simulation Lattice Boltzmann Method and Its Applications in Microfluidics Microparticle and Nanoparticle Manipulation Methane Solubility Enhancement in Water Confined to Nanoscale Pores Volume Two: Fabrication, Implementation, and Applications focuses on topics related to experimental and numerical methods. It also covers fabrication and applications in a variety of areas, from aerospace to biological systems. Reflecting the inherent nature of microfluidics and nanofluidics, the book includes as much interdisciplinary knowledge as possible. It provides the fundamental science background for newcomers and advanced techniques and concepts for experienced researchers and professionals