High-Linearity Self-Biased CMOS Current Buffer

A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the input-output current ratio and total harmonic distortion (THD) figures lower than -60 dB at 30 mu A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications

Uma referência de tensão CMOS integrada utilizando transistor composto cascode e diodo Schottky

This work shows a study of temperature behavior of self-cascode composite transistors (SCCTs) and Schottky diode in order to generate both PTAT and CTAT voltages of a temperature-compensated voltage reference. The SCCTs study also shows that it is possible to obtain a compensated voltage with a proper sizing and biasing of the SCCT. The voltage reference was designed based on achieved results and it was fabricated in a 130 nm CMOS process. The circuit occupies an area of 67.98 μm x 161.7 μm and it was measured in temperature and power-supply variation. A trimming circuit also is added to the reference in order to adjust the temperature coefficient (TC). The averaged output voltage is 720 mV with a VDD of 1.1 V. The averaged TC is 56 ppm/ºC in a temperature range of -40 to 85 ºC. The circuit works in a power-supply range of 1.1 to 2.5 V and its power consumption is 750 nW.Agência 1Este trabalho apresenta o estudo da performance em temperatura de self-cascode composite transistors (SCCTs) e do diodo Schottky com o objetivo de gerar as tensões PTAT e CTAT, respectivamente, que compõem uma referência de tensão compensada na temperatura. O estudo dos SCCTs também mostrou ser possível obter uma tensão compensada apenas ajustando a dimensão e o ponto de operação dos transistores que formam o SCCT. A referência foi projetada baseada nestes resultados e fabricada em um processo CMOS 130 nm. O circuito ocupa uma área de 67,98 μm x 161,7 μm. Para validação do projeto, o circuito foi medido com a variação de temperatura e tensão de alimentação. Um circuito de ajuste também foi projetado para ajustar o coeficiente de temperatura da referência (TC). A tensão de saída média obtida foi de 720 mV em um VDD de 1,1 V. O TC médio obtido foi 56 ppm/ºC em uma faixa de temperatura de -40 a 85 ºC. O circuito opera em uma faixa e tensão de alimentação de 1,1 a 2,5 V. O consumo do circuito é de 750 nW

DIEstro: Motion sensor platform for cattle oestrus detection

The reproductive efficiency of dairy industry has decreased over the last ten years due mainly to an intensification of the management techniques of the herd, and an increase of total number of animals. A main objective of worldwide dairy farms is to ensure that dairy cows, produce as much milk as possible. A cow produces milk while it has a calf to breastfeed, therefore, the less time passes between births, the more ”productive” the cows are. This is the principal reason why the precise heat (oestrus) detection has became so important, a task traditionally assigned to veterinary and expert people examining and watching the cattle behavior, and in recent years to electronic devices monitoring the cow’s physical activity. Tracking the animal’s physical activity by means of a portable device strapped to each animal, is known to be a very effective way to determine heat, but sometimes requires expensive hardware and large batteries. In this work, a low-cost micropower wireless system able to automatically detect oestrus period of cattle is presented. It was designed in cooperation with BQN, a company developing technology for the agribusiness industry in Uruguay. The tracker seizes the recent availability of 1 uA micropower accelerometers, LoRa long range transceivers, and FRAM microcontrollers, to achieve a coin cell battery powered paradigm for oestrus detection. The device records 3 axis acceleration information, process it, and periodically sends it to a server; it has a measured ultra low power consumption of 4 uA while collecting/processing data, reaching a very large (> 10km) communication distance using a star topology and LoRa technology at countryside areas. The scope of the project and this documentation is the entire hardware and firmware development, from the start idea, design and final implementation.Agencia Nacional de Investigación e Innovació

DIEstro: Motion sensor platform for cattle oestrus detection

The reproductive efficiency of dairy industry has decreased over the last ten years due mainly to an intensification of the management techniques of the herd, and an increase of total number of animals. A main objective of worldwide dairy farms is to ensure that dairy cows, produce as much milk as possible. A cow produces milk while it has a calf to breastfeed, therefore, the less time passes between births, the more ”productive” the cows are. This is the principal reason why the precise heat (oestrus) detection has became so important, a task traditionally assigned to veterinary and expert people examining and watching the cattle behavior, and in recent years to electronic devices monitoring the cow’s physical activity. Tracking the animal’s physical activity by means of a portable device strapped to each animal, is known to be a very effective way to determine heat, but sometimes requires expensive hardware and large batteries. In this work, a low-cost micropower wireless system able to automatically detect oestrus period of cattle is presented. It was designed in cooperation with BQN, a company developing technology for the agribusiness industry in Uruguay. The tracker seizes the recent availability of 1 uA micropower accelerometers, LoRa long range transceivers, and FRAM microcontrollers, to achieve a coin cell battery powered paradigm for oestrus detection. The device records 3 axis acceleration information, process it, and periodically sends it to a server; it has a measured ultra low power consumption of 4 uA while collecting/processing data, reaching a very large (> 10km) communication distance using a star topology and LoRa technology at countryside areas. The scope of the project and this documentation is the entire hardware and firmware development, from the start idea, design and final implementation.Agencia Nacional de Investigación e Innovació

A Methodology for Accelerating FPGA Fault Injection Campaign Using ICAP

The increasing complexity of System-on-Chip (SoC) and the ongoing technology miniaturization on Integrated Circuit (IC) manufacturing processes makes modern SoCs more susceptible to Single-Event Effects (SEE) caused by radiation, even at sea level. To provide realistic estimates at a low cost, efficient analysis techniques capable of replicating SEEs are required. Among these methods, fault injection through emulation using Field-Programmable Gate Array (FPGA) enables campaigns to be run on a Circuit Under Test (CUT). This paper investigates the use of an FPGA architecture to speed up the execution of fault campaigns. As a result, a new methodology for mapping the CUT occupation on the FPGA is proposed, significantly reducing the total number of faults to be injected. In addition, a fault injection technique/flow is proposed to demonstrate the benefits of cutting-edge approaches. The presented technique emulates Single-Event Transient (SET) in all combinatorial elements of the CUT using the Internal Configuration Access Port (ICAP) of Xilinx FPGAs.N/

A Study on the Convergence of Family Particle Swarm Optimization

The sociological concept of family has been introduced in the particle swarm optimization (PSO) and the family PSO (FPSO) has been proposed, in which the particle swarm consisted of different families, each family consisted of different members, and there were different constraint relationships between family members. To further study the sensitivity of FPSO to the control parameters, this paper proposed a special model of FPSO and analyzed the convergence of FPSO theoretically. This model offered a new view to research the particle trajectory and divided the position sequence of particle into the even and odd subsequences. By mathematical analysis, the condition of two subsequences convergence was obtained and the related convergent theories and corollaries were proved. Simulations for benchmark functions showed that the convergence behavior of model and experimental results provided a valuable guideline for selecting control parameters

Design architectures of the CMOS power amplifier for 2.4 GHz ISM band applications: An overview

Power amplifiers (PAs) are among the most crucial functional blocks in the radio frequency (RF) frontend for reliable wireless communication. PAs amplify and boost the input signal to the required output power. The signal is amplified to make it sufficiently high for the transmitter to propagate the required distance to the receiver. Attempted advancements of PA have focused on attaining high-performance RF signals for transmitters. Such PAs are expected to require low power consumption while producing a relatively high output power with a high efficiency. However, current PA designs in nanometer and micrometer complementary metal–oxide semiconductor (CMOS) technology present inevitable drawbacks, such as oxide breakdown and hot electron effect. A well-defined architecture, including a linear and simple functional block synthesis, is critical in designing CMOS PA for various applications. This article describes the different state-of-the art design architectures of CMOS PA, including their circuit operations, and analyzes the performance of PAs for 2.4 GHz ISM (industrial, scientific, and medical) band applications

Integrated Building Cells for a Simple Modular Design of Electronic Circuits with Reduced External Complexity: Performance, Active Element Assembly, and an Application Example

This paper introduces new integrated analog cells fabricated in a C035 I3T25 0.35-m ON Semiconductor process suitable for a modular design of advanced active elements with multiple terminals and controllable features. We developed and realized five analog cells on a single integrated circuit (IC), namely a voltage differencing differential buffer, a voltage multiplier with current output in full complementary metal–oxide–semiconductor (CMOS) form, a voltage multiplier with current output with a bipolar core, a current-controlled current conveyor of the second generation with four current outputs, and a single-input and single-output adjustable current amplifier. These cells (sub-blocks of the manufactured IC device), designed to operate in a bandwidth of up to tens of MHz, can be used as a construction set for building a variety of advanced active elements, offering up to four independently adjustable internal parameters. The performances of all individual cells were verified by extensive laboratory measurements, and the obtained results were compared to simulations in the Cadence IC6 tool. The definition and assembly of a newly specified advanced active element, namely a current-controlled voltage differencing current conveyor transconductance amplifier (CC-VDCCTA), is shown as an example of modular interconnection of the selected cells. This device was implemented in a newly synthesized topology of an electronically linearly tunable quadrature oscillator. Features of this active element were verified by simulations and experimental measurements

Evolutionary Computation 2020

Intelligent optimization is based on the mechanism of computational intelligence to refine a suitable feature model, design an effective optimization algorithm, and then to obtain an optimal or satisfactory solution to a complex problem. Intelligent algorithms are key tools to ensure global optimization quality, fast optimization efficiency and robust optimization performance. Intelligent optimization algorithms have been studied by many researchers, leading to improvements in the performance of algorithms such as the evolutionary algorithm, whale optimization algorithm, differential evolution algorithm, and particle swarm optimization. Studies in this arena have also resulted in breakthroughs in solving complex problems including the green shop scheduling problem, the severe nonlinear problem in one-dimensional geodesic electromagnetic inversion, error and bug finding problem in software, the 0-1 backpack problem, traveler problem, and logistics distribution center siting problem. The editors are confident that this book can open a new avenue for further improvement and discoveries in the area of intelligent algorithms. The book is a valuable resource for researchers interested in understanding the principles and design of intelligent algorithms