Engineering Automation for Reliable Software Interim Progress Report (10/01/2000 - 09/30/2001)

Prepared for: U.S. Army Research Office P.O. Box 12211 Research Triangle Park, NC 27709-2211The objective of our effort is to develop a scientific basis for producing reliable software that is also flexible and cost effective for the DoD distributed software domain. This objective addresses the long term goals of increasing the quality of service provided by complex systems while reducing development risks, costs, and time. Our work focuses on "wrap and glue" technology based on a domain specific distributed prototype model. The key to making the proposed approach reliable, flexible, and cost-effective is the automatic generation of glue and wrappers based on a designer's specification. The "wrap and glue" approach allows system designers to concentrate on the difficult interoperability problems and defines solutions in terms of deeper and more difficult interoperability issues, while freeing designers from implementation details. Specific research areas for the proposed effort include technology enabling rapid prototyping, inference for design checking, automatic program generation, distributed real-time scheduling, wrapper and glue technology, and reliability assessment and improvement. The proposed technology will be integrated with past research results to enable a quantum leap forward in the state of the art for rapid prototyping.U. S. Army Research Office P.O. Box 12211 Research Triangle Park, NC 27709-22110473-MA-SPApproved for public release; distribution is unlimited

System engineering and evolution decision support, Final Progress Report (05/01/1998 - 09-30-2001)

The objective of our effort is to develop a scientific basis for system engineering automation and decision support. This objective addresses the long term goals of increasing the quality of service provided complex systems while reducing development risks, costs, and time. Our work focused on decision support for designing operations of complex modular systems that can include embedded software. Emphasis areas included engineering automation capabilities in the areas of design modifications, design records, reuse, and automatic generation of design representations such as real-time schedules and software.U.S. Army Research OfficeFunding number(s): DSAM 90387, DWAM 80013, DWAM 90215

Revisiting the high-performance reconfigurable computing for future datacenters

Modern datacenters are reinforcing the computational power and energy efficiency by assimilating field programmable gate arrays (FPGAs). The sustainability of this large-scale integration depends on enabling multi-tenant FPGAs. This requisite amplifies the importance of communication architecture and virtualization method with the required features in order to meet the high-end objective. Consequently, in the last decade, academia and industry proposed several virtualization techniques and hardware architectures for addressing resource management, scheduling, adoptability, segregation, scalability, performance-overhead, availability, programmability, time-to-market, security, and mainly, multitenancy. This paper provides an extensive survey covering three important aspects-discussion on non-standard terms used in existing literature, network-on-chip evaluation choices as a mean to explore the communication architecture, and virtualization methods under latest classification. The purpose is to emphasize the importance of choosing appropriate communication architecture, virtualization technique and standard language to evolve the multi-tenant FPGAs in datacenters. None of the previous surveys encapsulated these aspects in one writing. Open problems are indicated for scientific community as well

Proceedings of Monterey Workshop 2001 Engineering Automation for Sofware Intensive System Integration

The 2001 Monterey Workshop on Engineering Automation for Software Intensive System Integration was sponsored by the Office of Naval Research, Air Force Office of Scientific Research, Army Research Office and the Defense Advance Research Projects Agency. It is our pleasure to thank the workshop advisory and sponsors for their vision of a principled engineering solution for software and for their many-year tireless effort in supporting a series of workshops to bring everyone together.This workshop is the 8 in a series of International workshops. The workshop was held in Monterey Beach Hotel, Monterey, California during June 18-22, 2001. The general theme of the workshop has been to present and discuss research works that aims at increasing the practical impact of formal methods for software and systems engineering. The particular focus of this workshop was "Engineering Automation for Software Intensive System Integration". Previous workshops have been focused on issues including, "Real-time & Concurrent Systems", "Software Merging and Slicing", "Software Evolution", "Software Architecture", "Requirements Targeting Software" and "Modeling Software System Structures in a fastly moving scenario".Office of Naval ResearchAir Force Office of Scientific Research Army Research OfficeDefense Advanced Research Projects AgencyApproved for public release, distribution unlimite

The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration

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Survey of Motion Tracking Methods Based on Inertial Sensors: A Focus on Upper Limb Human Motion

Motion tracking based on commercial inertial measurements units (IMUs) has been widely studied in the latter years as it is a cost-effective enabling technology for those applications in which motion tracking based on optical technologies is unsuitable. This measurement method has a high impact in human performance assessment and human-robot interaction. IMU motion tracking systems are indeed self-contained and wearable, allowing for long-lasting tracking of the user motion in situated environments. After a survey on IMU-based human tracking, five techniques for motion reconstruction were selected and compared to reconstruct a human arm motion. IMU based estimation was matched against motion tracking based on the Vicon marker-based motion tracking system considered as ground truth. Results show that all but one of the selected models perform similarly (about 35 mm average position estimation error)

Compilation efficace pour FPGA reconfigurable dynamiquement

Thèse numérisée par la Division de la gestion de documents et des archives de l'Université de Montréal

Untersuchungen zur Kostenoptimierung für Hardware-Emulatoren durch Anwendung von Methoden der partiellen Laufzeitrekonfiguration

Der vorliegende Band der wissenschaftlichen Schriftenreihe Eingebettete Selbstorganisierende Systeme widmet sich der Optimierung von Hardware Emulatoren durch die Anwendung von Methoden der partiellen Laufzeitrekonfiguration. An aktuelle Schaltkreis- und Systementwürfe werden zunehmend divergente Anforderungen gestellt. Einer sehr kurzen Entwicklungszeit für eine schnelle Markteinführung steht, um teure und aufwändige Re-Desings zu verhindern, eine möglichst umfangreiche Testabdeckung des Entwurfs gegenüber. Um die Zeit für die Tests zu reduzieren, kommen überwiegend FPGA-basierte HW-Emulatoren zum Einsatz. Durch den Einfluss der steigenden Komplexität aktueller Entwürfe auf die Emulator-Plattform reduziert sich jedoch signifikant die Performance der Emulatoren. Die in Emulatoren eingesetzten FPGAs sind aber zunehmend partiell zur Laufzeit rekonfigurierbar. Der in der vorliegenden Arbeit umgesetzte Ansatz behandelt die Anwendung von Methoden der Laufzeitrekonfiguration auf dem Gebiet der Hardware-Emulation. Dafür ist zunächst eine Partitionierung des zu testenden Entwurfs in möglichst funktional unabhängige Systemteile notwendig. Für eine optimierte und ressourceneffiziente Platzierung der einzelnen HW-Module während der Emulation, ist ein ebenfalls auf dem FPGA platziertes Kommunikationsnetzwerk implementiert. Der vorgestellte Ansatz wird an verschiedenen Beispielen anschaulich illustriert. So kann der Leser die Mächtigkeit der entwickelten Methodik nachvollziehen und wird motiviert, das Verfahren auch auf weitere Anwendungsfälle zu übertragen.Current circuit and system designs consist a lot of gate numbers and divergent requirements. In contrast to a short development and time to market schedule, the needs for perfect test coverage and quality are rising. One approach to cover this problem is the FPGA based functional test of electronic circuits. State of the art FPGA platforms doesn't consist enough gates to support fully custom designs. The thesis catches this problem and gives some approaches to use partial dynamic reconfiguration to solve the size problem. A fully automated design flow demonstrates partial partitioning of designs, modifications to use dynamic reconfiguration and its schedule. At the end of the work, some examples demonstrates the power of the approach

Third Workshop on Modelling of Objects, Components, and Agents

This booklet contains the proceedings of the Third International Workshop on Modelling of Objects, Components, and Agents (MOCA'04), October 11-13, 2004. The workshop is organised by the CPN group at the Department of Computer Science, University of Aarhus, Denmark and the "Theoretical Foundations of Computer Science" group at the University of Hamburg. The home page of the workshop is: http://www.daimi.au.dk/CPnets/workshop0