Isolated Single-stage Power Electronic Building Blocks Using Medium Voltage Series-stacked Wide-bandgap Switches

The demand for efficient power conversion systems that can process the energy at high power and voltage levels is increasing every day. These systems are to be used in microgrid applications. Wide-bandgap semiconductor devices (i.e. Silicon Carbide (SiC) and Gallium Nitride (GaN) devices) are very promising candidates due to their lower conduction and switching losses compared to the state-of-the-art Silicon (Si) devices. The main challenge for these devices is that their breakdown voltages are relatively lower compared to their Si counterpart. In addition, the high frequency operation of the wide-bandgap devices are impeded in many cases by the magnetic core losses of the magnetic coupling components (i.e. coupled inductors and/or high frequency transformers) utilized in the power converter circuit. Six new dc-dc converter topologies are propose. The converters have reduced voltage stresses on the switches. Three of them are unidirectional step-up converters with universal input voltage which make them excellent candidates for photovoltaic and fuel cell applications. The other three converters are bidirectional dc-dc converters with wide voltage conversion ratios. These converters are very good candidates for the applications that require bidirectional power flow capability. In addition, the wide voltage conversion ratios of these converters can be utilized for applications such as energy storage systems with wide voltage swings

Digitally Controlled Zero-Voltage-Switching Quasi-Resonant Buck Converter

ABSTRACT Digitally-Controlled Two-Phase Zero-Voltage-Switching Quasi-Resonant Buck Converter Brian Luc This thesis entails the design, construction, and performance analysis of a digitally-controlled two-phase Zero-Voltage Switching Quasi-Resonant (ZVS-QR) buck converter. The converter is aimed to address the issues associated with powering CPUs operating at lower voltage and high current. To evaluate its performance, the Two-Phase ZVS-QR buck converter is compared against a traditional Two-Phase buck converter. The design procedure required to implement both converters through utilizing the characterization curve and formulas derived from their circuit configurations will be presented. Computer simulation of the Two-Phase ZVS-QR buck converter is provided to exhibit its operation and potential for use in low voltage and high current applications. In addition, hardware prototypes for both ZVS-QR and traditional buck converters are constructed utilizing a Programmable Interface Controller (PIC). Results from hardware tests demonstrate the success of using digital controller for the 60W 12VDC to 1.5VDC ZVS-QR buck converter. Merits and drawbacks based on the operation and performance of both converters will also be assessed and described. Further work to improve the performance of ZVS-QR will also be presented. Keywords: Buck Converter; Zero-Voltage-Switching; Multi-Phase; Efficiency; Switching Los

Hybrid monolithic integration of high-power DC-DC converters in a high-voltage technology

The supply of electrical energy to home, commercial, and industrial users has become ubiquitous, and it is hard to imagine a world without the facilities provided by electrical energy. Despite the ever increasing efficiency of nearly every electrical application, the worldwide demand for electrical power continues to increase, since the number of users and applications more than compensates for these technological improvements. In order to maintain the affordability and feasibility of the total production, it is essential for the distribution of the produced electrical energy to be as efficient as possible. In other words the loss in the power distribution is to be minimized. By transporting electrical energy at the maximum safe voltage, the current in the conductors, and the associated conduction loss can remain as low as possible. In order to optimize the total efficiency, the high transportation voltage needs to be converted to the appropriate lower voltage as close as possible to the end user. Obviously, this conversion also needs to be as efficient, affordable, and compact as possible. Because of the ever increasing integration of electronic systems, where more and more functionality is combined in monolithically integrated circuits, the cost, the power consumption, and the size of these electronic systems can be greatly reduced. This thorough integration is not limited to the electronic systems that are the end users of the electrical energy, but can also be applied to the power conversion itself. In most modern applications, the voltage conversion is implemented as a switching DC-DC converter, in which electrical energy is temporarily stored in reactive elements, i.e. inductors or capacitors. High switching speeds are used to allow for a compact and efficient implementation. For low power levels, typically below 1 Watt, it is possible to monolithically implement the voltage conversion on an integrated circuit. In some cases, this is even done on the same integrated circuit that is the end user of the electrical energy to minimize the system dimensions. For higher power levels, it is no longer feasible to achieve the desired efficiency with monolithically integrated components, and some external components prove indispensable. Usually, the reactive components are the main limiting factor, and are the first components to be moved away from the integrated circuit for increasing power levels. The semiconductor components, including the power transistors, remain part of the integrated circuit. Using this hybrid approach, it is possible in modern converterapplications to process around 60 Watt, albeit limited to voltages of a few Volt. For hybrid integrated converters with an output voltage of tens of Volt, the power is limited to approximately 10 Watt. For even higher power levels, the integrated power transistors also become a limiting factor, and are replaced with discrete power devices. In these discrete converters, greatly increased power levels become possible, although the system size rapidly increases. In this work, the limits of the hybrid approach are explored when using so-called smart-power technologies. Smart-power technologies are standard lowcost submicron CMOS technologies that are complemented with a number of integrated high-voltage devices. By using an appropriate combination of smart-power technologies and circuit topologies, it is possible to improve on the current state-of-the-art converters, by optimizing the size, the cost, and the efficiency. To determine the limits of smart-power DC-DC converters, we first discuss the major contributing factors for an efficient energy distribution, and take a look at the role of voltage conversion in the energy distribution. Considering the limitations of the technologies and the potential application areas, we define two test-cases in the telecommunications sector for which we want to optimize the hybrid monolithic integration in a smart-power technology. Subsequently, we explore the specifications of an ideal converter, and the relevant properties of the affordable smart-power technologies for the implementation of DC-DC converters. Taking into account the limitations of these technologies, we define a cost function that allows to systematically evaluate the different potential converter topologies, without having to perform a full design cycle for each topology. From this cost function, we notice that the de facto default topology selection in discrete converters, which is typically based on output power, is not optimal for converters with integrated power transistors. Based on the cost function and the boundary conditions of our test-cases, we determine the optimal topology for a smart-power implementation of these applications. Then, we take another step towards the real world and evaluate the influence of parasitic elements in a smart-power implementation of switching converters. It is noticed that the voltage overshoot caused by the transformer secondary side leakage inductance is a major roadblock for an efficient implementation. Since the usual approach to this voltage overshoot in discrete converters is not applicable in smart-power converters due to technological limitations, an alternative approach is shown and implemented. The energy from the voltage overshoot is absorbed and transferred to the output of the converter. This allows for a significant reduction in the voltage overshoot, while maintaining a high efficiency, leading to an efficient, compact, and low-cost implementation. The effectiveness of this approach was tested and demonstrated in both a version using a commercially available integrated circuit, and our own implementation in a smart-power integrated circuit. Finally, we also take a look at the optimization of switching converters over the load range by exploiting the capabilities of highly integrated converters. Although the maximum output power remains one of the defining characteristics of converters, it has been shown that most converters spend a majority of their lifetime delivering significantly lower output power. Therefore, it is also desirable to optimize the efficiency of the converter at reduced output current and output power. By splitting the power transistors in multiple independent segments, which are turned on or off in function of the current, the efficiency at low currents can be significantly improved, without introducing undesirable frequency components in the output voltage, and without harming the efficiency at higher currents. These properties allow a near universal application of the optimization technique in hybrid monolithic DC-DC converter applications, without significant impact on the complexity and the cost of the system. This approach for the optimization of switching converters over the load range was demonstrated using a boost converter with discrete power transistors. The demonstration of our smart-power implementation was limited to simulations due to an issue with a digital control block. On a finishing note, we formulate the general conclusions and provide an outlook on potential future work based on this research

Study and design of topologies and components for high power density DC-DC converters

Size reduction of low power electronic DC–DC converters is a topic of major interest for power electronics which requires the study and design of circuits and components working under redefined requirements. For this purpose, novel circuital topologies provide advantages in terms of power density increment, especially where a single chip design is feasible. These concepts have been applied to design and implement an integrated high step-down multiphase buck converter and to study the miniaturization of a stackable fiflyback architecture. Particular attention has been dedicated to power inductors, focusing on the modeling and measurement of magnetic materials’ hysteresis and core losses

FY2011 Oak Ridge National Laboratory Annual Progress Report for the Power Electronics and Electric Machinery Program

The U.S. Department of Energy (DOE) announced in May 2011 a new cooperative research effort comprising DOE, the U.S. Council for Automotive Research (composed of automakers Ford Motor Company, General Motors Company, and Chrysler Group), Tesla Motors, and representatives of the electric utility and petroleum industries. Known as U.S. DRIVE (Driving Research and Innovation for Vehicle efficiency and Energy sustainability), it represents DOE's commitment to developing public-private partnerships to fund high risk-high reward research into advanced automotive technologies. The new partnership replaces and builds upon the partnership known as FreedomCAR (derived from 'Freedom' and 'Cooperative Automotive Research') that ran from 2002 through 2010 and the Partnership for a New Generation of Vehicles initiative that ran from 1993 through 2001. The Oak Ridge National Laboratory's (ORNL's) Power Electronics and Electric Machines (PEEM) subprogram within the DOE Vehicle Technologies Program (VTP) provides support and guidance for many cutting-edge automotive technologies now under development. Research is focused on developing revolutionary new power electronics (PE), electric motor (EM), and traction drive system technologies that will leapfrog current on-the-road technologies. The research and development (R&D) is also aimed at achieving a greater understanding of and improvements in the way the various new components of tomorrow's automobiles will function as a unified system to improve fuel efficiency. In supporting the development of advanced vehicle propulsion systems, the PEEM subprogram has enabled the development of technologies that will significantly improve efficiency, costs, and fuel economy. The PEEM subprogram supports the efforts of the U.S. DRIVE partnership through a three phase approach intended to: (1) identify overall propulsion and vehicle related needs by analyzing programmatic goals and reviewing industry's recommendations and requirements and then develop the appropriate technical targets for systems, subsystems, and component R&D activities; (2) develop and validate individual subsystems and components, including EMs and PE; and (3) determine how well the components and subsystems work together in a vehicle environment or as a complete propulsion system and whether the efficiency and performance targets at the vehicle level have been achieved. The research performed under this subprogram will help remove technical and cost barriers to enable the development of technology for use in such advanced vehicles as hybrid electric vehicles (HEVs), plug-in HEVs (PHEVs), battery electric vehicles, and fuel-cell-powered automobiles that meet the goals of the VTP. A key element in making these advanced vehicles practical is providing an affordable electric traction drive system. This will require attaining weight, volume, efficiency, and cost targets for the PE and EM subsystems of the traction drive system. Areas of development include: (1) novel traction motor designs that result in increased power density and lower cost; (2) inverter technologies involving new topologies to achieve higher efficiency with the ability to accommodate higher temperature environments while achieving high reliability; (3) converter concepts that use methods of reducing the component count and integrating functionality to decrease size, weight, and cost; (4) new onboard battery charging concepts that result in decreased cost and size; (5) more effective thermal control through innovative packaging technologies; and (6) integrated motor-inverter traction drive system concepts. ORNL's PEEM research program conducts fundamental research, evaluates hardware, and assists in the technical direction of the VTP Advanced Power Electronics and Electric Motors (APEEM) program. In this role, ORNL serves on the U.S. DRIVE Electrical and Electronics Technical Team, evaluates proposals for DOE, and lends its technological expertise to the direction of projects and evaluation of developing technologies. ORNL also executes specific projects for DOE. DOE's continuing R&D into advanced vehicle technologies for transportation offers the possibility of reducing the nation's dependence on foreign oil and the negative economic impacts of crude oil price fluctuations. It also supports the Administration's goal of deploying 1 million PHEVs by 2015

Power Management Techniques for Micropower Energy Scavenging

Advances in semi-conductor technology have led to the reduction in size and power consumption of microelectronic circuits. With the miniaturization and increased efficiency of these circuits there are more potential applications for wireless sensor networks and portable electronic equipment. These applications include structural integrity and environment monitoring such as aircraft wing health monitoring and forest fire and natural disaster detection. Biomedical devices have also benefited from the improved size and performance of microelectronics. This thesis studies power management techniques to enable efficient energy scavenging at micropower input power levels from a number of power sources. These sources range from temperature gradients, radio frequency (RF) radiation, solar power, and mechanical vibrations. The scavenged energy is used to improve the performance and distribution of wireless sensors and devices by supplementing or potentially replacing the local power supply of the sensor or device. The major focus of this thesis is to combine source characterization, power management theory, detailed power loss analysis, and ultra-low power circuit design to maximize the extraction of energy from source and deliver it to the wireless sensor or device. The resistor emulation techniques from power factor correction (PFC) are leveraged to load an RF rectifying antenna (rectenna) such that maximum power point tracking (MPPT) of the rectenna is achieved naturally. An application specific integrated circuit (ASIC) is developed to implement this technique after experimental verification with commercially available discrete circuitry. Experimental results show efficient energy scavenging at power levels below 2 microwatts. In addition to resistor emulation, synchronous electric charge extraction (SECE) for energy scavenging from piezoelectric generators is also investigated. The presented techniques allow for the scavenging of usable power for sensors at power levels significantly lower than previous research

Voltage equalisation techniques for high capacitance device modules

Phd ThesisTraditionally, the electrochemical battery has been the prime medium by which electrical energy is stored for future use. Increasingly, the demands of modern systems such as electric vehicles, renewable energy, distributed generation, smart grid and others has stretched the development of new chemistries, materials and assembly techniques for electrochemical batteries. Additionally, some load profiles in these applications demand extremely high dynamic behaviour which is either undeliverable by conventional electrochemical batteries or is undesirably damaging to these technologies. As such, a family of electrochemical storage, known generally as supercapacitors or ultracapacitors, have been developed and implemented for such applications. In recent years advancements in electrochemical technology has led to hybridisation of high capacitance devices. Lithium-ion capacitors that are used in this work are, with their higher cell voltage and modern packaging, expected to be among the next emerging families of state-of-the-art electrical energy storage devices. The relatively low cell voltage of high capacitance cells requires them to be connected in series to attain a system level voltage. During charging and discharging, manufacturing tolerances between the cells results in voltage mismatch across the stack. Mismatched voltages are an inefficient use of the energy storage medium and can lead to dangerous failures in the cells. Several techniques exist to limit the variance in cell voltages of supercapacitors across a series connected stack. These range from simple systems which discharge the cells at higher voltages through resistors to more complex active converter systems which equalise the cell voltages through charge redistribution via a power electronic converter. Whilst the simpler schemes are effective they are very inefficient and as such are not suitable for use in many applications. A number of active converter voltage equalisation schemes have been proposed in literature, however, each of these equalisation schemes exhibit flaws which either makes them less desirable or less effective for a broad range of applications. Therefore, a new equalisation converter topology is proposed which is designed for greater equalisation effectiveness, modularity and size. The proposed equalisation converter differs from previously published equalisation schemes by allowing energy transfer between any pair of cells without the cumbersome multi-winding transformers employed in existing equalisation converters. The new equalisation scheme uses a bi-directional arrangement of MOSFET switches for galvanostatic isolation allowing the converter to be multiplexed to the stack. This arrangement allows the total size of the equalisation scheme to be reduced whilst maintaining performance.EPSRC

Multi-Frequency Modulation and Control for DC/AC and AC/DC Resonant Converters

Harmonic content is inherent in switched-mode power supplies. Since the undesired harmonics interfere with the operation of other sensitive electronics, the reduction of harmonic content is essential for power electronics design. Conventional approaches to attenuate the harmonic content include passive/active filter and wave-shaping in modulation. However, those approaches are not suitable for resonant converters due to bulky passive volumes and excessive switching losses. This dissertation focuses on eliminating the undesired harmonics from generation by intelligently manipulating the spectrum of switching waveforms, considering practical needs for functionality.To generate multiple ac outputs while eliminating the low-order harmonics from a single inverter, a multi-frequency programmed pulse width modulation is investigated. The proposed modulation schemes enable multi-frequency generation and independent output regulation. In this method, the fundamental and certain harmonics are independently controlled for each of the outputs, allowing individual power regulations. Also, undesired harmonics in between output frequencies are easily eliminated from generation, which prevents potential hazards caused by the harmonic content and bulky filters. Finally, the proposed modulation schemes are applicable to a variety of DC/AC topologies.Two applications of dc/ac resonant inverters, i.e. an electrosurgical generator and a dual-mode WPT transmitter, are demonstrated using the proposed MFPWM schemes. From the experimental results of two hardware prototypes, the MFPWM alleviates the challenges of designing a complicated passive filter for the low-order harmonics. In addition, the MFPWM facilitates combines functionalities using less hardware compared to the state-of-the-art. The prototypes demonstrate a comparable efficiency while achieving multiple ac outputs using a single inverter.To overcome the low-efficiency, low power-density problems in conventional wireless fast charging, a multi-level switched-capacitor ac/dc rectifier is investigated. This new WPT receiver takes advantage of a high power-density switched-capacitor circuit, the low harmonic content of the multilevel MFPWMs, and output regulation ability to improve the system efficiency. A detailed topology evaluation regarding the regulation scheme, system efficiency, current THD and volume estimation is demonstrated, and experimental results from a 20 W prototype prove that the multi-level switched-capacitor rectifier is an excellent candidate for high-efficiency, high power density design of wireless fast charging receiver