OTA-based non-linear function approximations

The suitability of operational transconductance amplifiers (OTAs) as the main active element to obtain basic building blocks for the design of programmable nonlinear continuous-time networks is examined. The main purpose is to show that the OTA, as the active element in basic building blocks, can be efficiently used for nonlinear continuous-time function synthesis. Two efficient nonlinear function synthesis approaches are presented. The first approach is a rational approximation, and the second is a piecewise-linear approach. Test circuits have been integrated using a 3-μm p-well CMOS process. The flexibility of the designed and tested circuits is confirmed

Operational transconductance amplifier-based nonlinear function syntheses

It is shown that the operational transconductance amplifier, as the active element in basic building blocks, can be efficiently used for programmable nonlinear continuous-time function synthesis. Two efficient nonlinear function synthesis approaches are presented. The first approach is a rational approximation, and the second is a piecewise-linear approach. Test circuits have been fabricated using a 3- mu m p-well CMOS process. The flexibility of the designed and tested circuits was confirme

FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of 433.80 μV/mA and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of 1 μs. The total current consumption is 17.88 μA (for a 0.9 V supply voltage).Ministerio de Economía y Competitividad TEC2015-71072-C3-3-RConsejería de Economía, Innovación y Ciencia. Junta de Andalucía P12-TIC-186

A Fully Differential Variable Gain Amplifier for Portable Impedance Sensing Applications

This paper presents a Variable Gain Amplifier (VGA) designed in a 0.18 μm CMOS process to operate in an impedance sensing interface. Based on a transconductance-transimpedance (TC-TI) approach with intermediate analog-controlled current steering, it exhibits a gain ranging from 5 dB to 38 dB with a constant bandwidth around 318 kHz, a power consumption of 15.5 μW at a 1.8 V supply and an active area of 0.021 mm2

CMOS operational amplifiers with continuous-time capacitive common mode feedback

A simple and power efficient approach for the implementation of continuous-time common mode feedback networks using a capacitive averaging network is introduced. It is shown that low voltage, continuous-time, fully differential rail to rail operation can be achieved using the proposed technique. This at the expense of very small additional hardware and no additional power dissipation One stage, two stage, telescopic and folded cascode op-amps are discussed as application examples

New high performance second generation CMOS current conveyor

A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experimental results in AMI 0.5µm CMOS technology are provided to validate the characteristics of the design

Accurate dynamic-feedback CMOS cross-quad suitable for low-voltage operation

This paper presents the implementation of a crossquad circuit suitable for low-voltage operation. The proposed cell exploits a dynamic positive feedback gm boosting technique to achieve linear voltage-to-current conversion, while it manages to work with low-voltage with no extra bias current and minimal additional hardware. Results for a 0.5 m CMOS implementation supplied at 3 V show a 0.972 % voltage-tocurrent accuracy, improving the 0.867 % accuracy of a previously reported cross-quad topology also suitable for lowvoltage operation which is based on folded transistors.Ministerio de Ciencia e Innovación (PET2007-00336, PET2008-0021)Agencia Española de Cooperación Internacional para el desarrollo - Programa de Cooperación Interuniversitaria e Investigación Científica (AECI-PCI) (A/018704/08)Universidad de Zaragoza (UZ2008-TEC-08

Rail-to-rail class AB CMOS tunable transconductor with -52dB IM3 at 1MHz

A novel CMOS tunable transconductor is presented. The circuit operates in classAB hence featuring power efficiency. The internal feedback employed and the use of a linearized triode transistor for voltage-to-current conversion allows achieving high linearity. Rail-to-rail input range is obtained by using floatinggate transistors. Measurement results for a test chip prototype in a 0.5µm standard CMOS process show an IM3 of -52.13dB at 1MHz for a 2Vpp input and a power consumption of 2.2mW