A new internally compensated low drop-out voltage
regulator based on the cascoded flipped voltage follower is
presented in this paper. Adaptive biasing current and fast
charging/discharging paths have been added to rapidly
charge and discharge the parasitic capacitance of the pass
transistor gate, thus improving the transient response. The
proposed regulator was designed with standard 65-nm
CMOS technology. Measurements show load and line
regulations of 433.80 μV/mA and 5.61 mV/V, respectively.
Furthermore, the output voltage spikes are kept under
76 mV for 0.1 mA to 100 mA load variations and 0.9 V to
1.2 V line variations with rise and fall times of 1 μs. The
total current consumption is 17.88 μA (for a 0.9 V supply
voltage).Ministerio de Economía y Competitividad TEC2015-71072-C3-3-RConsejería de Economía, Innovación y Ciencia. Junta de Andalucía P12-TIC-186
