Applications of Broyden-based input space mapping to modeling and design optimization in high-tech companies in Mexico

One of the most powerful and computationally efficient optimization approaches in RF and microwave engineering is the space mapping (SM) approach to design. SM optimization methods belong to the general class of surrogate-based optimization algorithms. They are specialized on the efficient optimization of computationally expensive models. This paper reviews the Broyden-based input SM algorithm, better known as aggressive space mapping (ASM), which is perhaps the SM variation with more industrial applications. The two main characteristics that explain its popularity in industry and academia are emphasized in this paper: simplicity and efficiency. The fundamentals behind the Broyden-based input SM algorithm are described, highlighting key steps for its successful implementation, as well as situations where it may fail. Recent applications of the Broyden-based input space mapping algorithm in high-tech industries located in Mexico are briefly described, including application areas such as signal integrity and high-speed interconnect design, as well as post-silicon validation of high-performance computer platforms, among others. Emerging new applications in multi-physics interconnect design and power-integrity design optimization are also mentioned.ITESO, A.C

Design of Experiments Implementation towards Optimization of Power Distribution Networks

Modern computer servers require cutting edge technologies to meet their expected high performance. Among several relevant disciplines, power delivery (PD) is a key player in this regard. Efficient and reliable statistical methods to reduce cost while keeping adequate server’s performance are highly demanded from the PD perspective. This paper addresses a feasible statistical methodology based on design of experiments (DoE) for evaluating platform’s power delivery ingredients. Our methodology explores voltage regulator’s intrinsic parameters, compensation networks, non-linear compensation parameters, and the amount of bulk capacitors. Our statistical approach aims at identifying those variables with the largest impact on computer server’s PD performance, as well as optimizing them at the system level while achieving cost reduction

Surrogate-based Analysis and Design Optimization of Power Delivery Networks

As microprocessor architectures continue to increase computing performance under low-energy consumption, the combination of signal integrity, electromagnetic interference, and power delivery is becoming crucial in the computer industry. In this context, power delivery engineers make use of complex and computationally expensive models that impose time-consuming industrial practices to reach an adequate power delivery design. In this paper, we propose a general surrogate-based methodology for fast and reliable analysis and design optimization of power delivery networks (PDN). We first formulate a generic surrogate model methodology exploiting passive lumped models optimized by parameter extraction to fit PDN impedance profiles. This PDN modeling formulation is illustrated with industrial laboratory measurements of a 4th generation server CPU motherboard. We next propose a black box PDN surrogate modeling methodology for efficient and reliable power delivery design optimization. To build our black box PDN surrogate, we compare four metamodeling techniques: support vector machines, polynomial surrogate modeling, generalized regression neural networks, and Kriging. The resultant best metamodel is then used to enable fast and accurate optimization of the PDN performance. Two examples validate our surrogate-based optimization approach: a voltage regulator with dual power rail remote sensing intended for communications and storage applications, by finding optimal sensing resistors and loading conditions; and a multiphase voltage regulator from a 6th generation Intel® server motherboard, by finding optimal compensation settings to reduce the number of bulk capacitors without losing CPU performance.ITESO, A.C

Power Delivery Network Impedance Profile and Voltage Droop Optimization

The design process of power delivery networks (PDN) in modern computer platforms is becoming more relevant and complex due to its relationship with high-frequency effects on signal integrity. When circuits start operating, the changing current flowing through the PDN produces fluctuations creating voltage noise. Unsuccessful noise control can compromise data integrity. A suitable PDN design approach is the use of decoupling capacitors to lower the impedance profile and mitigate current surges, ensuring a small variation in the power supply voltage under significant transient current loads. An optimization approach to determine the number of decoupling capacitors in a PDN is presented in this paper, aiming at decreasing the amount of decoupling capacitors without violating the PDN design specifications, looking at both the impedance profile in the frequency domain and the resulting voltage droop in the transient time-domain.ITESO, A.C

Selecting Surrogate-Based Modeling Techniques for Power Integrity Analysis

In recent years, extensive usage of simulated power integrity (PI) models to predict the behavior of power delivery networks (PDN) on a chip has become more relevant. Predicting adequate performance against power consumption can yield to either cheap or costly design solutions. Since PI simulations including high-frequency effects are becoming more and more computationally complex and expensive, it is critical to develop reliable and fast models to understand system’s behavior to accelerate decision making during design stages. Hence, metamodeling techniques can help to overcome this challenge. In this work, a comparative study between different surrogate modeling techniques as applied to PI analysis is described. We model and analyze a PDN that includes two different power domains and a combination of remote sense resistors for communication and storage CPU applications. We aim at developing reliable and fast coarse models to make trade off decisions while complying with voltage levels and power consumption requirements

Optimizing a buck voltage regulator and the number of decoupling capacitors for a PDN application

An optimization methodology to determine the best values of the compensation elements of a buck voltage regulator (VR) as well as the optimal number of decoupling capacitors in a power delivery network (PDN) application is proposed. A state average equivalent circuit model of the buck converter is employed. The proposed optimization methodology gradually finds the best compensation parameter values of a buck converter VR to meet some stability criteria in a PDN application. Additionally, the number of parallel decoupling capacitors in the PDN is minimized to simultaneously meet a frequency-domain impedance profile specification and a time-domain voltage droop requirement.ITESO, A.C

Crisis mundial, agotamiento del neoliberalismo y de la hegemonía norteamericana: contexto internacional y consecuencias para México

This article is an expanded, more thorough version of a paper presented at the Seminar on Development Theory, about the international crisis, hosted by the UNAM Institute for Economic Research. It includes a historical and theoretical introduction, followed by three parts and a brief conclusion. The three parts are a) relations between the world crisis and the U.S. economy; b) the current course of the crisis, its localization in Western Europe, and probable international consequences, and c) the consequences for Mexico in the more general framework of Latin America.El presente trabajo constituye una versión ampliada y profundizada de una ponencia presentada en el Seminario de Teoría del Desarrollo del Instituto de Investigaciones Económicas de la UNAM sobre la crisis internacional. Consta de una introducción histórica y teórica, seguida por tres partes y una breve conclusión. Las tres partes son, respectivamente: a) las relaciones entre crisis mundial y la economía de Estados Unidos; b) el desarrollo actual de la crisis, su localización en Europa Occidental y probables consecuencias internacionales y c) las consecuencias para México en el marco más general de América Latina

Optimizing Phase Settings of High-Frequency Voltage Regulators for Power Delivery Applications

Every new computer server introduced to the market aims at delivering the best tradeoff between performance and power consumption. This goal is crucial in the case of servers for cloud computing hardware infrastructure. In this context, power delivery (PD) experts are adopting higher frequency switching voltage regulators (VR) to reduce platform’s cost as well as total cost of ownership (TCO). Because of this fact, the real estate of components, such as voltage regulators and output inductors, is shrinking as VR frequency increases. As a consequence, achieving the best performance of the VR implies looking into phase shedding schemes, as well as EM coupled inductor design, among other techniques, to mitigate power losses. This paper focuses on the study of the best angle arrangement possible for high frequency VR applications, by exploring angle settings under light load scenarios, aiming to minimize VR’s power loss and output’s voltage ripple

Design Optimization of a Planar Spiral Inductor Using Space Mapping

This paper addresses the implementation of a computationally efficient optimization technique for designing structures simulated in 3D electromagnetic field solvers. A probe of concept is done by the EM-based optimization of a planar spiral inductor for high-power applications. The optimization technique employed is based on space mapping (SM) methods, more specifically on the Broyden-based input space mapping algorithm. Our optimization results confirm the efficiency of the proposed approach

Machine learning techniques and space mapping approaches to enhance signal and power integrity in high-speed links and power delivery networks

Enhancing signal integrity (SI) and reliability in modern computer platforms heavily depends on the post-silicon validation of high-speed input/output (HSIO) links, which implies a physical layer (PHY) tuning process where equalization techniques are employed. On the other hand, the interaction between SI and power delivery networks (PDN) is becoming crucial in the computer industry, imposing the need of computationally expensive models to also ensure power integrity (PI). In this paper, surrogate-based optimization (SBO) methods, including space mapping (SM), are applied to efficiently tune equalizers in HSIO links using lab measurements on industrial post-silicon validation platforms, speeding up the PHY tuning process while enhancing eye diagram margins. Two HSIO interfaces illustrate the proposed SBO/SM techniques: USB3 Gen 1 and SATA Gen 3. Additionally, a methodology based on parameter extraction is described to develop fast PDN lumped models for low-cost SI-PI co-simulation; a dual data rate (DDR) memory sub-system illustrates this methodology. Finally, we describe a surrogate modeling methodology for efficient PDN optimization, comparing several machine learning techniques; a PDN voltage regulator with dual power rail remote sensing illustrates this last methodology.ITESO, A.C