Prospects for the Measurement of the Structure of the Coupling of a Higgs Boson to Weak Gauge Bosons in Weak Boson Fusion with the ATLAS Detector

The prospects for the measurement of the tensor structure of the vertex between a standard model Higgs boson and two weak gauge bosons using the distribution of the azimuthal angles between the two tagging jets in the weak boson fusion channel are studied in a Monte Carlo analysis using the fast simulation of the ATLAS detector. The decay channels $H \rightarrow \tau^+\tau^- \rightarrow ll+4\nu$, $H \rightarrow \tau^+\tau^- \rightarrow lh + 3\nu$ at $m_{H} = 120\,$GeV and $H \rightarrow W^+W^- \rightarrow ll\nu\nu$ at $m_H = 160\,$GeV are used in the analysis. For a standard model Higgs boson it is found that purely anomalous couplings are expected to be excluded at a confidence level corresponding to 2\,$\sigma$ or more at $m_H = 120\,$GeV and more than 5\,$\sigma$ at $m_H = 160\,$GeV from $30\,$fb$^{-1}$ of data. With a value of 1 roughly reproducing the standard model cross section for a purely anomalous coupling, the standard deviation in a measurement of a contribution of a CP even anomalous coupling in addition to the standard model coupling is estimated to be 0.20 at $m_H = 120\,$GeV and 0.08 at $m_H = 160\,$GeV

Status of a DEPFET pixel system for the ILC vertex detector

We have developed a prototype system for the ILC vertex detector based on DEPFET pixels. The system operates a 128x64 matrix (with ~35x25 square micron large pixels) and uses two dedicated microchips, the SWITCHER II chip for matrix steering and the CURO II chip for readout. The system development has been driven by the final ILC requirements which above all demand a detector thinned to 50 micron and a row wise read out with line rates of 20MHz and more. The targeted noise performance for the DEPFET technology is in the range of ENC=100 e-. The functionality of the system has been demonstrated using different radioactive sources in an energy range from 6 to 40keV. In recent test beam experiments using 6GeV electrons, a signal-to-noise ratio of S/N~120 has been achieved with present sensors being 450 micron thick. For improved DEPFET systems using 50 micron thin sensors in future, a signal-to-noise of 40 is expected.Comment: Invited poster at the International Symposium on the Development of Detectors for Particle, AstroParticle and Synchrotron Radiation Experiments, Stanford CA (SNIC06) 6 pages, 12 eps figure

First observation of electrons in the ATLAS detector

This poster shows approved plots from https://twiki.cern.ch/twiki/bin/view/Atlas/ElectronGammaApprovedCosmicPlots and will be presented at the Hadron Collider Physics Symposium 16th -20th November 2009 in Evian

Test beam Characterizations of 3D Silicon Pixel detectors

3D silicon detectors are characterized by cylindrical electrodes perpendicular to the surface and penetrating into the bulk material in contrast to standard Si detectors with planar electrodes on its top and bottom. This geometry renders them particularly interesting to be used in environments where standard silicon detectors have limitations, such as for example the radiation environment expected in an LHC upgrade. For the first time, several 3D sensors were assembled as hybrid pixel detectors using the ATLAS-pixel front-end chip and readout electronics. Devices with different electrode configurations have been characterized in a 100 GeV pion beam at the CERN SPS. Here we report results on unirradiated devices with three 3D electrodes per 50 x 400 um2 pixel area. Full charge collection is obtained already with comparatively low bias voltages around 10 V. Spatial resolution with binary readout is obtained as expected from the cell dimensions. Efficiencies of 95.9% +- 0.1 % for tracks parallel to the electrodes and of 99.9% +- 0.1 % at 15 degrees are measured. The homogeneity of the efficiency over the pixel area and charge sharing are characterized.Comment: 5 pages, 7 figure

CIX - A Detector for Spectral Enhanced X-ray Imaging by Simultaneous Counting and Integrating

A hybrid pixel detector based on the concept of simultaneous charge integration and photon counting will be presented. The second generation of a counting and integrating X-ray prototype CMOS chip (CIX) has been operated with different direct converting sensor materials (CdZnTe and CdTe) bump bonded to its 8x8 pixel matrix. Photon counting devices give excellent results for low to medium X-ray fluxes but saturate at high rates while charge integration allows the detection of very high fluxes but is limited at low rates by the finite signal to noise ratio. The combination of both signal processing concepts therefore extends the resolvable dynamic range of the X-ray detector. In addition, for a large region of the dynamic range, where counter and integrator operate simultaneously, the mean energy of the detected X-ray spectrum can be calculated. This spectral information can be used to enhance the contrast of the X-ray image. The advantages of the counting and integrating signal processing concept and the performance of the imaging system will be reviewed. The properties of the system with respect to dynamic range and sensor response will be discussed and examples of imaging with additional spectral information will be presented.Comment: 12 pages, 14 figures, SPIE Medical Imaging Conference, San Diego, 200

HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results

In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given

Radiation-hard active pixel sensors for HL-LHC detector upgrades based on HV-CMOS technology

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

3D electronics for hybrid pixel detectors – TWEPP-09

Future hybrid pixel detectors are asking for smaller pixels in order to improve spatial resolution and to deal with an increasing counting rate. Facing these requirements is foreseen to be done by microelectronics technology shrinking. However, this straightforward approach presents some disadvantages in term of performances and cost. New 3D technologies offer an alternative way with the advantage of technology mixing. For the upgrade of ATLAS pixel detector, a 3D conception of the read-out chip appeared as an interesting solution. Splitting the pixel functionalities into two separate levels will reduce pixel size and open the opportunity to take benefit of technology's mixing. Based on a previous prototype of the read-out chip FE-I4 (IBM 130nm), this paper presents the design of a hybrid pixel read-out chip using threedimensional Tezzaron-Chartered technology. In order to disentangle effects due to Chartered 130nm technology from effects involved by 3D architecture, a first translation of FEI4 prototype had been designed at the beginning of this year in Chartered 2D technology, and first test results will be presented in the last part of this paper

Determination of alpha_s using Jet Rates at LEP with the OPAL detector

Hadronic events produced in e+e- collisions by the LEP collider and recorded by the OPAL detector were used to form distributions based on the number of reconstructed jets. The data were collected between 1995 and 2000 and correspond to energies of 91 GeV, 130-136 GeV and 161-209 GeV. The jet rates were determined using four different jet-finding algorithms (Cone, JADE, Durham and Cambridge). The differential two-jet rate and the average jet rate with the Durham and Cambridge algorithms were used to measure alpha(s) in the LEP energy range by fitting an expression in which order alpah_2s calculations were matched to a NLLA prediction and fitted to the data. Combining the measurements at different centre-of-mass energies, the value of alpha_s (Mz) was determined to be alpha(s)(Mz)=0.1177+-0.0006(stat.)+-0.0012$(expt.)+-0.0010(had.)+-0.0032(theo.) \.Comment: 40 pages, 17 figures, Submitted to Euro. Phys. J.