Eddy current interaction between a probe coil and a conducting plate

International audienceConsider a coil above a conducting plate. The interaction between the probe-coil and the plate is modeled by a quasi-static approximation of Maxwell's equations: the eddy current model. The associated electromagnetic transmission boundary-value problem can be solved by the integral equations method. However, the discretization of integral operators gives dense, complex and ill-conditioned linear systems. We present here a method to compute the reaction field and the coil impedance variation by solving only surface partial differential equations

Discriminación de género y Delito de Feminicidio en el Código Penal Peruano.

El problema general de la presente es: ¿existe discriminación de género con la incorporación del delito de feminicidio como tipo penal autónomo regulado en el Código Penal peruano de 1991?, siendo su objetivo general: determinar si existe discriminación de género con la incorporación del delito de feminicidio como tipo penal autónomo regulado en el Código Penal peruano de 1991. La hipótesis general planteada fue que sí existe discriminación de género con la incorporación del delito de feminicidio como tipo penal autónomo regulado en el Código Penal peruano de1991, porque diferencia a la mujer del varón en el ámbito de protección contra la violencia. Los métodos generales que se utilizaron fueron el método inductivo-deductivo y análisis-síntesis; de tipo de investigación jurídico social, de nivel de investigación de carácter descriptivo. Como conclusión principal se señala que se logró determinar que sí existe discriminación de género con la incorporación del delito de feminicidio como tipo penal autónomo regulado en el Código Penal peruano de1991, porque diferencia a la mujer del varón en el ámbito de protección contra la violencia, de acuerdo a los datos obtenidos y según la doctrina citada.Tesi

Un problème de transmission électromagnétique : l'expérience des courants de Foucault

Cette thèse a trait au Contrôle Non Destructif par courants de Foucault. L'objet est de développer de nouvelles méthodes de calcul de la variation d'impédance d'une bobine émettrice placée au-dessus d'’une plaque conductrice contenant ou non des fissures. Les approches standards les plus robustes nécessitent le maillage par éléments finis volumiques, ce qui peut entraîner des coûts de calculs et de stockage élevés. Dans ces travaux, une géométrie idéalisée, donc simplifiée, est considérée permettant d’envisager une résolution du problème en choisissant de l'appréhender comme un problème de transmission sur l'’interface entre le conducteur et l'’air ambiant contenant la bobine. Dans le cas d'’un conducteur non fissuré, une méthode d'approximation de la variation d'impédance d'une bobine placée à la surface de la plaque est développée. Sa mise en œuvre nécessite uniquement l'’inversion de systèmes linéaires creux, diminuant ainsi le coût de calcul et de stockage. Dans le cas d'un conducteur contenant une fissure, la fissure est prise en compte à l'aide d'’une densité fictive de courant. Une fois le problème ainsi formulé, la difficulté revient au calcul de la charge fictive. Une méthode de calcul de la charge fictive de courant dans le cas de conducteurs ayant une conductivité élevée est proposée. Cette méthode s'appuie sur des développements asymptotiques pour des nombres d'onde grandsThis thesis is about Non Destructive Testing by eddy currents. The goal is to develop new methods to compute the impedance variation of emitting coil placed over a conductive plate, possibly containing cracks. Standard methods require volume finite element meshes. This usually implies a computation cost and data storage high. In this thesis, we consider a solution to the problem by choosing to see is as a transmission problem on the interface between the conducting plate and the air containing the coil. When the conductor has no crack, we develop an approximate method to compute the impedance variation of a coil placed on the conductive plate. Applying this method only requires inverting sparse linear systems, this reduces the computation cost and the data storage requirements. If the plate containing a crack, the crack modeled as fictive current charge. After formulating the problem this way, the difficult part is to compute the fictive charge. We offer a method to compute it when the conducting plate has a high conductivity. It is based on asymptotic developments for high wave number

Eddy current interaction between a probe coil and a conducting plate

International audienceConsider a coil above a conducting plate. The interaction between the probe-coil and the plate is modeled by a quasi-static approximation of Maxwell's equations: the eddy current model. The associated electromagnetic transmission boundary-value problem can be solved by the integral equations method. However, the discretization of integral operators gives dense, complex and ill-conditioned linear systems. We present here a method to compute the reaction field and the coil impedance variation by solving only surface partial differential equations

ALMOS many-core operating system extension with new secure-enable mechanisms for dynamic creation of secure zones

International audienceMany-core architectures are becoming a major execution platform in order to face the increasing number of applications to be executed in parallel. Such an approach is very attractive in order to offer users with high performance. However it introduces some key challenges in terms of security as some malicious applications may compromise the whole system. A defense-in-depth approach relying on hardware and software mechanisms is thus mandatory to increase the level of protection. This work focuses on the Operating System (OS) level and proposes a set of operating system services able to dynamically create physical isolated secure zones for sensitive applications in many-core platforms. These services are integrated into the ALMOS OS deployed in the TSAR many-core architecture, and evaluated in terms of security level and induced performance overhead

Application Deployment Strategies for Spatial Isolation on Many-Core Accelerators

International audienceCurrent cache side-channel attacks (SCAs) countermeasures have not been designed for many-core architectures and need to be revisited in order to be practical for these new technologies. Spatial isolation of resources for sensitive applications has been proposed taking advantage of the large number of resources offered by these architectures. This solution avoids cache sharing with sensitive processes. Consequently, their cache activity cannot be monitored and cache SCA cannot be performed. This work focuses on the implementation of this technique in order to minimize the induced performance overhead. Different strategies for the management of isolated secure zones are implemented and compared. CCS Concepts: •Security and privacy → Domain-specific security and privacy architectures

Hardware/Software co-Design of an Accelerator for FV Homomorphic Encryption Scheme using Karatsuba Algorithm

International audienceSomewhat Homomorphic Encryption (SHE) schemes can be used to carry out operations on ciphered data. In a cloud computing scenario, personal information can be processed secretly, inferring a high level of confidentiality. The principle limitation of SHE is the size of ciphertext compared to the size of the message. This issue can be addressed by using a batching technique that “packs” several messages into one ciphertext. However, this method leads to important drawbacks in standard implementations. This paper presents a fast hardware/software co-design implementation of an encryption procedure using the Karatsuba algorithm. Our hardware accelerator is 1.5 times faster than the state of the art for 1 encryption and 4 times faster for 4 encryptions

Exploration of Polynomial Multiplication Algorithms for Homomorphic Encryption Schemes

International audienceHomomorphic encryption schemes allow performing computations in the ciphertext domain, without the need of the secret key. In most promising schemes based on the ringlearning with errors (R-LWE) problem, polynomial multiplication operation is considered as an important bottleneck. Inthis study, a comparison between the Karatsuba and the fast Fourier transform (FFT) multiplication algorithms in the context of homomorphic encryption is proposed in terms of complexity, flexibility and possible optimizations. A complete hardware architecture to speeding up polynomial multiplication is provided and impacts of such an architecture on the Karatsuba and the FFT algorithms is thoroughly studied. The study demonstrates that in a realistic architecture, Karatsuba can be a better alternative to the FFT one

Dynamic Spatially Isolated Secure Zones for NoC-based Many-core Accelerators

International audienc

Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm

International audienceMost practical Somewhat Homomorphic Encryption (SHE) schemes require the implementation of fast polynomial arithmetic in the ring Zq[X]/f (X), for a given modulus q and an irreducible polynomial f (X). That is why hardware accelerators usually target the FFT/NTT algorithm, which has the smallest complexity asymptotically. Unlike standard approaches, this paper proposes a Karatsuba-based accelerator. Karatsuba implementation requires 3 steps: Pre-recursions producing several subpolynomials, a term by term multiplication of sub-polynomials, and post-computations to reconstruct the output polynomial. Compared to FFT/NTT, Karatsuba can address various size of polynomials, and is sufficiently flexible to be adapted to specific operations required by SHE schemes. In this paper, we propose a hardware/software co-design where several Karatsuba recursions are made in software, and the remaining ones plus the subpolynomial multiplication are made in hardware. We provide 3 different hardware approaches: An area efficient approach with 3 Karatsuba recursions in hardware, an intermediate design with 4 recursions, and a performance-oriented one with 5 recursions. The study evaluates proposed hardware accelerators for 3 FPGA platforms, the SoCkit and the DE5-net platforms from Terasic, and the Catapult platform from Microsoft. The area efficient approach can evaluate a degree-2559 polynomial multiplication in 2.44 ms and a relinearization/key switching evaluation in 2.29 ms, with an important save of hardware resources compared to FFT/NTT implementations. Compared to [1], our lightweight approach saves 57% of ALM resources, 46% of registers, 99.95% of embedded memory and 30% of DSPs. For the performanceoriented design, the accelerator can evaluate a degree-2559 polynomial multiplication in 1.24 ms and a relinearization/key switching evaluation in 1.1 ms