On the effect of random power availability in wireless power transfer systems with physical layer security

In this paper, we evaluate the performance of wireless powered communication systems from a physical layer security perspective. Our aim is to determine under which conditions the random power availability due to wireless power transmission using a dedicated power beacon impacts the maxi- mum secrecy rate, compared to its deterministic counterpart. We also investigate the effect of line-of-sight condition on the system performance. Analytical expressions are derived for some specific scenarios, which are combined with Monte Carlo simulations. We see that under a moderate line-of-sight condition in the wireless power transfer link, the secrecy performance is barely affected.Becas colaboración con departamentos Ministerio de Innovación (TEC-2017-87913R

Análisis tiempo-frecuencia de mapas de activación cardíaca en fibrilación ventricular

El análisis de mapas de activación permite investigar la estructura de la fibrilación ventricular cardíaca (FV). El presente trabajo plantea una revisión de la utilización de objetos de interés (blobs), usados en procesado de imágenes y aplicados también a mapas de activación cerebral y cardíaca, mediante su generación a partir de representaciones tiempo-frecuencia de registros FV. Su estudio proporciona información sobre qué frecuencias de la señal están presentes en un instante dado, así como su distribución espacial. También permiten determinar el momento en que una determinada frecuencia aparece y desaparece de cada electrodo, por lo que constituye una herramienta interesante para analizar los mecanismos de generación y mantenimiento de la FV

Online database of Power Hardware In-the-Loop tests

The online database presented in this article provides information about Power Hardware In-the-Loop (PHIL) tests to allow the reproducibility of the experiments. The data were collected through published papers and manufacturer data sheets. The database is hosted on an open subversion platform, which allows a continuous improvement of the data. Furthermore, a GUI interface has been developed to ensure the integrity of the database and its traceability. The access to PHIL test data will facilitate reliable findings for the reproducibility of PHIL experiments

A review of PHIL testing for smart grids—selection guide, classification and online database analysis

The Smart Grid is one of the most important solutions to boost electricity sharing from renewable energy sources. Its implementation adds new functionalities to power systems, which increases the electric grid complexity. To ensure grid stability and security, systems need flexible methods in order to be tested in a safe and economical way. A promising test technique is Power Hardware In-the-Loop (PHIL), which combines the flexibility of Hardware-In-the-Loop (HIL) technique with power exchange. However, the acquisition of PHIL components usually represents a great expense for laboratories and, therefore, the setting up of the experiment involves making hard decisions. This paper provides a complete guideline and useful new tools for laboratories in order to set PHIL facilities up efficiently. First, a PHIL system selection guide is presented, which describes the selection process steps and the main system characteristics needed to perform a PHIL test. Furthermore, a classification proposal containing the desirable information to be obtained from a PHIL test paper for reproducibility purposes is given. Finally, this classification was used to develop a PHIL test online database, which was analysed, and the main gathered information with some use cases and conclusions are shown

POWAR: Power-Aware Routing in HPC Networks with On/Off Links

[EN] In order to save energy in HPC interconnection networks, one usual proposal is to switch idle links into a low-power mode after a certain time without any transmission, as IEEE Energy Efficient Ethernet standard proposes. Extending the low-power mode mechanism, we propose POWer-Aware Routing (POWAR), a simple power-aware routing and selection function for fat-tree and torus networks. POWAR adapts the amount of network links that can be used, taking into account the network load, and obtaining great energy savings in the network (55%-65%) and the entire system (9%-10%) with negligible performance overhead.This work has been supported by the Spanish MINECO and European Commission (FEDER funds) under project TIN2015-66972-C5-1-R. Francisco J. Andujar has been partially funded by the Spanish MICINN and by the ERDF program of the European Union: PCAS Project (TIN2017-88614-R), CAPAP-H6 (TIN2016-81840-REDT), and Junta de Castilla y Leon FEDER Grant VA082P17 (PROPHET Project).Andújar-Muñoz, FJ.; Coll, S.; Alonso Díaz, M.; López Rodríguez, PJ.; Martínez-Rubio, J. (2019). POWAR: Power-Aware Routing in HPC Networks with On/Off Links. ACM Transactions on Architecture and Code Optimization. 15(4):1-22. https://doi.org/10.1145/3293445S122154Abts, D., Marty, M. R., Wells, P. M., Klausler, P., & Liu, H. (2010). Energy proportional datacenter networks. Proceedings of the 37th annual international symposium on Computer architecture - ISCA ’10. doi:10.1145/1815961.1816004Adiga, N. R., Blumrich, M. A., Chen, D., Coteus, P., Gara, A., Giampapa, M. E., … Vranas, P. (2005). Blue Gene/L torus interconnection network. IBM Journal of Research and Development, 49(2.3), 265-276. doi:10.1147/rd.492.0265M. Alonso S. Coll J. M. Martínez V. Santonja and P. López. 2015. Power consumption management in fat-tree interconnection networks. Parallel Comput. 48 C (Oct. 2015) 59--80. 10.1016/j.parco.2015.03.007 M. Alonso S. Coll J. M. Martínez V. Santonja and P. López. 2015. Power consumption management in fat-tree interconnection networks. Parallel Comput. 48 C (Oct. 2015) 59--80. 10.1016/j.parco.2015.03.007Marina Alonso, Coll, S., Martínez, J.-M., Santonja, V., López, P., & Duato, J. (2010). Power saving in regular interconnection networks. Parallel Computing, 36(12), 696-712. doi:10.1016/j.parco.2010.08.003Bob Alverson Edwin Froese Larry Kaplan and Duncan Roweth. 2012. Cray XC series network. Cray Inc. White Paper WP-Aries01-1112 (2012). Bob Alverson Edwin Froese Larry Kaplan and Duncan Roweth. 2012. Cray XC series network. Cray Inc. White Paper WP-Aries01-1112 (2012).Anderson, T. E., Owicki, S. S., Saxe, J. B., & Thacker, C. P. (1993). High-speed switch scheduling for local-area networks. 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Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis on - SC ’11. doi:10.1145/2063384.2063419Chen, L., & Pinkston, T. M. (2012). NoRD: Node-Router Decoupling for Effective Power-gating of On-Chip Routers. 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture. doi:10.1109/micro.2012.33Christensen, K., Reviriego, P., Nordman, B., Bennett, M., Mostowfi, M., & Maestro, J. (2010). IEEE 802.3az: the road to energy efficient ethernet. IEEE Communications Magazine, 48(11), 50-56. doi:10.1109/mcom.2010.5621967Dally, & Seitz. (1987). Deadlock-Free Message Routing in Multiprocessor Interconnection Networks. IEEE Transactions on Computers, C-36(5), 547-553. doi:10.1109/tc.1987.1676939Das, R., Narayanasamy, S., Satpathy, S. K., & Dreslinski, R. G. (2013). Catnap. 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An Engineering Approach. Morgan Kaufmann Publishers Inc. San Francisco CA.GALGO 2017. GALGO—Albacete Research Institute of Informatics Supercomputer Center homepage. Retrieved from http://www.i3a.uclm.es/galgo. GALGO 2017. GALGO—Albacete Research Institute of Informatics Supercomputer Center homepage. Retrieved from http://www.i3a.uclm.es/galgo.Greenberg, A., Hamilton, J., Maltz, D. A., & Patel, P. (2008). The cost of a cloud. ACM SIGCOMM Computer Communication Review, 39(1), 68-73. doi:10.1145/1496091.1496103HPCC {n.d.}. HPC Challenge Benchmark. Retrieved from http://icl.cs.utk.edu/hpcc/index.html. HPCC {n.d.}. HPC Challenge Benchmark. Retrieved from http://icl.cs.utk.edu/hpcc/index.html.Hluchyj, M. G., & Karol, M. J. (1988). Queueing in high-performance packet switching. IEEE Journal on Selected Areas in Communications, 6(9), 1587-1597. doi:10.1109/49.12886Koibuchi, M., Otsuka, T., Hiroki Matsutani, & Amano, H. (2009). An on/off link activation method for low-power ethernet in PC clusters. 2009 IEEE International Symposium on Parallel & Distributed Processing. doi:10.1109/ipdps.2009.5161069Phillips, J. C., Braun, R., Wang, W., Gumbart, J., Tajkhorshid, E., Villa, E., … Schulten, K. (2005). Scalable molecular dynamics with NAMD. Journal of Computational Chemistry, 26(16), 1781-1802. doi:10.1002/jcc.20289Pronk, S., Páll, S., Schulz, R., Larsson, P., Bjelkmar, P., Apostolov, R., … Lindahl, E. (2013). GROMACS 4.5: a high-throughput and highly parallel open source molecular simulation toolkit. Bioinformatics, 29(7), 845-854. doi:10.1093/bioinformatics/btt055Reviriego, P., Hernandez, J., Larrabeiti, D., & Maestro, J. (2009). Performance evaluation of energy efficient ethernet. IEEE Communications Letters, 13(9), 697-699. doi:10.1109/lcomm.2009.090880K. P. Saravanan and P. Carpenter. 2018. PerfBound: Conserving energy with bounded overheads in on/off-based HPC interconnects. IEEE Trans. Comput. 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Experience moderation effect on the relationship between usefulness, ease of use and website acceptance

The modelling of acceptance behaviour of new information technologies is of great utility to managers who need to evaluate the probability of success in the introduction of these technologies. The present study empirically tests the capacity of Fishbein and Ajzen´s Theory of Reasoned Action (TRA) (1975) and Davis´s Technology Ac-ceptance Model (TAM) (1989) to help understand the determinants of the intention to revisit a website – ease of use and perceived usefulness – focusing on the experience moderation effect. The findings show that a combination of both theories explains the acceptance of a website by Internet users. Furthermore, within the effect of each of the elements of TAM, the user’s experience of the website plays a moderating role. In this regard, ease of use is a more important factor in determining a furure revisit to a website in the case of the less experienced users, while perceived usefulness is a more influential factor in the case of the high experience users

Moving Learning Machine Towards Fast Real-Time Applications: A High-Speed FPGA-based Implementation of the OS-ELM Training Algorithm

Currently, there are some emerging online learning applications handling data streams in real-time. The On-line Sequential Extreme Learning Machine (OS-ELM) has been successfully used in real-time condition prediction applications because of its good generalization performance at an extreme learning speed, but the number of trainings by a second (training frequency) achieved in these continuous learning applications has to be further reduced. This paper proposes a performance-optimized implementation of the OS-ELM training algorithm when it is applied to real-time applications. In this case, the natural way of feeding the training of the neural network is one-by-one, i.e., training the neural network for each new incoming training input vector. Applying this restriction, the computational needs are drastically reduced. An FPGA-based implementation of the tailored OS-ELMalgorithm is used to analyze, in a parameterized way, the level of optimization achieved. We observed that the tailored algorithm drastically reduces the number of clock cycles consumed for the training execution up to approximately the 1%. This performance enables high-speed sequential training ratios, such as 14 KHz of sequential training frequency for a 40 hidden neurons SLFN, or 180 Hz of sequential training frequency for a 500 hidden neurons SLFN. In practice, the proposed implementation computes the training almost 100 times faster, or more, than other applications in the bibliography. Besides, clock cycles follows a quadratic complexity O(N 2), with N the number of hidden neurons, and are poorly influenced by the number of input neurons. However, it shows a pronounced sensitivity to data type precision even facing small-size problems, which force to use double floating-point precision data types to avoid finite precision arithmetic effects. In addition, it has been found that distributed memory is the limiting resource and, thus, it can be stated that current FPGA devices can support OS-ELM-based on-chip learning of up to 500 hidden neurons. Concluding, the proposed hardware implementation of the OS-ELM offers great possibilities for on-chip learning in portable systems and real-time applications where frequent and fast training is required

Optimization of the KNN Supervised Classification Algorithm as a Support Tool for the Implantation of Deep Brain Stimulators in Patients with Parkinson's Disease

Deep Brain Stimulation (DBS) of the Subthalamic Nuclei (STN) is the most used surgical treatment to improve motor skills in patients with Parkinson's Disease (PD) who do not adequately respond to pharmacological treatment, or have related side effects. During surgery for the implantation of a DBS system, signals are obtained through microelectrodes recordings (MER) at different depths of the brain. These signals are analyzed by neurophysiologists to detect the entry and exit of the STN region, as well as the optimal depth for electrode implantation. In the present work, a classification model is developed and supervised by the K-nearest neighbour algorithm (KNN), which is automatically trained from the 18 temporal features of MER registers of 14 patients with PD in order to provide a clinical support tool during DBS surgery. We investigate the effect of different standardizations of the generated database, the optimal definition of KNN configuration parameters, and the selection of features that maximize KNN performance. The results indicated that KNN trained with data that was standardized per cerebral hemisphere and per patient presented the best performance, achieving an accuracy of 94.35% (p < 0.001). By using feature selection algorithms, it was possible to achieve 93.5% in accuracy in selecting a subset of six features, improving computation time while processing in real time

Using virtual learning environments in bricolage mode for orchestrating learning situations across physical and virtual spaces

Producción CientíficaTeachers usually implement their pedagogical ideas in Virtual Learning Environments (VLEs) in a continuous refinement approach also known as “bricolage”. Recently, different proposals have enabled the ubiquitous access to VLEs, thus extending the bricolage mode of operation to other learning spaces. However, such proposals tend to present several limitations for teachers to orchestrate learning situations conducted across different physical and virtual spaces. This paper presents an evaluation study that involved the across-spaces usage of Moodle in bricolage mode and learning buckets (configurable containers of learning artifacts) in multiple learning situations spanning five months in a course on Physical Education in the Natural Environment for pre-service teachers. The study followed a responsive evaluation model, in which we conducted an anticipatory data reduction using an existing orchestration framework (called “5 + 3 aspects”) for structuring data gathering and analysis. The results showed that learning buckets helped the teachers in the multiple aspects of orchestration, overcoming the limitations of alternative approaches in some specific orchestration aspects: helping the involved teachers to connect different physical and physical spaces, while supporting technologies and activities of their everyday practice, and transferring part of the orchestration load from teachers to students. The results also suggested lines of future improvement, including the awareness of outdoor activities.Ministerio de Economía, Industria y Competitividad (Project TIN2011-28308-C03-02 and TIN2014-53199-C3-2-R)Junta de Castilla y León (programa de apoyo a proyectos de investigación - Ref. VA277U14 and VA082U16

Portraiture in Early–Childhood education: a didactic proposal about art

El trabajo hace una propuesta didáctica destinada a la etapa de Educación Infantil, en la que se toma como base el género artístico del retrato. El estudio destaca la gran importancia que tiene la educación artística, en sus dos ámbitos —el crítico y el creativo— en la educación de los más pequeños, así como la gran utilidad del género del retrato, que se adapta perfectamente al objetivo de una enseñanza integral en la que los alumnos aprendan desde un punto de vista lúdico y creativo.The work makes a didactic proposal for the Early Childhood Education, based on the artistic genre of portraiture. He study highlights the great importance of the artistic education in its two senses —critical and creative— inside the early childhood education, and moreover the important utility of portraiture adapted properly to the target of an integrated education where students learn with a playful and creative point of view