421 research outputs found

    Proyecto de puesta en valor de un taller artesano tradicional del Barrio del Carmen de Valencia

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    Resumen: Una vez analizados los precedentes históricos del taller vivienda tradicional (obrador) de la familia de artesanos March del centro histórico de Valencia en el contexto artesano del  Barrio del Carmen, nos encontramos ante uno de los escasos talleres que perdurando en el tiempo, permanecieron en su localización histórica ajenos por su propia estructura a los cambios y transformaciones que provocó la industrialización, siendo el único del entorno que ha mantenido en su esencia todas las características de un obrador de tradición gremial, que lo convierte así en un espacio idóneo donde se hace  posible desarrollar un proyecto didáctico que pretende  ilustrar y documentar de forma objetiva a colectivos escolares, estudiantes , interesados por la historia etc.  un prolongado periodo de  nuestra historia que precede a los cambios sociales y económicos que originó la revolución industrial. Tras su puesta en valor y utilizando dicho taller como recurso pedagógico a través de intervenciones didácticas programadas, donde los escolares puedan conocer y experimentar de forma lúdica alguno de los   oficios artesanos  que tradicionalmente se han ejercido en este taller, con el objetivo de obtener como vivencia propia un conocimiento a nivel histórico del medio donde se desarrolló una forma de vida con unas estructuras económicas y de socialización del trabajo determinadas por los gremios, propias de tiempos pasados. Palabras clave: Edad Media, Valencia, Barrio del Carmen, Sociedad preindustrial, Oficios artesanos, Taller Escuela, Cofradías y Gremios, Industrialización. Abstract: Having analyzed the historical precedents of traditional housing workshop (workshop) family of artisans March of from the historic center Valencia in the context of the Barrio del Carmen craftsman, they is one of the few workshops which has remained in its essence all the characteristics a workshop for gremial tradition, thus making it an ideal space where it is possible to develop an educational project that aims to illustrate and document objectively to school groups, students, interested in history, a long period of our history that precedes the social and economic changes that led to the industrial revolution. after its putting in value and using that as a pedagogical workshop through scheduled educational interventions, where schoolchildren can learn through play and experience some of the crafts that have traditionally exercised in this workshop, with the aim of getting as experience own historical  level of the medium where he developed a way of life and economic structures determined by socialization of work, characteristic of times past. Keywords: Middle Ages, Valencia, quarter of Carmen, pre-industrial society, crafts,  Workshop, Fraternities and Guilds, Industrializatio

    30 años conviviendo con el SIDA

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    Dynamic Power-Aware Techniques for Real-Time Multicore Embedded Systems

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    The continuous shrink of transistor sizes has allowed more complex and powerful devices to be implemented in the same area, which provides new capabilities and functionalities. However, this complexity increase comes with a considerable rise in power consumption. This situation is critical in portable devices where the energy budget is limited and, hence, battery lifetime defines the usefulness of the system. Therefore, power consumption has become a major concern in the design of real-time multicore embedded systems. This dissertation proposes several techniques aimed to save energy without sacrifying real-time schedulability in this type of systems. The proposed techniques deal with different main components of the system. In particular, the techniques affect the task partitioner and the scheduler, as well as the memory controller. Some of the techniques are especially tailored for multicores with shared Dynamic Voltage and Frequency Scaling (DVFS) domains. Workload balancing among cores in a given domain has a strong impact on power consumption, since all the cores sharing a DVFS domain must run at the speed required by the most loaded core. In this thesis, a novel workload partitioning algorithm is proposed, namely Loadbounded Resource Balancing (LRB). The proposal allocates tasks to cores to balance a given resource (processor or memory) consumption among cores, improving real-time schedulability by increasing overlapping between processor and memory. However, distributing tasks in this way regardless the individual core utilizations could lead to unfair load distributions. That is, one of the cores could become much loaded than the others. To avoid this scenario, when a given utilization threshold is exceeded, tasks are assigned to the least loaded core. Unfortunately, workload partitioning alone is sometimes not able to achieve a good workload balance among cores. Therefore, this work also explores novel task migration approaches. Two task migration heuristics are proposed. The first heuristic, referred to as Single Option Migration (SOM ), attempts to perform only one migration when the workload changes to improve utilization balance. Three variants of the SOM algorithm have been devised, depending on the point of time the migration attempt is performed: when a task arrives to the system (SOMin), when a task leaves the system (SOMout), and in both cases (SOMin−out). The second heuristic, referred to as Multiple Option Migration (MOM ) explores an additional alternative workload partitioning before performing the migration attempt. Regarding the memory controller, memory controller scheduling policies are devised. Conventional policies used in Non Real-Time (NRT) systems are not appropriate for systems providing support for both Hard Real-Time (HRT) and Soft Real-Time (SRT) tasks. Those policies can introduce variability in the latencies of the memory requests and, hence, cause an HRT deadline miss that could lead to a critical failure of the real-time system. To deal with this drawback, a simple policy, referred to as HR- first, which prioritizes requests of HRT tasks, is proposed. In addition, a more advanced approach, namely ATR-first, is presented. ATR-first prioritizes only those requests of HRT tasks that are necessary to ensure real-time schedulability, improving the Quality of Service (QoS) of SRT tasks. Finally, this thesis also tackles dynamic execution time estimation. The accuracy of this estimation is important to avoid deadline misses of HRT tasks but also to increase QoS in SRT systems. Besides, it can also help to improve the schedulability of the systems and reduce power consumption. The Processor-Memory (Proc-Mem) model, that dynamically predicts the execution time of real-time application for each frequency level, is proposed. This model measures at the first hyperperiod, making use of Performance Monitoring Counters (PMCs) at run-time, the portion of time that each core is performing computation (CPU ), waiting for memory (MEM ), or both (OVERLAP). This information will be used to estimate the execution time at any other working frequencyMarch Cabrelles, JL. (2014). Dynamic Power-Aware Techniques for Real-Time Multicore Embedded Systems [Tesis doctoral]. Editorial Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/48464TESI

    A Dynamic Power-Aware Partitioner with Real-Time Task Migration for Embedded Multicore Processors

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    [ES] Analizar el impacto de permitir que las tareas de tiempo real puedan migrar su ejecución de un core a otro, sobre el consumo en sistemas empotrados multicore.[EN] A major design issue in embedded systems is reducing the power consumption since batteries have a limited energy budget. For this purpose, several techniques such as Dynamic Voltage and Frequency Scaling (DVFS) or task migration are being used. DVFS circuitry allows reducing power by selecting the optimal voltage supply, while task migration achieves this effect by balancing the workload among cores. This work focuses on power-aware scheduling allowing task migration to reduce energy consumption in multicore embedded systems implementing DVFS capabilities. To address energy savings, the devised schedulers follow two main rules: migrations are allowed at specific points of time and only one task is allowed to migrate each time. Two algorithms have been proposed working under real-time constraints. The simpler algorithm, namely, Single Option Migration (SOM) only checks one target core before performing a migration. In contrast, the Multiple Option Migration (MOM) searches the optimal target core. In general, the MOM algorithm achieves better energy savings than the SOM algorithm, although differences are wider for a reduced number of cores and frequency/voltage levels. Moreover, the MOM algorithm reduces energy consumption as much as 40% over the typical Worst Fit (WF) strategy.March Cabrelles, JL. (2012). A Dynamic Power-Aware Partitioner with Real-Time Task Migration for Embedded Multicore Processors. http://hdl.handle.net/10251/29847Archivo delegad

    Using polarons for sub-nK quantum non-demolition thermometry in a Bose-Einstein condensate

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    We introduce a novel minimally-disturbing method for sub-nK thermometry in a Bose-Einstein condensate (BEC). Our technique is based on the Bose-polaron model; namely, an impurity embedded in the BEC acts as the thermometer. We propose to detect temperature fluctuations from measurements of the position and momentum of the impurity. Crucially, these cause minimal back-action on the BEC and hence, realize a non-demolition temperature measurement. Following the paradigm of the emerging field of \textit{quantum thermometry}, we combine tools from quantum parameter estimation and the theory of open quantum systems to solve the problem in full generality. We thus avoid \textit{any} simplification, such as demanding thermalization of the impurity atoms, or imposing weak dissipative interactions with the BEC. Our method is illustrated with realistic experimental parameters common in many labs, thus showing that it can compete with state-of-the-art \textit{destructive} techniques, even when the estimates are built from the outcomes of accessible (sub-optimal) quadrature measurements.Comment: New references adde

    Population Structure and Growth of the Threatened Pen Shell, Pinna rudis (Linnaeus, 1758) in a Western Mediterranean Marine Protected Area

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    Coastal ecosystems are being extensively degraded by human activities. Benthic, slow-growing and long-lived species are highly vulnerable to these impacts. Marine protected areas may avoid biodiversity losses through habitat protection. The pen shell Pinna rudis is a protected species, but scarce data are available on its ecology and biology. The present study is a comprehensive ecological study encompassing several unknown aspects of the growth and inner record in relation to habitat types, density and size distribu¬tion. During the summers of 2011, 2012 and 2013, a total of 418 strip transects were conducted by scuba diving in the Marine Pro¬tected Area of Cabrera National Park (39.14° N, 2.96° E). Samples were conducted across different habitats and depths, exploring 152,146.35 m2 in total. A large range of sizes and ages were recorded within the park with densities ranging from 0 to 6.89 ind./100 m2. Most pen shells were patchily distributed and concentrated mainly in caves. Two hotspots represented the highest densities ever recorded worldwide, showing a potential link to high larval accumulation and settlement. The population size structure showed a unimodal distribution with shell width ranging from 6.2 to 25.0 cm, with an average shell width of 16.0 ± 3.4 cm. The absolute growth was asymptotic, with a maximum age of 28-31 years and length of 45 cm. This study on the biology and ecology of a well-established population of Pinna rudis in the Western Mediterranean could set a baseline for the conservation of this species in other areasVersión del editor0,56

    Haplosporidium pinnae Parasite Detection in Seawater Samples

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    In this study, we investigated the presence of the parasite Haplosporidium pinnae, which is a pathogen for the bivalve Pinna nobilis, in water samples from different environments. Fifteen mantle samples of P. nobilis infected by H. pinnae were used to characterize the ribosomal unit of this parasite. The obtained sequences were employed to develop a method for eDNA detection of H. pinnae. We collected 56 water samples (from aquaria, open sea and sanctuaries) for testing the methodology. In this work, we developed three different PCRs generating amplicons of different lengths to determine the level of degradation of the DNA, since the status of H. pinnae in water and, therefore, its infectious capacity are unknown. The results showed the ability of the method to detect H. pinnae in sea waters from different areas persistent in the environment but with different degrees of DNA fragmentation. This developed method offers a new tool for preventive analysis for monitoring areas and to better understand the life cycle and the spread of this parasite.info:eu-repo/semantics/publishedVersio

    A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks

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    this is the author’s version of a work that was accepted for publication in Future Generation Computer Systems. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Future Generation Computer Systems, vol. 56 (2016). DOI 10.1016/j.future.2015.06.011.Nowadays, real-time embedded applications have to cope with an increasing demand of functionalities, which require increasing processing capabilities. With this aim real-time systems are being implemented on top of high-performance multicore processors that run multithreaded periodic workloads by allocating threads to individual cores. In addition, to improve both performance and energy savings, the industry is introducing new multicore designs such as ARM’s big.LITTLE that include heterogeneous cores in the same package. A key issue to improve energy savings in multicore embedded real-time systems and reduce the number of deadline misses is to accurately estimate the execution time of the tasks considering the supported processor frequencies. Two main aspects make this estimation difficult. First, the running threads compete among them for shared resources. Second, almost all current microprocessors implement Dynamic Voltage and Frequency Scaling (DVFS) regulators to dynamically adjust the voltage/frequency at run-time according to the workload behavior. Existing execution time estimation models rely on off-line analysis or on the assumption that the task execution time scales linearly with the processor frequency, which can bring important deviations since the memory system uses a different power supply. In contrast, this paper proposes the Processor–Memory (Proc–Mem) model, which dynamically predicts the distinct task execution times depending on the implemented processor frequencies. A power-aware EDF (Earliest Deadline First)-based scheduler using the Proc–Mem approach has been evaluated and compared against the same scheduler using a typical Constant Memory Access Time model, namely CMAT. Results on a heterogeneous multicore processor show that the average deviation of Proc–Mem is only by 5.55% with respect to the actual measured execution time, while the average deviation of the CMAT model is 36.42%. These results turn in important energy savings, by 18% on average and up to 31% in some mixes, in comparison to CMAT for a similar number of deadline misses. © 2015 Elsevier B.V. All rights reserved.This work was supported by the Spanish Ministerio de Economia y Competitividad (MINECO) and by FEDER funds under Grant TIN2012-38341-004-01, and by the Intel Early Career Faculty Honor Program Award.Sahuquillo Borrás, J.; Hassan Mohamed, H.; Petit Martí, SV.; March Cabrelles, JL.; Duato Marín, JF. (2016). A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks. Future Generation Computer Systems. 56:211-219. https://doi.org/10.1016/j.future.2015.06.011S2112195
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