The End-of-Substructure Card for the ATLAS ITk Strip Detector: Status of the Electronics Design and Results from Recent Quality Control Tests

The silicon tracker of the ATLAS experiment will be upgraded for the upcoming High-Luminosity Upgrade of the LHC (HL-LHC). The main building blocks of the new strip tracker are modules that consist of silicon sensors and read-out ASICs, the latter hosted on hybrid PCBs. Up to 14 modules are assembled on carbon-fibre substructures, commonly named staves in the central barrel region and petals in the two end-cap regions, for mechanical support. An End-of-Substructure (EoS) card is located at the end of each substructure and facilitates the transfer of data, power, and control signals between the modules and the off-detector systems. The module front-end ASICs transfer data (up to 28 differential lines at 640 MBit/s) to low-powered GigaBit Transceivers (lpGBT) ASICs on the EoS card. The lpGBT(s) provide data serialisation and use a 10 GBit/s versatile optical link plus transceiver (VTRx+) package to transmit signals to the off-detector systems. To meet the tight integration requirements in the detector, several EoS card designs have been realised. The produced prototypes have been populated with the currently available versions of the lpGBT and VTRx+ ASICs. Here, we present the current status of the EoS cards electronic design, results from extreme temperature, magnetic field and integration tests. Additionally, we discuss the results of detailed investigations into the optical signal quality and introduce a new eye-diagram extraction tool to be used in the Quality Control (QC) procedure that aims to ensure full functionality of the EoS card throughout the entire HL-LHC operation

Current status of the End-of-Substructure (EoS) card project for the ATLAS Strip Tracker using final ASICs

The silicon tracker of the ATLAS experiment will be upgraded for the upcoming High-Luminosity Upgradeof the LHC (HL-LHC). The main building blocks of the new strip tracker are modules that consist ofsilicon sensors and hybrid PCBs hosting the read-out ASICs. The modules are mounted on rigid carbon fibresubstructures, known as staves in the central barrel region and petals in the end-cap regions, thatprovide common services to all the modules. At the end of each stave or petal side, a so-called End-of-Substructure (EoS) card facilitates the transfer of data, power, and control signals between the modulesand the off-detector systems. The module front-end electronics transfer data to the EoS card on 640Mbit/s differential lines. The EoS connects up to 28 data lines to one or two lpGBT chips that providedata serialisation and uses a 10 GBit/s versatile optical link (VTRx+) to transmit signals to the off-detectorsystems. The lpGBT also recovers the LHC clock on the downlink and generates clock and control signalsfor the modules. To meet the tight integration requirements in the detector, several different EoScard designs are needed. Custom-made holders and clamps are produced to guide cables and opticalfibres as well as to shield the sensors from the opto-electric system. Here we present the production readyEoS card’s electronic design integrating final lpGBTv1 and VTRx+ ASICs from CERN, as well asresults from recent quality assurance tests including detailed characterisation of the opto-electronicssystem by its bit error rate, jitter, and eye diagram representation. Since each EoS sits at a single-point-of-failure for an entire stave or petal side, a dedicated quality control (QC) procedure for the production has been developed. An overview of the QC will also be presented

Current status of the end-of-substructure (EoS) card project for the ATLAS strip tracker upgrade using final ASICs

In the context of the high-luminosity upgrade of the LHC and ATLAS, the microstrip-tracking detector will be redesigned. The main building blocks are substructures with multiple sensors and their electronics. Each substructure will have a single interface to the off-detector system, the so-called End-of-Substructure (EoS) card. Its physical realisation is a set of printed circuit boards (PCBs). The PCB integrates ASICs and hybrids, which multiplex or demultipex the data and transmit with a rate up to 10 Gb/s or receive with a rate up to 2.5 Gb/s on optical fibres. These active parts are developed at CERN and are known as lpGBT and VTRx+. The EoS card integrates the active parts with the required electronics for the specified operation and within the mechanical constraints of the detector. In this paper critical design aspects such as the low-impedance powering scheme and the PCB setup are described. The EoS card has reached its final state for a series production, including the required setups for quality control. The achieved transmission quality on the 10 Gb/s links is presented

On a practical distributed source coding scheme for wireless sensor networks

The new European X-ray Free-Electron Laser is the first X-ray free-electron laser capable of delivering X-ray pulses with a megahertz inter-pulse spacing, more than four orders of magnitude higher than previously possible. However, to date, it has been unclear whether it would indeed be possible to measure high-quality diffraction data at megahertz pulse repetition rates. Here, we show that high-quality structures can indeed be obtained using currently available operating conditions at the European XFEL. We present two complete data sets, one from the well-known model system lysozyme and the other from a so far unknown complex of a β-lactamase from K. pneumoniae involved in antibiotic resistance. This result opens up megahertz serial femtosecond crystallography (SFX) as a tool for reliable structure determination, substrate screening and the efficient measurement of the evolution and dynamics of molecular structures using megahertz repetition rate pulses available at this new class of X-ray laser source