Evaluation of DC-link decoupling using electrolytic or polypropylene film capacitors in three-phase grid-connected photovoltaic inverters

The life expectancy and long term reliability of grid-connected three-phase photovoltaic (PV) inverters can be increased by replacing the conventional electrolytic film capacitors by metallized polypropylene film capacitors. This paper presents a detailed evaluation of a three-phase grid-connected PV inverter performance when replacing the electrolytic capacitor with a minimum value of metallized polypropylene film capacitor-one. The minimum dc bus capacitance leads to larger voltage ripples. However, such ripples were found to be within acceptable limits to run the inverter satisfactorily. Simulation results are presented for a 15-kW grid-connected inverter at nominal voltage of 700V dc and experimental results are provided for a 3.0-kW system at a nominal voltage of 400V dc, built in the laboratory.Peer ReviewedPostprint (published version

Voltage balancing method for a seven-level stacked multicell converter using minimum-switching transitions

This paper presents a voltage balancing method for stacked multicell converters based on phase disposition pulse-width modulation. This method is based on minimizing a cost function to determine the optimum redundant state for capacitor voltage balance for each particular voltage level. The robustness of the proposed voltage balancing method is verified against static and dynamic unbalanced load conditions. Furthermore, a significant reduction in the switching frequencies of the power devices is achieved by using sawtooth carriers instead of standard triangular carriers without affecting the voltage balancing capability.Peer ReviewedPostprint (published version

Optimum state voltage balancing method for stacked multicell converters

This paper presents a voltage balancing method for stacked multicell converters based on phase disposition pulse-width modulation. This method is based on minimizing a cost function to determine the optimum redundant state for capacitor voltage balance for each particular voltage level. The robustness of the proposed voltage balancing method is verified against static and dynamic unbalanced load conditions. Furthermore, a significant reduction in the switching frequencies of the power devices is achieved by using sawtooth carriers instead of standard triangular carriers without affecting the voltage balancing capability.Peer ReviewedPostprint (published version

Harmonic elimination control of a five-level DC-AC cascaded H-bridge hybrid inverter

A five-level hybrid cascaded inverter operating under selective harmonic elimination (SHE) pulse-width modulation (PWM) control is discussed in this paper. The topology is a cascaded connection of a conventional three-phase, two-level inverter and an H-bridge module for each phase with a single DC-source. The topology boosts the output voltage within limits and with no additional DC-DC converters. However, such boosting feature depends on the control of the floating capacitor voltage and the load power factor. The regulation of the floating capacitor for the given modulation strategy is also analyzed. Experimental results taken from a single-phase laboratory prototype are presented to confirm the operational characteristics of the converter

Five-level active NPC converter topology: SHE-PWM control and operation principles

The neutral-point-clamped (NPC) inverter topology has been the centre of research and development effort for numerous applications, including medium- and high-voltage electric motor drives, static compensators (STATCOMs) and other utility type of power electronic systems for almost three decades now. Pulse-width modulation (PWM) control methods have been developed for such topology for respective three-level and multilevel versions. The issue of voltage balancing between the DC bus capacitors is a drawback that requires attention and the problem becomes more serious as the number of levels increases. Selective harmonic elimination PWM can be applied to control the topology as a method to reduce the switching transitions to the lowest possible number. The active NPC (ANPC) topology is derived from the NPC topology by adding an active switch in anti-parallel to each clamping diode. Hybrid configurations combining flying capacitors are also possible. The five-level topology discussed in this paper is derived through different connections of active clamping paths. A novel recently proposed five-level symmetrically defined SHE-PWM method is applied. The simulation results presented in the paper confirm the suitability of the new method

Voltage balancing scheme for the multilevel flying capacitor converter using phase-shifted PWM

In flying capacitor (FC) converters, phase-shifted pulse-width modulation (PS-PWM) provides natural voltage balancing. However, for a practical application, a more robust balancing mechanism of maintaining the FC voltages at the desired values is required. This paper proposes a new closed-loop voltage balancing method for multilevel FC converters using PS-PWM. The proposed method balances the voltages of the FCs by modifying the duty cycle of each switch of the FC converter using a proportional (P) controller. The crossed effect between FC currents and duty cycles is considered and is used for FC voltage balancing. The Simulation results verify that the proposed voltage balancing method is very robust to different operating conditions, such as load transients and non-linear loads.Postprint (author’s final draft

Voltage balancing strategy for a five-level flying capacitor converter using phase disposition PWM with sawtooth-shaped arriers

The flying capacitor (FC) multilevel converter has attracted a great deal of interest in the recent years because of its easier extension to a higher number of levels (n>;3), as compared to its counterpart, the diode-clamped converter (DCC). The main focus of this paper is to develop a voltage balancing scheme of FCs for a five-level FC converter based on phase disposition pulse-width modulation (PD-PWM). Since there are multiple states that produce the same output voltage at the leg of the converter, such a redundancy is used to regulate the FC voltages at their desired levels. The selection of the optimal states is performed by minimizing a cost function. A drawback observed when using standard symmetrical triangular carriers for the PD-PWM, is the additional switching events that are produced due to transitions within the same voltage level. Nevertheless, this fact can be avoided by using sawtooth carrier waveforms instead. Simulation results verify the robustness of the proposed voltage balancing scheme against static and dynamic load conditions. Moreover, using sawtooth carriers a significant reduction of the switching frequency is achieved as compared to the use of standard triangle carriers while maintaining the FC voltage balanced.Peer ReviewedPostprint (author’s final draft