A Single-Input Single-Output Approach by using Minor-Loop Voltage Feedback Compensation with Modified SPWM Technique for Three-Phase AC–DC Buck Converter

The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC–DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification

Modulación pwm en fpga basado en máquinas de estado finito

La modulación por ancho de pulsos PWM, consiste en la generación de pulsos que varían en su ciclo útil de acuerdo con el valor de la señal de entrada. En este artículo se presenta una técnica basada en máquinas de estado finito FSM para modular PWM en dispositivos lógicos programables FPGAs. A la entrada se tiene una señal digital de tres bits y una señal de reloj, y a la salida se obtiene una señal con ciclo útil proporcional al valor de la señal de entrada con una frecuencia igual a 1/9 la frecuencia de la señal de reloj. La programación de la FSM se realiza en una herramienta CAE de Xilinx, la cual permite generar automáticamente el código VHDL, y finalmente se simula su funcionamiento

Modulación pwm en fpga basado en máquinas de estado finito

La modulación por ancho de pulsos PWM, consiste en la generación de pulsos que varían en su ciclo útil de acuerdo con el valor de la señal de entrada. En este artículo se presenta una técnica basada en máquinas de estado finito FSM para modular PWM en dispositivos lógicos programables FPGAs. A la entrada se tiene una señal digital de tres bits y una señal de reloj, y a la salida se obtiene una señal con ciclo útil proporcional al valor de la señal de entrada con una frecuencia igual a 1/9 la frecuencia de la señal de reloj. La programación de la FSM se realiza en una herramienta CAE de Xilinx, la cual permite generar automáticamente el código VHDL, y finalmente se simula su funcionamiento

Radiation Tolerant Electronics, Volume II

Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits and embedded systems. This research is strongly driven by the growing need for radiation hardened electronics for space applications, high-energy physics experiments such as those on the large hadron collider at CERN, and many terrestrial nuclear applications, including nuclear energy and safety management. With the progressive scaling of integrated circuit technologies and the growing complexity of electronic systems, their ionizing radiation susceptibility has raised many exciting challenges, which are expected to drive research in the coming decade.After the success of the first Special Issue on Radiation Tolerant Electronics, the current Special Issue features thirteen articles highlighting recent breakthroughs in radiation tolerant integrated circuit design, fault tolerance in FPGAs, radiation effects in semiconductor materials and advanced IC technologies and modelling of radiation effects

On-line health monitoring of passive electronic components using digitally controlled power converter

This thesis presents System Identification based On-Line Health Monitoring to analyse the dynamic behaviour of the Switch-Mode Power Converter (SMPC), detect, and diagnose anomalies in passive electronic components. The anomaly detection in this research is determined by examining the change in passive component values due to degradation. Degradation, which is a long-term process, however, is characterised by inserting different component values in the power converter. The novel health-monitoring capability enables accurate detection of passive electronic components despite component variations and uncertainties and is valid for different topologies of the switch-mode power converter. The need for a novel on-line health-monitoring capability is driven by the need to improve unscheduled in-service, logistics, and engineering costs, including the requirement of Integrated Vehicle Health Management (IVHM) for electronic systems and components. The detection and diagnosis of degradations and failures within power converters is of great importance for aircraft electronic manufacturers, such as Thales, where component failures result in equipment downtime and large maintenance costs. The fact that existing techniques, including built-in-self test, use of dedicated sensors, physics-of-failure, and data-driven based health-monitoring, have yet to deliver extensive application in IVHM, provides the motivation for this research ... [cont.]

Integrated Topologies And Digital Control For Satellite Power Management And Distribution Systems

This work is focused on exploring advanced solutions for space power management and distribution (PMAD) systems. As spacecraft power requirements continue to increase, paralleled by the pressures for reducing cost and overall system weight, power electronics engineers will continue to face major redesigns of the space power systems in order to meet such challenges. Front-end PMAD systems, used to interface the solar sources and battery backup to the distribution bus, need to be designed with increased efficiency, reliability, and power density. A new family of integrated single-stage power converter structures is introduced here. This family allows the interface and control of multiple power sources and storage devices in order to optimize utilization of available resources. Employing single-stage power topologies, these converters control power flow efficiently and cost-effectively. This is achieved by modifying the operation and control strategies of isolated soft-switched half-bridge and full-bridge converters--two of the most popular two-port converter topologies. These topologies are reconfigured and utilized to realize three power processing paths. These paths simultaneously utilize the power devices, allowing increased functionality while promising reduced losses and enhanced power densities. Each of the proposed topologies is capable of performing simultaneous control of two of its three ports. Control objectives include battery or ultra-capacitor charge regulation, solar array maximum power point tracking (MPPT), and/or bus voltage regulation. Another advantage of the proposed power structure is that current engineering design concepts can be used to optimize the new topologies in a fashion similar to the mother topologies. This includes component selection and magnetic design procedures, as well as achieving soft-switching for increased efficiency at higher switching frequencies. Galvanic isolation of the load port through high-frequency transformers provides design flexibility for high step-up/step-down conversion ratios. It further allows the converters to be used as power electronics building blocks (PEBB) with outputs connected in different series/parallel combinations to meet different load requirements. Utilizing such converters promises significant savings in size, weight, and costs of the power management system as well as the devices it manages. Chapter 1 of this dissertation provides an introduction to the requirements, challenges, and trends of space PMAD. A review of existing multi-port converter technologies and digital control techniques is given in Chapter 2. Chapter 3 discusses different PMAD system architectures. It outlines the basic concepts used for PMAD integration and discusses the potential for improvement. Chapters 4 and 5 present and discuss the operation and characteristics of three different integrated multi-port converters. Chapter 6 presents improved methods for practical digital control of switching converters, which are especially useful in complex multi-objective controllers used for PMAD. This is followed by conclusions and suggested future work

Digital Control Techniques for Single-Phase Power Factor Correction Rectifiers

Tightening governmental regulations and industry standards for input current harmonics and input power factor correction (PFC) of common electronic devices such as servers, computers and televisions continues to increase the need for high-performance, low-cost power factor correction controllers. In response to this need, digital non-linear carrier (DNLC) PFC control has been developed and is presented in this thesis. DNLC PFC control offers many unique advantages over existing PFC control techniques in terms of design simplicity, low harmonic current shaping over a wide load range including CCM and DCM operation and a reliable, inexpensive digital implementation based on low-resolution analog-to-digital converters (A/D\u27s) and digital pulse width modulator (DPWM). Implementation of the controller requires no microcontroller or digital signal processor (DSP) programming, and is well suited for a simple, low-cost integrated-circuit realization. DNLC PFC control is derived and analyzed for single-phase universal input PFC boost rectifiers. Further analysis of the operation of digitally controlled PFC rectifiers leads to the development of voltage loop compensator design constraints that avoid limit-cycling of the voltage loop. It is demonstrated that voltage loop limit-cycling is unavoidable when using traditional PFC control techniques un- der certain output loading conditions. However, it is also shown that voltage loop limit-cycling is avoidable under the same operating conditions when a DNLC PFC controller is implemented. Additionally, a unique output voltage sensing A/D is also developed that improves the PFC voltage loop transient response to load transients when paired with the DNLC PFC controller. Experimental results are shown for a 300W universal input boost PFC rectifier

Toward high-efficiency high power density single-phase DC-AC and AC-DC power conversion - architecture, topology and control

Power conversion between the single-phase AC grid and DC sources or loads plays an indispensable role in modern electrical energy system for both generation and consumption. The renewable resources and electrical energy storage are integrated to the grid through inverters. Telecoms, data centers and the rest of the digital world is powered by the grid through rectifiers. Existing and emerging applications all demand the DC-AC and AC-DC systems to be not only more efficient to reduce energy consumption, but also more compact to reduce cost and improve portability. Therefore, new AC-DC and DC-AC converter designs that improve the efficiency and power density of the system is a critical area of research and is the focus of this dissertation. The recent development of wide band-gap devices stimulates a new round of improvement on efficiency and power density of AC-DC converters. However, despite the new transistors used, the fundamental system architecture and topology remain relatively unchanged, which is becoming the bottleneck for further improvement. This dissertation explores new architecture, topology and control to overcome this bottleneck, targeting an order-of-magnitude improvement on power density and comparable efficiency to the conventional design. The proposed solutions build on two key innovations: the series-stacked buffer architecture for twice-line-frequency power pulsation decoupling in single-phase AC-DC and DC-AC conversion, and the flying capacitor multilevel topology for power transfer and waveform conversion between AC and DC. This work provides complete solutions for these ideas, including the theoretical development, design procedure, control method, hardware implementation and experimental characterization