Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect

Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.Comment: IEEE International Conference on Design Automation and Test in Europe (DATE 2015), Mar 2015, Grenoble, France. 201

Thin-film VCSEL and optical interconnection layer fabrications for fully embedded board level optical interconnects

textSemiconductor technology has been splendid evolved. As a consequence of, massive data traffic is required in system level. However copper based interconnection reached the upper limit of data transfer rate and can not provide enough bandwidth for high performance system. Copper based interconnection in long haul application was replaced to optical fiber. Optical interconnection in system level is generally considered as an alternative to provide high bandwidth. However, unlike long haul application, optical interconnection in system level encountered many problems such as compatibility, robustness and packaging difficulty. The compatibility to current electrical board system and packaging difficulty must be solved. This dissertation describes a fully embedded board level optical interconnection, which can solve many problems, components fabrication and hybrid integration with electrical layers. Thin-film VCSEL array and flexible optical waveguide are demonstrated. The optical interconnection layer integrated with thin-film VCSEL and photo-detector arrays is demonstrated.Electrical and Computer Engineerin

Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing

With the explosion of the number of compute nodes, the bottleneck of future computing systems lies in the network architecture connecting the nodes. Addressing the bottleneck requires replacing current backplane-based network topologies. We propose to revolutionize computing electronics by realizing embedded optical waveguides for onboard networking and wireless chip-to-chip links at 200-GHz carrier frequency connecting neighboring boards in a rack. The control of novel rate-adaptive optical and mm-wave transceivers needs tight interlinking with the system software for runtime resource management

Pluggable Optical Connector Interfaces for Electro-Optical Circuit Boards

A study is hereby presented on system embedded photonic interconnect technologies, which would address the communications bottleneck in modern exascale data centre systems driven by exponentially rising consumption of digital information and the associated complexity of intra-data centre network management along with dwindling data storage capacities. It is proposed that this bottleneck be addressed by adopting within the system electro-optical printed circuit boards (OPCBs), on which conventional electrical layers provide power distribution and static or low speed signaling, but high speed signals are conveyed by optical channels on separate embedded optical layers. One crucial prerequisite towards adopting OPCBs in modern data storage and switch systems is a reliable method of optically connecting peripheral cards and devices within the system to an OPCB backplane or motherboard in a pluggable manner. However the large mechanical misalignment tolerances between connecting cards and devices inherent to such systems are contrasted by the small sizes of optical waveguides required to support optical communication at the speeds defined by prevailing communication protocols. An innovative approach is therefore required to decouple the contrasting mechanical tolerances in the electrical and optical domains in the system in order to enable reliable pluggable optical connectivity. This thesis presents the design, development and characterisation of a suite of new optical waveguide connector interface solutions for electro-optical printed circuit boards (OPCBs) based on embedded planar polymer waveguides and planar glass waveguides. The technologies described include waveguide receptacles allowing parallel fibre connectors to be connected directly to OPCB embedded planar waveguides and board-to-board connectors with embedded parallel optical transceivers allowing daughtercards to be orthogonally connected to an OPCB backplane. For OPCBs based on embedded planar polymer waveguides and embedded planar glass waveguides, a complete demonstration platform was designed and developed to evaluate the connector interfaces and the associated embedded optical interconnect. Furthermore a large portfolio of intellectual property comprising 19 patents and patent applications was generated during the course of this study, spanning the field of OPCBs, optical waveguides, optical connectors, optical assembly and system embedded optical interconnects

Variation-Aware Modeling and Design of Nanophotonic Interconnects

Optical interconnects have started to replace electrical interconnects in the communications between racks and circuit boards with potential benefits in bandwidth, delay, power efficiency, and crosstalk. Silicon photonics has emerged to be a highly promising enabling technology for the short-reach nanophotonic interconnects because it offers favorable CMOS compatibility and high integration level. The fast-growing complexity of photonic integrated circuit (PIC) and close electro-optical integration call for computer-aided design (CAD) for integrated photonics, and electronic-photonic design automation (EPDA) including accurate behavior models and efficient simulation methodologies for integrated electro-optical systems. Also, the nanophotonic devices are highly sensitive to fabrication process variation and thermal variation effects, which requires proper modeling, optimization, and management schemes. To address these problems, this thesis is dedicated to the following two tasks: (1) compact modeling and circuit-level simulation of nanophotonic interconnects, and (2) power-efficient management of the variation effects in nanophotonic interconnects.The first part of the thesis develops compact models for key components in nanophotonic interconnects including silicon microring modulators, diode lasers, electro-absorption modulators (EAM), photodetectors, etc. These compact models are developed based on their electrical and optical properties, and are then extensively validated by measurement data. The model parameters are extracted from common electrical and optical tests. Implemented in Verilog-A, the models are used in SPICE simulations of optical links, whose results again agree well with measurement data. The compact model library and the simulation methodology enable electro-optical co-simulations and optical device design explorations in the circuit-level.In the second part of the thesis, we propose modeling methods and power-efficient management schemes for the process and thermal variations in optical interconnects. The proposed adaptive tuning technique performs on-chip self-tests and adaptively allocates just enough power for link operations. The technique saves significant amount of power compared to worst-case based conservative designs, and scales well w.r.t. variations and network size. We also design power-efficient pairing algorithms for microring-based optical interconnects. Our algorithms optimally mix-and-match microring-based devices to minimize the power consumption for tuning. The algorithms are tested on both measured and synthetic data sets, demonstrating promising results of power reduction and scalability for handling a large number of devices. Lastly, we decompose and analyze wafer-scale spatial patterns of process variations in microring modulators. We further investigate the correlations between the spatial patterns and fabrication process steps, which is valuable for understanding process variation sources and improving fabrication processes for uniformity

Analysis of variation in on-chip waveguide distribution schemes and optical receiver circuits

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2006.Page 103 blank.Includes bibliographical references (p. 99-102).Recently, optical interconnect has emerged as a possible alternative to electrical interconnect at chip-to-chip and on-chip length scales because of its potential to overcome power, delay, and bandwidth limitations of traditional electrical interconnect. This thesis examines the issues of variation involved in the implementation of a robust on-chip optical signal distribution network. First, the variation within the on-chip waveguide network is analyzed in terms of susceptibility to lithographic uncertainties and refractive index variations. Then, the robustness of an ultrashort pulse-based receiver circuit architecture is analyzed. Some variation sources considered are optical input power variation, load capacitance variation, parasitic capacitive coupling, and power supply noise. Simulation results show that, for both the passive waveguide network and the optical receiver circuit, variation can result in clock skew and jitter, which limit the frequencies at which the distribution network can operate. The impact of technology scaling on the optical receiver circuit architecture is assessed with respect to variation. The robustness of the optical network is compared with that of an all-electrical signal distribution network.(cont.) Results indicate, for the optical signal distribution network, that a trade-off exists between power consumption and robustness towards most sources of variation. In addition, the ultrashort pulse-based receiver circuit design demonstrates robustness towards many variation sources in the presence of technology scaling. The existence of variation in reasonable amounts will not obstruct the functionality of the receiver circuit. However, additional measures must be taken to minimize power supply variation and parasitic capacitive coupling, which will have a greater impact on robustness in future technology nodes.by Karthik Balakrishnan.S.M

Optical read-out techniques for the control of test-masses in gravitational wave observatories

This thesis discusses the development of optical read-out techniques, including a simple shadow sensor and a more elaborate compact homodyne interferometer, known as EUCLID. Both of these sensors could be utilised as part of a seismic isolation and suspension system of a ground-based gravitational wave observatory, such as Advanced LIGO. As part of the University of Birmingham’s commitment to the upgrade of the Advanced LIGO, it was responsible for providing a large quantity of sensor and actuator units. This required the development and qualification of the shadow sensor, through to production and testing. While characterising production units, an excess noise issue was uncovered and eventually mitigated; demonstrating that even for a ‘simple’ shadow sensor, ensuring a large quantity of units meet the target sensitivity requirement of 300 pm/rt-Hz at 1 Hz, is not a trivial exercise. Over the duration of this research, I played a key role in the design and fabrication of a novel compact interferometer. The objective of this work was to demonstrate that the interferometric technique offers a significant improvement over the existing shadow sensors and could easily be deployed in current, or future, generations of gravitational wave observatories. Encouraging sensitivities of approximately 50 pm/rt-Hz at 1 Hz, over operating ranges of approximately 6 mm have been achieved, whilst maintaining around 1 degree of mirror tilt immunity. In addition, this design overcomes many of the drawbacks traditionally associated with interferometers