43 research outputs found

    Miniaturized Transistors

    Get PDF
    What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications

    Silicon Nanowire FinFETs

    Get PDF

    Miniaturized Transistors, Volume II

    Get PDF
    In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by advancing fabrication techniques. We observe that miniaturization does not always refer to the latest technology node for digital transistors. Rather, by applying novel materials and device geometries, a significant reduction in the size of microelectronic devices for a broad set of applications can be achieved. The achievements made in the scaling of devices for applications beyond digital logic (e.g., high power, optoelectronics, and sensors) are taking the forefront in microelectronic miniaturization. Furthermore, all these achievements are assisted by improvements in the simulation and modeling of the involved materials and device structures. In particular, process and device technology computer-aided design (TCAD) has become indispensable in the design cycle of novel devices and technologies. It is our sincere hope that the results provided in this Special Issue prove useful to scientists and engineers who find themselves at the forefront of this rapidly evolving and broadening field. Now, more than ever, it is essential to look for solutions to find the next disrupting technologies which will allow for transistor miniaturization well beyond silicon’s physical limits and the current state-of-the-art. This requires a broad attack, including studies of novel and innovative designs as well as emerging materials which are becoming more application-specific than ever before

    Electrical characterization and modeling of low dimensional nanostructure FET

    Get PDF
    At the beginning of this thesis, basic and advanced device fabrication process which I haveexperienced during study such as top-down and bottom-up approach for the nanoscale devicefabrication technique have been described. Especially, lithography technology has beenfocused because it is base of the modern device fabrication. For the advanced device structure,etching technique has been investigated in detail.The characterization of FET has been introduced. For the practical consideration in theadvanced FET, several parameter extraction techniques have been introduced such as Yfunction,split C-V etc.FinFET is one of promising alternatives against conventional planar devices. Problem ofFinFET is surface roughness. During the fabrication, the etching process induces surfaceroughness on the sidewall surfaces. Surface roughness of channel decreases the effectivemobility by surface roughness scattering. With the low temperature measurement andmobility analysis, drain current through sidewall and top surface was separated. From theseparated currents, effective mobilities were extracted in each temperature conditions. Astemperature lowering, mobility behaviors from the transport on each surface have differenttemperature dependence. Especially, in n-type FinFET, the sidewall mobility has strongerdegradation in high gate electric field compare to top surface. Quantification of surfaceroughness was also compared between sidewall and top surface. Low temperaturemeasurement is nondestructive characterization method. Therefore this study can be a propersurface roughness measurement technique for the performance optimization of FinFET.As another quasi-1 D nanowire structure device, 3D stacked SiGe nanowire has beenintroduced. Important of strain engineering has been known for the effective mobility booster.The limitation of dopant diffusion by strain has been shown. Without strain, SiGe nanowireFET showed huge short channel effect. Subthreshold current was bigger than strained SiGechannel. Temperature dependent mobility behavior in short channel unstrained device wascompletely different from the other cases. Impurity scattering was dominant in short channelunstrained SiGe nanowire FET. Thus, it could be concluded that the strain engineering is notnecessary only for the mobility booster but also short channel effect immunity.Junctionless FET is very recently developed device compare to the others. Like as JFET,junctionless FET has volume conduction. Thus, it is less affected by interface states.Junctionless FET also has good short channel effect immunity because off-state ofjunctionless FET is dominated pinch-off of channel depletion. For this, junctionless FETshould have thin body thickness. Therefore, multi gate nanowire structure is proper to makejunctionless FET.Because of the surface area to volume ratio, quasi-1D nanowire structure is good for thesensor application. Nanowire structure has been investigated as a sensor. Using numericalsimulation, generation-recombination noise property was considered in nanowire sensor.Even though the surface area to volume ration is enhanced in the nanowire channel, devicehas sensing limitation by noise. The generation-recombination noise depended on the channelgeometry. As a design tool of nanowire sensor, noise simulation should be carried out toescape from the noise limitation in advance.The basic principles of device simulation have been discussed. Finite difference method andMonte Carlo simulation technique have been introduced for the comprehension of devicesimulation. Practical device simulation data have been shown for examples such as FinFET,strongly disordered 1D channel, OLED and E-paper.At the beginning of this thesis, basic and advanced device fabrication process which I haveexperienced during study such as top-down and bottom-up approach for the nanoscale devicefabrication technique have been described. Especially, lithography technology has beenfocused because it is base of the modern device fabrication. For the advanced device structure,etching technique has been investigated in detail.The characterization of FET has been introduced. For the practical consideration in theadvanced FET, several parameter extraction techniques have been introduced such as Yfunction,split C-V etc.FinFET is one of promising alternatives against conventional planar devices. Problem ofFinFET is surface roughness. During the fabrication, the etching process induces surfaceroughness on the sidewall surfaces. Surface roughness of channel decreases the effectivemobility by surface roughness scattering. With the low temperature measurement andmobility analysis, drain current through sidewall and top surface was separated. From theseparated currents, effective mobilities were extracted in each temperature conditions. Astemperature lowering, mobility behaviors from the transport on each surface have differenttemperature dependence. Especially, in n-type FinFET, the sidewall mobility has strongerdegradation in high gate electric field compare to top surface. Quantification of surfaceroughness was also compared between sidewall and top surface. Low temperaturemeasurement is nondestructive characterization method. Therefore this study can be a propersurface roughness measurement technique for the performance optimization of FinFET.As another quasi-1 D nanowire structure device, 3D stacked SiGe nanowire has beenintroduced. Important of strain engineering has been known for the effective mobility booster.The limitation of dopant diffusion by strain has been shown. Without strain, SiGe nanowireFET showed huge short channel effect. Subthreshold current was bigger than strained SiGechannel. Temperature dependent mobility behavior in short channel unstrained device wascompletely different from the other cases. Impurity scattering was dominant in short channelunstrained SiGe nanowire FET. Thus, it could be concluded that the strain engineering is notnecessary only for the mobility booster but also short channel effect immunity.Junctionless FET is very recently developed device compare to the others. Like as JFET,junctionless FET has volume conduction. Thus, it is less affected by interface states.Junctionless FET also has good short channel effect immunity because off-state ofjunctionless FET is dominated pinch-off of channel depletion. For this, junctionless FETshould have thin body thickness. Therefore, multi gate nanowire structure is proper to makejunctionless FET.Because of the surface area to volume ratio, quasi-1D nanowire structure is good for thesensor application. Nanowire structure has been investigated as a sensor. Using numericalsimulation, generation-recombination noise property was considered in nanowire sensor.Even though the surface area to volume ration is enhanced in the nanowire channel, devicehas sensing limitation by noise. The generation-recombination noise depended on the channelgeometry. As a design tool of nanowire sensor, noise simulation should be carried out toescape from the noise limitation in advance.The basic principles of device simulation have been discussed. Finite difference method andMonte Carlo simulation technique have been introduced for the comprehension of devicesimulation. Practical device simulation data have been shown for examples such as FinFET,strongly disordered 1D channel, OLED and E-paper.SAVOIE-SCD - Bib.électronique (730659901) / SudocGRENOBLE1/INP-Bib.électronique (384210012) / SudocGRENOBLE2/3-Bib.électronique (384219901) / SudocSudocFranceF

    Nouvelles méthodes pseudo-MOSFET pour la caractérisation des substrats SOI avancés

    Get PDF
    Les architectures des dispositifs Silicium-Sur-Isolant (SOI) représentent des alternatives attractives par rapport à celles en Si massif grâce à l amélioration des performances des transistors et des circuits. Dans ce contexte, les plaquettes SOI doivent être d excellente qualité.Dans cette thèse nous développons des nouveaux outils de caractérisation électrique et des modèles pour des substrats SOI avancés. La caractérisation classique pseudo-MOSFET ( -MOSFET) pour le SOI a été revisitée et étendue pour des mesures à basses températures. Les variantes enrichies de -MOSFET, proposées et validées sur des nombreuses géométries, concernent des mesures split C-V et des mesures bruit basse fréquence. A partir des courbes split C-V, une méthode d'extraction de la mobilité effective a été validée. Un modèle expliquant les variations de la capacité avec la fréquence s accorde bien avec les résultats expérimentaux. Le -MOSFET a été aussi étendu pour les films SOI fortement dopés et un modèle pour l'extraction des paramètres a été élaboré. En outre, nous avons prouvé la possibilité de caractériser des nanofils de SiGe empilés dans des architectures 3D, en utilisant le concept -MOSFET. Finalement, le SOI ultra-mince dans la configuration -MOSFET s'est avéré intéressant pour la détection des nanoparticules d'or.Silicon-On-Insulator (SOI) device architectures represent attractive alternatives to bulk ones thanks to the improvement of transistors and circuits performances. In this context, the SOI starting material should be of prime quality.In this thesis, we develop novel electrical characterization tools and models for advanced SOI substrates. The classical pseudo-MOSFET ( -MOSFET) characterization for SOI was revisited and extended to low temperatures. Enriched variants of -MOSFET, proposed and demonstrated on numerous geometries, concern split C-V and low-frequency noise measurements. Based on split C-V, an extraction method for the effective mobility was validated. A model explaining the capacitance variations with the frequency shows good agreement with the experimental results. The -MOSFET was also extended to highly doped SOI films and a model for parameter extraction was derived. Furthermore, we proved the possibility to characterize SiGe nanowire 3D stacks using the -MOSFET concept. Finally thin film -MOSFET proved to be an interesting, technology-light detector for gold nanoparticles.SAVOIE-SCD - Bib.électronique (730659901) / SudocGRENOBLE1/INP-Bib.électronique (384210012) / SudocGRENOBLE2/3-Bib.électronique (384219901) / SudocSudocFranceF

    Electrical Characterisation of III-V Nanowire MOSFETs

    Get PDF
    The ever increasing demand for faster and more energy-efficient electricalcomputation and communication presents severe challenges for the semiconductor industry and particularly for the metal-oxidesemiconductorfield-effect transistor (MOSFET), which is the workhorse of modern electronics. III-V materials exhibit higher carrier mobilities than the most commonly used MOSFET material Si so that the realisation of III-V MOSFETs can enable higher operation speeds and lower drive voltages than that which is possible in Si electronics. A lowering of the transistor drive voltage can be further facilitated by employing gate-all-around nanowire geometries or novel operation principles. However, III-V materials bring about their own challenges related to material quality and to the quality of the gate oxide on top of a III-V MOSFET channel.This thesis presents detailed electrical characterisations of two types of (vertical) III-V nanowire transistors: MOSFETs based on conventional thermionic emission; and Tunnel FETs, which utilise quantum-mechanical tunnelling instead to control the device current and reach inverse subthreshold slopes below the thermal limit of 60 mV/decade. Transistor characterisations span over fourteen orders of magnitude in frequency/time constants and temperatures from 11 K to 370 K.The first part of the thesis focusses on the characterisation of electrically active material defects (‘traps’) related to the gate stack. Low-frequency noise measurements yielded border trap densities of 10^18 to 10^20 cm^-3 eV^-1 and hysteresis measurements yielded effective trap densities – projected to theoxide/semiconductor interface – of 2x10^12 to 3x10^13 cm^-2 eV^-1. Random telegraph noise measurements revealed that individual oxide traps can locally shift the channel energy bands by a few millielectronvolts and that such defects can be located at energies from inside the semiconductor band gap all the way into the conduction band.Small-signal radio frequency (RF) measurements revealed that parts of the wide oxide trap distribution can still interact with carriers in the MOSFET channel at gigahertz frequencies. This causes frequency hystereses in the small-signal transconductance and capacitances and can decrease the RF gains by a few decibels. A comprehensive small-signal model was developed, which takes into account these dispersions, and the model was applied to guide improvements of the physical structure of vertical RF MOSFETs. This resulted in values for the cutoff frequency fT and the maximum oscillation frequency fmax of about 150 GHz in vertical III-V nanowire MOSFETs.Bias temperature instability measurements and the integration of (lateral) III-V nanowire MOSFETs in a back end of line process were carried out as complements to the main focus of this thesis. The results of this thesis provide a broad perspective of the properties of gate oxide traps and of the RF performance of III-V nanowire transistors and can act as guidelines for further improvement and finally the integration of III-V nanowire MOSFETs in circuits

    Nanostructured biosensors with DNA-based receptors for real-time detection of small analytes

    Get PDF
    In zahlreichen lebenswichtigen Bereichen haben sich Biosensoren als unverzichtbare Messgeräte erwiesen. Der Nachweis von spezifischen Molekülen im Körper für eine frühzeitige Krankheitserkennung erfordert empfindliche und zugleich zuverlässige Messmethoden. Ein rasantes Fortschreiten im Bereich der Nanotechnologie führt dabei zur Entwicklung von Materialien mit neuen Eigenschaften, und damit verbunden, auch zu innovativen Anwendungsmöglichkeiten im Bereich der Biosensorik. Das Zusammenspiel von Nanotechnologie und Sensortechnik gewährleistet die Konstruktion von Sensoren mit empfindlicheren Nachweisgrenzen und kürzeren Reaktionszeiten. Die Option zur Integration und Miniaturisierung stellen daher einen erfolgreichen Einsatz in direkter Patientennähe in Aussicht, sodass Nanobiosensoren die Brücke zwischen Laborddiagnostik und Standardanwendungen schließen können. Die folgende Arbeit widmet sich der Anwendung von nanostrukturierten Biosensoren für einen empfindlichen und markierungsfreien Nachweis von Zielmolekülen. Ein Hauptaugenmerk liegt dabei auf der kontinuierlichen Messung von Biomarkern mit kompakten Auslesesystemen, die eine direkte Signalmeldung und somit eine Detektion in Echtzeit ermöglichen. Dies erfordert zunächst die sorgfältige Funktionalisierung von Sensoroberflächen mit geeigneten DNA-basierten Rezeptoren. Infolgedessen werden beispielhaft verschiedene Sensorsysteme, Analyten und Charakterisierungsmethoden vorgestellt sowie universelle Strategien für die erfolgreiche Konfiguration von Nanobiosensorplattformen präsentiert. Das erste Anwendungsbeispiel widmet sich einem plasmonischen Biosensor, bei dem vertikal ausgerichtete Gold-Nanoantennen Signale mittels sog. lokalisierter Oberflächenplasmonenresonanz (LSPR) erzeugen. Mit dem Sensor konnte erfolgreich die Immobilisierung, das nachträgliche Blocken sowie die anschließende Hybridisierung von DNA nachgewiesen werden. Mithilfe des LSPR-Sensors wurden gleichzeitig grundlegende Hybridisierungsmechanismen auf nanostrukturierten und planaren Oberflächen verglichen und damit verbunden die einzigartigen optischen Eigenschaften metallischer Nanostrukturen betont. In einem zweiten Anwendungsbeispiel misst ein elektrischer Biosensor kontinuierlich die Konzentration des Stressmarkers Cortisol im menschlichen Speichel. Der direkte, markierungsfreie Nachweis von Cortisol mit Silizium-Nanodraht basierten Feldeffekttransistoren (SiNW FET) wurde anhand zugrunde liegender Ladungsverteilungen innerhalb des entstandenen Rezeptor-Analyte-Komplexes bewertet, sodass ein Nachweis des Analyten innerhalb der sog. Debye-Länge ermöglicht wird. Die erfolgreiche Strategie zur Oberflächenfunktionalisierung im Zusammenspiel mit dem Einsatz von SiNW FETs auf einem tragbaren Messgerät wurde anhand des Cortisolnachweises im Speichel belegt. Ein übereinstimmender Vergleich der gemessenen Corisolkonzentrationen mit Werten, die mit einer kommerziellen Alternative ermittelt wurden, verdeutlichen das Potential der entwickelten Plattform. Zusammenfassend veranschaulichen beide vorgestellten Nanobiosensor-Plattformen die vielseitige und vorteilhafte Leistungsfähigkeit der Systeme für einen kontinuierlichen Nachweis von Biomarkern in Echtzeit und vorzugsweise in Patientennähe.:Kurzfassung I Abstract III Abbreviations and symbols V Content VII 1 Introduction 1 1.1 Scope of the thesis 4 1.2 References 6 2 Fundamentals 9 2.1 Biosensors 9 2.2 Influence of nanotechnology on sensor development 10 2.3 Biorecognition elements 12 2.3.1 Biorecognition element: DNA 13 2.3.2 Aptamers 14 2.3.3 Immobilization of receptors 15 2.4 Transducer systems 17 2.4.1 Optical biosensors - surface plasmon resonance 17 2.4.2 Electric Biosensors – Field-effect transistors (FETs) 21 2.5 Metal oxide semiconductor field-effect transistor - MOSFET 21 2.6 Summary 26 2.7 References 27 3 Materials and methods 33 3.1 Plasmonic biosensors based on vertically aligned gold nanoantennas 33 3.1.1 Materials 33 3.1.2 Manufacturing of nanoantenna arrays 34 3.1.3 Surface modification and characterization 35 3.1.4 Measurement setup for detection of analytes 38 3.2 SiNW FET-based real-time monitoring of cortisol 40 3.2.1 Materials 40 3.2.2 Manufacturing of silicon nanowire field effect transistors (SiNW FETs) 42 3.2.3 Integration of SiNW FETs into a portable platform 42 3.2.4 Biomodification and characterization of electronic biosensors SiNW FETs 42 3.2.5 Electric characterization of FETs 47 3.3 References 50 4 Plasmonic DNA biosensor based on vertical arrays of gold nanoantennas 51 4.1 Introduction - Optical biosensors operating by means of LSPR 53 4.2 Biosensing with vertically aligned gold nanoantennas 56 4.2.1 Sensor fabrication, characterization, and integration 56 4.2.2 Integration of microfluidics 58 4.2.3 Immobilization of probe DNA and backfilling 58 4.2.4 Hybridization of complementary DNA strands 62 4.2.5 Surface coverage and hybridization efficiency of DNA 69 4.2.6 Refractive index sensing 72 4.2.7 Backfilling and blocking 73 4.3 Summary 75 4.4 References 77 5 Label-free detection of salivary cortisol with SiNW FETs 83 5.1 Introduction 85 5.2 Design, integration, and performance of SiNW FETs into a portable platform 89 5.2.1 Structure and electrical characteristics of honeycomb SiNW FETs 89 5.2.2 Integration of SiNW FET into a portable measuring unit 91 5.2.3 Performance of SiNW FET arrays 93 5.3 Detection of biomolecules with SiNW FETs 102 5.3.1 General considerations for biodetection with FETs 102 5.3.2 Sensing aptamers with FETs 103 5.3.3 Biodetection of the analyte cortisol with SiNW FETs 104 5.3.4 Detection of cortisol with SiNW FETs 112 5.4 Summary 119 5.5 References 121 6 Summary and outlook 131 6.1 Summary 131 6.2 Perspectives – toward multiplexed biosensing applications 134 6.3 References 137 Appendix i A.1 Protocols i A.1.1 Functionalization of gold antennas with thiolated DNA i A.1.2 Functionalization of SiO2 with TESPSA and amino-modified receptors i A.1.3 Functionalization with APTES and carboxyl-modified receptors ii A.1.4 Preparation of microfluidic channels via soft lithography ii A.2 Predicted secondary structures iv A.2.1 Secondary structures of 100base pair target without probe-strands iv A.2.2 Secondary structures of 100base pair target with 25 base pair probe-strand x Versicherung xvii Acknowledgments xix List of publications xxi Peer-reviewed publications xxi Publications in preparation xxi Selected international conferences xxii Curriculum Vitae xxiiiBiosensors have proven to be indispensable in numerous vital areas. For example, detecting the presence and concentration of specific biomarkers requires sensitive and reliable measurement methods. Rapid developments in the field of nanotechnology lead to nanomaterials with new properties and associated innovative applications. Thus, nanotechnology has a far-reaching impact on biosensors' development, e.g., delivery of biosensing devices with greater sensitivity, shorter response times, and precise but cost-effective sensor platforms. In addition, nanobiosensors hold high potential for integration and miniaturization and can operate directly at the point of care - serving as a bridge between diagnostics and routine tests. This work focuses on applying nanostructured biosensors for the sensitive and label-free detection of analytes. A distinct aim is the continuous monitoring of biomarkers with compact read-out systems to provide direct, valuable feedback in real-time. The first step in achieving this goal is the adequate functionalization of nanostructured sensor surfaces with suitable receptors to detect analytes of interest. Due to their thermal and chemical stability with the possibility for customizable functionalization, DNA-based receptors are selected. Thereupon, universal strategies for confining nanobiosensor platforms are presented using different sensor systems, analytes, and characterization methods. As a first application, a plasmonic biosensor based on vertically aligned gold nanoantennas tracked the immobilization, blocking, and subsequent hybridization of DNA by means of localized surface plasmon resonance (LSPR). At the same time, the LSPR sensor was used to evaluate fundamental hybridization mechanisms on nanostructured and planar surfaces, emphasizing the unique optical properties of metallic nanostructures. In a second application, an electric sensor based on silicon nanowire field-effect transistors (SiNW FET) monitored the level of the stress marker cortisol in human saliva. Based on evaluating the underlying charge distributions within the resulting receptor-analyte complex of molecules, the detection of cortisol within the Debye length is facilitated. Thus, direct, label-free detection of cortisol in human saliva using SiNW FET was successfully applied to the developed platform and compared to cortisol levels obtained using a commercial alternative. In summary, both presented platforms indicate a highly versatile and beneficial performance of nanobiosensors for continuous detection of biomarkers in real-time and preferably point-of-care (POC).:Kurzfassung I Abstract III Abbreviations and symbols V Content VII 1 Introduction 1 1.1 Scope of the thesis 4 1.2 References 6 2 Fundamentals 9 2.1 Biosensors 9 2.2 Influence of nanotechnology on sensor development 10 2.3 Biorecognition elements 12 2.3.1 Biorecognition element: DNA 13 2.3.2 Aptamers 14 2.3.3 Immobilization of receptors 15 2.4 Transducer systems 17 2.4.1 Optical biosensors - surface plasmon resonance 17 2.4.2 Electric Biosensors – Field-effect transistors (FETs) 21 2.5 Metal oxide semiconductor field-effect transistor - MOSFET 21 2.6 Summary 26 2.7 References 27 3 Materials and methods 33 3.1 Plasmonic biosensors based on vertically aligned gold nanoantennas 33 3.1.1 Materials 33 3.1.2 Manufacturing of nanoantenna arrays 34 3.1.3 Surface modification and characterization 35 3.1.4 Measurement setup for detection of analytes 38 3.2 SiNW FET-based real-time monitoring of cortisol 40 3.2.1 Materials 40 3.2.2 Manufacturing of silicon nanowire field effect transistors (SiNW FETs) 42 3.2.3 Integration of SiNW FETs into a portable platform 42 3.2.4 Biomodification and characterization of electronic biosensors SiNW FETs 42 3.2.5 Electric characterization of FETs 47 3.3 References 50 4 Plasmonic DNA biosensor based on vertical arrays of gold nanoantennas 51 4.1 Introduction - Optical biosensors operating by means of LSPR 53 4.2 Biosensing with vertically aligned gold nanoantennas 56 4.2.1 Sensor fabrication, characterization, and integration 56 4.2.2 Integration of microfluidics 58 4.2.3 Immobilization of probe DNA and backfilling 58 4.2.4 Hybridization of complementary DNA strands 62 4.2.5 Surface coverage and hybridization efficiency of DNA 69 4.2.6 Refractive index sensing 72 4.2.7 Backfilling and blocking 73 4.3 Summary 75 4.4 References 77 5 Label-free detection of salivary cortisol with SiNW FETs 83 5.1 Introduction 85 5.2 Design, integration, and performance of SiNW FETs into a portable platform 89 5.2.1 Structure and electrical characteristics of honeycomb SiNW FETs 89 5.2.2 Integration of SiNW FET into a portable measuring unit 91 5.2.3 Performance of SiNW FET arrays 93 5.3 Detection of biomolecules with SiNW FETs 102 5.3.1 General considerations for biodetection with FETs 102 5.3.2 Sensing aptamers with FETs 103 5.3.3 Biodetection of the analyte cortisol with SiNW FETs 104 5.3.4 Detection of cortisol with SiNW FETs 112 5.4 Summary 119 5.5 References 121 6 Summary and outlook 131 6.1 Summary 131 6.2 Perspectives – toward multiplexed biosensing applications 134 6.3 References 137 Appendix i A.1 Protocols i A.1.1 Functionalization of gold antennas with thiolated DNA i A.1.2 Functionalization of SiO2 with TESPSA and amino-modified receptors i A.1.3 Functionalization with APTES and carboxyl-modified receptors ii A.1.4 Preparation of microfluidic channels via soft lithography ii A.2 Predicted secondary structures iv A.2.1 Secondary structures of 100base pair target without probe-strands iv A.2.2 Secondary structures of 100base pair target with 25 base pair probe-strand x Versicherung xvii Acknowledgments xix List of publications xxi Peer-reviewed publications xxi Publications in preparation xxi Selected international conferences xxii Curriculum Vitae xxii

    A Rigorous Simulation Based Study of Gate Misalignment Effects in Gate Engineered Double-Gate (DG) MOSFETs

    Get PDF
    In this work, a numerical simulation based study on the effects of gate misalignment between the front and the back gate for gate engineered double-gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) has been presented. A comparative study of electrical characteristics and its effects on device performance between single material double gate (SMDG), double material double gate (DMDG) and triple material double gate (TMDG) MOSFETs have been investigated qualitatively. Both source side misalignment (SSM) and drain side misalignment (DSM) of different lengths in the back gate have been considered to investigate the effects of gate misalignment on device performance. In this context, an extensive simulation has been performed by a commercially available two-dimensional (2D) device simulator (ATLASTM, SILVACO Int.) to figure out the impacts of misalignment on device characteristics like surface potential, threshold voltage, drain-induced-barrier lowering (DIBL), subthreshold swing, subthreshold current, maximum drain current, transconductance and output conductance

    Simulation of FinFET Structures

    Get PDF
    The intensive downscaling of MOS transistors has been the major driving force behind the aggressive increases in transistor density and performance, leading to more chip functionality at higher speeds. While on the other side the reduction in MOSFET dimensions leads to the close proximity between source and drain, which in turn reduces the ability of the gate electrode to control the potential distribution and current flow in the channel region and also results in some undesirable effects called the short-channel effects. These limitations associated with downscaling of MOSFET device geometries have lead device designers and researchers to number of innovative techniques which include the use of different device structures, different channel materials, different gate-oxide materials, different processes such as shallow trench isolation, source/drain silicidation, lightly doped extensions etc. to enable controlled device scaling to smaller dimensions. A lot of research and development works have been done in these and related fields and more remains to be carried out in order to exploit these devices for the wider applications
    corecore