An asynchronous java processor for smart card.

Yu Chun-Pong.Thesis (M.Phil.)--Chinese University of Hong Kong, 2003.Includes bibliographical references (leaves 60-61).Abstracts in English and Chinese.Abstract of this thesis entitled: --- p.i摘要 --- p.iiiAcknowledgements --- p.ivTable of contents --- p.vList of Tables --- p.viList of Figures --- p.viiChapter Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Asynchronous design --- p.1Chapter 1.2 --- Java processor for contactless smart card [3] --- p.2Chapter 1.3 --- Motivation --- p.3Chapter Chapter 2 --- Asynchronous circuit design techniques --- p.5Chapter 2.1 --- Overview --- p.5Chapter 2.2 --- Handshake protocol --- p.5Chapter 2.3 --- Asynchronous pipeline --- p.7Chapter 2.4 --- Asynchronous control elements --- p.9Chapter Chapter 3 --- Asynchronous Java Processor --- p.15Chapter 3.1 --- Instruction Set --- p.15Chapter 3.2 --- Architecture of the java processor --- p.17Chapter 3.3 --- Basic building blocks of the java processor --- p.22Chapter 3.4 --- Token flow --- p.32Chapter Chapter 4 --- Results and Discussion --- p.37Chapter 4.1 --- Simulation Results of test programs --- p.37Chapter 4.2 --- Experimental result --- p.41Chapter 4.3 --- Future work --- p.42Chapter Chapter 5 --- Conclusion --- p.45Appendix --- p.47Chip micrograph for the java processor core --- p.47Pin assignment of the java processor --- p.48Schematic of the java processor --- p.52Schematic of the decoder --- p.54Schematic of the Stage2 of the java processor --- p.55Schematic of the stack --- p.56Schematic of the block of the local variables --- p.57Schematic of the 16-bit self-timed adder --- p.58The schematic and the layout of the memory cell --- p.59Reference --- p.6

Circuiti asincroni: dai principi fondamentali all'implementazione

La maggioranza dei circuiti commercializzati al giorno d'oggi è di tipo sincrono. Negli ultimi anni però, questa tecnologia si è trovata a dover affrontare notevoli problemi legati al consumo di potenza e alle crescenti difficoltà di gestione del clock, in circuiti sempre più piccoli e densi. Per ovviare a queste problematiche, che richiedono soluzioni tecnicamente complesse e dispendiose, i costruttori stanno portando l'attenzione sull'approccio asincrono che, privo di clock, promette di ridurre i consumi e velocizzare i circuiti. La mancanza di esperienza, strumenti e motivazioni adeguate rende però molto difficile una migrazione totale da un paradigma all'altro. La tecnologia che sembra destinata a prendere piede in questo contesto è quindi l'approccio ibrido Globally Asynchronous, Locally Synchronous. Importanti produttori sono impegnati nella ricerca in questo settore, che è ancora in piena fase evolutiva. Il presente lavoro è diviso in due parti: nella prima offriremo un quadro generale sui fondamenti della tecnologia asincrona e, nella seconda, vedremo esempi di design che rappresentano l'attuale stato dell'arteope

MobiPADS: a reflective middleware for context-aware mobile computing

distributed computing services that essentially abstract the underlying network services to a monolithic “black box. ” In a mobile operating environment, the fundamental assumption of middleware abstracting a unified distributed service for all types of applications operating over a static network infrastructure is no longer valid. In particular, mobile applications are not able to leverage the benefits of adaptive computing to optimize its computation based on current contextual situations. In this paper, we introduce the Mobile Platform for Actively Deployable Service (MobiPADS) system. MobiPADS is designed to support context-aware processing by providing an executing platform to enable active service deployment and reconfiguration of the service composition in response to environments of varying contexts. Unlike most mobile middleware, MobiPADS supports dynamic adaptation at both the middleware and application layers to provide flexible configuration of resources to optimize the operations of mobile applications. Within the MobiPADS system, services (known as mobilets) are configured as chained service objects to provide augmented services to the underlying mobile applications so as to alleviate the adverse conditions of a wireless environment. Index Terms—Middleware, mobile applications, mobile computing support services, mobile environments.

Interpreted graph models

A model class called an Interpreted Graph Model (IGM) is defined. This class includes a large number of graph-based models that are used in asynchronous circuit design and other applications of concurrecy. The defining characteristic of this model class is an underlying static graph-like structure where behavioural semantics are attached using additional entities, such as tokens or node/arc states. The similarities in notation and expressive power allow a number of operations on these formalisms, such as visualisation, interactive simulation, serialisation, schematic entry and model conversion to be generalised. A software framework called Workcraft was developed to take advantage of these properties of IGMs. Workcraft provides an environment for rapid prototyping of graph-like models and related tools. It provides a large set of standardised functions that considerably facilitate the task of providing tool support for any IGM. The concept of Interpreted Graph Models is the result of research on methods of application of lower level models, such as Petri nets, as a back-end for simulation and verification of higher level models that are more easily manipulated. The goal is to achieve a high degree of automation of this process. In particular, a method for verification of speed-independence of asynchronous circuits is presented. Using this method, the circuit is specified as a gate netlist and its environment is specified as a Signal Transition Graph. The circuit is then automatically translated into a behaviourally equivalent Petri net model. This model is then composed with the specification of the environment. A number of important properties can be established on this compound model, such as the absence of deadlocks and hazards. If a trace is found that violates the required property, it is automatically interpreted in terms of switching of the gates in the original gate-level circuit specification and may be presented visually to the circuit designer. A similar technique is also used for the verification of a model called Static Data Flow Structure (SDFS). This high level model describes the behaviour of an asynchronous data path. SDFS is particularly interesting because it models complex behaviours such as preemption, early evaluation and speculation. Preemption is a technique which allows to destroy data objects in a computation pipeline if the result of computation is no longer needed, reducing the power consumption. Early evaluation allows a circuit to compute the output using a subset of its inputs and preempting the inputs which are not needed. In speculation, all conflicting branches of computation run concurrently without waiting for the selecting condition; once the selecting condition is computed the unneeded branches are preempted. The automated Petri net based verification technique is especially useful in this case because of the complex nature of these features. As a result of this work, a number of cases are presented where the concept of IGMs and the Workcraft tool were instrumental. These include the design of two different types of arbiter circuits, the design and debugging of the SDFS model, synthesis of asynchronous circuits from the Conditional Partial Order Graph model and the modification of the workflow of Balsa asynchronous circuit synthesis system.EThOS - Electronic Theses Online ServiceEPSRCGBUnited Kingdo

NASA Tech Briefs, February 2011

Topics covered include: Multi-Segment Radius Measurement Using an Absolute Distance Meter Through a Null Assembly; Fiber-Optic Magnetic-Field-Strength Measurement System for Lightning Detection; Photocatalytic Active Radiation Measurements and Use; Computer Generated Hologram System for Wavefront Measurement System Calibration; Non-Contact Thermal Properties Measurement with Low-Power Laser and IR Camera System; SpaceCube 2.0: An Advanced Hybrid Onboard Data Processor; CMOS Imager Has Better Cross-Talk and Full-Well Performance; High-Performance Wireless Telemetry; Telemetry-Based Ranging; JWST Wavefront Control Toolbox; Java Image I/O for VICAR, PDS, and ISIS; X-Band Acquisition Aid Software; Antimicrobial-Coated Granules for Disinfecting Water; Range 7 Scanner Integration with PaR Robot Scanning System; Methods of Antimicrobial Coating of Diverse Materials; High-Operating-Temperature Barrier Infrared Detector with Tailorable Cutoff Wavelength; A Model of Reduced Kinetics for Alkane Oxidation Using Constituents and Species for N-Heptane; Thermally Conductive Tape Based on Carbon Nanotube Arrays; Two Catalysts for Selective Oxidation of Contaminant Gases; Nanoscale Metal Oxide Semiconductors for Gas Sensing; Lightweight, Ultra-High-Temperature, CMC-Lined Carbon/Carbon Structures; Sample Acquisition and Handling System from a Remote Platform; Improved Rare-Earth Emitter Hollow Cathode; High-Temperature Smart Structures for Engine Noise Reduction and Performance Enhancement; Cryogenic Scan Mechanism for Fourier Transform Spectrometer; Piezoelectric Rotary Tube Motor; Thermoelectric Energy Conversion Technology for High-Altitude Airships; Combustor Computations for CO2-Neutral Aviation; Use of Dynamic Distortion to Predict and Alleviate Loss of Control; Cycle Time Reduction in Trapped Mercury Ion Atomic Frequency Standards; and A (201)Hg+ Comagnetometer for (199)Hg+ Trapped Ion Space Atomic Clocks

Measurements, Models, Systems and Design

531 s.

Design, Development, and Testing of Research Payloads on Various Suborbital Flight-Test Platforms

With recent advances in the commercial space industry, suborbital payload launches have become more common and accessible to researchers actively seeking solutions for problems involving prolonged space travel and future missions to Moon and Mars. Suborbital payload missions compared to orbital launches are less expensive and offer faster turnaround times; however, the novelty of this domain provides unique challenges. This multidisciplinary research effort aims to tackle some of these challenges by detailing the design, development, and testing techniques followed in the successful launch and recovery of payload experiments in currently active and upcoming suborbital launch vehicles. The research methodology involves collecting payload requirements, CAD design, computational analysis, mass optimization, 3D printing, vibration, and load testing, model rocketry development, simulation, and launch operations. Structural analysis using FEA and vibration testing on a shaker table shows the compliance of the payload prototypes in the maximum predicted flight environments. Multiphase CFD analysis is used as benchmarking technique to characterize the behavior of payloads containing liquids in microgravity. Hands-on model rocketry has proven as a valuable research platform for subsequent payload deliveries

Radio Communications

In the last decades the restless evolution of information and communication technologies (ICT) brought to a deep transformation of our habits. The growth of the Internet and the advances in hardware and software implementations modified our way to communicate and to share information. In this book, an overview of the major issues faced today by researchers in the field of radio communications is given through 35 high quality chapters written by specialists working in universities and research centers all over the world. Various aspects will be deeply discussed: channel modeling, beamforming, multiple antennas, cooperative networks, opportunistic scheduling, advanced admission control, handover management, systems performance assessment, routing issues in mobility conditions, localization, web security. Advanced techniques for the radio resource management will be discussed both in single and multiple radio technologies; either in infrastructure, mesh or ad hoc networks