Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Developing ultrasensitive and CMOS compatible ISFETs in the BEOL of industrial UTBB FDSOI transistors

Le marché des capteurs a récemment connu une croissance spectaculaire alimentée par l'application remarquable de capteurs dans l'électronique de consommation, l'industrie de l'automatisation, les appareils portables, le secteur automobile et l'internet des objets de plus en plus adopté. La technologie avancée des complementary metal oxide semiconductor (CMOS), les technologies de nano et de micro-fabrication et les plateformes de synthèse de matériaux innovantes sont également des moteurs du développement incroyable de l'industrie des capteurs. Ces progrès ont permis la réalisation de capteurs dotés de nombreuses caractéristiques telles que la précision accrue, les dimensions miniaturisées, l’intégrabilité, la production de masse, le coût très réduit et le temps de réponse rapide. Les ion-sensitive field-effect transistors (ISFETs) sont des capteurs à l'état solide (bio) chimiques, destinés à la détection des ions H+ (pH), Na+ et K+. Malgré cela, la commercialisation des ISFETs est encore à ses balbutiements, après près de cinq décennies de recherche et développement. Cela est dû principalement à la sensibilité limitée, à la controverse sur l'utilisation de l'électrode de référence pour le fonctionnement des ISFETs et à des problèmes de stabilité. Dans cette thèse, les ISFETs ultrasensibles et compatibles CMOS sont intégrés dans le BEOL des transistors UTBB FDSOI standard. Un circuit diviseur capacitif est utilisé pour polariser la grille d’avant afin d'assurer des performances stables du capteur. En exploitant la fonction d’amplification intrinsèque fournie par les transistors UTBB FDSOI, nous avons présenté des ISFET ultra sensibles. L'amplification découle du fort couplage électrostatique entre la grille avant et la grille arrière du FDSOI et des capacités asymétriques des deux grilles. Un changement de tension au niveau de la grille avant apparaît sur la grille arrière sous la forme d'un décalage amplifié de la tension. L'amplification, représentée par le facteur de couplage (γ), est égale au rapport de la capacité de l'oxyde de grille et de la capacité de le buried oxide (BOX). Par conséquent, en fonctionnalisant la détection du pH sur la grille avant pour les dispositifs FDSOI, la modification du potentiel de surface sur la grille avant est détectée par la grille arrière et amplifiée du facteur de couplage (γ), donnant lieu à un capteur chimique à l'état solide à sensibilité ultra-élevée. L'intégration de la fonctionnalité de détection a été réalisée en back end of line (BEOL), ce qui offre les avantages d'une fiabilité et d'une durée de vie accrues du capteur, d'une compatibilité avec le processus CMOS standard et d'une possibilité d'intégration d'un circuit diviseur capacitif. Le fonctionnement des MOSFETs, sans une polarisation appropriée de la grille avant, les rend vulnérables aux effets de grilles flottantes indésirables. Le circuit diviseur capacitif résout ce problème en polarisant la grille avant tout enmaintenant la fonctionnalité de détection sur la même grille par un couplage capacitif au métal commun du BEOL. Par conséquent, le potentiel au niveau du métal BEOL est une somme pondérée du potentiel de surface au niveau de la grille de détection et de la polarisation appliquée au niveau de la grille de contrôle. Le capteur proposé est modélisé et simulé à l'aide de TCAD-Sentaurus. Un modèle mathématique complet a été développé. Il fournit la réponse du capteur en fonction du pH de la solution (entrée du capteur) et des paramètres de conception du circuit diviseur capacitif et du transistor UTBB FDSOI. Dans ce cas, des résultats cohérents ont été obtenus des travaux de modélisation et de simulation, avec une sensibilité attendue de 780 mV / pH correspondant à un film de détection ayant une réponse de Nernst. La modélisation et la simulation du capteur proposé ont également été validées par une fabrication et une caractérisation du capteur de pH à grille étendue avec validation de son concept. Ces capteurs ont été développés par un traitement séparé du composant de détection de pH, qui est connecté électriquement au transistor uniquement lors de la caractérisation du capteur. Ceci permet une réalisation plus rapide et plus simple du capteur sans avoir besoin de masques et de motifs par lithographie. Les capteurs à grille étendue ont présenté une sensibilité de 475 mV/pH, ce qui est supérieur aux ISFET de faible puissance de l'état de l’art. Enfin, l’intégration de la fonctionnalité de détection directement dans le BEOL des dispositifs FDSOI UTBB a été poursuivie. Une sensibilité expérimentale de 730 mV/pH a été obtenue, ce qui confirme le modèle mathématique et la réponse simulée. Cette valeur est 12 fois supérieure à la limite de Nernst et supérieure aux capteurs de l'état de l’art. Les capteurs sont également évalués pour la stabilité, la résolution, l'hystérésis et la dérive dans lesquels d'excellentes performances sont démontrées. Une nouvelle architecture de détection du pH est également démontrée avec succès, dans laquelle la détection est fonctionnalisée au niveau de la diode de protection de la grille plutôt que de la grille avant des dispositifs UTBB FDSOI. La commutation de courant abrupte, aussi basse que 9 mV/decade, pourrait potentiellement augmenter la sensibilité de polarisation fixée à 6,6 decade/pH. Nous avons démontré expérimentalement une sensibilité de 1,25 decade/pH supérieure à la sensibilité reportée à l’état de l’art.Abstract: The sensor market has recently seen a dramatic growth fueled by the remarkable application of sensors in the consumer electronics, automation industry, wearable devices, the automotive sector, and in the increasingly adopted internet of things (IoT). The advanced complementary metal oxide semiconductor (CMOS) technology, the nano and micro fabrication technologies, and the innovative material synthesis platforms are also driving forces for the incredible development of the sensor industry. These technological advancements have enabled realization of sensors with characteristic features of increased accuracy, miniaturized dimension, integrability, volume production, highly reduced cost, and fast response time. Ion-sensitive field-effect transistors (ISFETs) are solid state (bio)chemical sensors, for pH (H+), Na+, K+ ion detection, that are equipped with the promise of the highly aspired features of CMOS devices. Despite this, the commercialization of ISFETs is still at the stage of infancy after nearly five decades of research and development. This is due mainly to the limited sensitivity, the controversy over the use of the reference electrode for ISFET operation, and because of stability issues. In this thesis, ultrasensitive and CMOS compatible ISFETs are integrated in the back end of line (BEOL) of standard UTBB FDSOI transistors. A capacitive divider circuit is employed for biasing the front gate for stable performance of the sensor. Exploiting the intrinsic amplification feature provided by UTBB FDSOI transistors, we demonstrated ultrahigh sensitive ISFETs. The amplification arises from the strong electrostatic coupling between the front gate and the back gate of the FDSOI, and the asymmetric capacitances of the two gates. A change in voltage at the front gate appears at the back gate as an amplified shift in voltage. The amplification, referred to as the coupling factor (γ), is equal to the ratio of the gate oxide capacitance and the buried oxide (BOX) capacitance. Therefore, functionalizing the pH sensing at the front gate of FDSOI devices, the change in surface potential at the front gate is detected at the back gate amplified by the coupling factor (γ), giving rise to an ultrahigh-sensitive solid state chemical sensor. Integration of the sensing functionality was made in the BEOL which gives the benefits of increased reliability and life time of the sensor, compatibility with the standard CMOS process, and possibility for embedding a capacitive divider circuit. Operation of the MOSFETs without a proper front gate bias makes them vulnerable for undesired floating body effects. The capacitive divider circuit addresses these issues by biasing the front gate simultaneously with the sensing functionality at the same gate through capacitive coupling to a common BEOL metal. Therefore, the potential at the BEOL metal would be a weighted sum of the surface potential at the sensing gate and the applied bias at the control gate. The proposed sensor is modeled and simulated using TCAD-Sentaurus. A complete mathematical model is developed which provides the output of the sensor as a function of the solution pH (input to the sensor), and the design parameters of the capacitive divider circuit and the UTBB FDSOI transistor. In that case, consistent results have been obtained from the modeling and simulation works, with an expected sensitivity of 780 mV/pH corresponding to a sensing film having Nernst response. The modeling and simulation of the proposed sensor was further validated by a proof of concept extended gate pH sensor fabrication and characterization. These sensors were developed by a separated processing of just the pH sensing component, which is electrically connected to the transistor only during characterization of the sensor. This provides faster and simpler realization of the sensor without the need for masks and patterning by lithography. The extended gate sensors showed 475 mV/pH sensitivity which is superior to state of the art low power ISFETs. Finally, integration of the sensing functionality directly in the BEOL of the UTBB FDSOI devices was pursued. An experimental sensitivity of 730 mV/pH is obtained which is consistent with the mathematical model and the simulated response. This is more than 12-times higher than the Nernst limit, and superior to state of the art sensors. Sensors are also evaluated for stability, resolution, hysteresis, and drift in which excellent performances are demonstrated. A novel pH sensing architecture is also successfully demonstrated in which the detection is functionalized at the gate protection diode rather than the front gate of UTBB FDSOI devices. The abrupt current switching, as low as 9 mV/decade, has the potential to increase the fixed bias sensitivity to 6.6 decade/pH. We experimentally demonstrated a sensitivity of 1.25 decade/pH which is superior to the state of the art sensitivity

높은 전류 구동능력을 가지는 SiGe 나노시트 구조의 터널링 전계효과 트랜지스터

학위논문 (박사) -- 서울대학교 대학원 : 공과대학 전기·정보공학부, 2021. 2. 박병국.The development of very-large-scale integration (VLSI) technology has continuously demanded smaller devices to achieve high integration density for faster computing speed or higher capacity. However, in the recent complementary-metal-oxide-semiconductor (CMOS) technology, simple downsizing the dimension of metal-oxide-semiconductor field-effect transistor (MOSFET) no longer guarantees the boosting performance of IC chips. In particular, static power consumption is not reduced while device size is decreasing because voltage scaling is slowed down at some point. The increased off-current due to short-channel effect (SCE) of MOSFET is a representative cause of the difficulty in voltage scaling. To overcome these fundamental limits of MOSFET, many researchers have been looking for the next generation of FET device over the last ten years. Tunnel field-effect transistor (TFET) has been intensively studied for its steep switching characteristics. Nevertheless, the poor current drivability of TFET is the most serious obstacle to become competitive device for MOSFET. In this thesis, TFET with high current drivability in which above-mentioned problem is significantly solved is proposed. Vertically-stacked SiGe nanosheet channels are used to boost carrier injection and gate control. The fabrication technique to form highly-condensed SiGe nanosheets is introduced. TFET is fabricated with MOSFET with the same structure in the CMOS-compatible process. Both technology-computer-aided-design (TCAD) simulation and experimental results are utilized to support and examine the advantages of proposed TFET. From the perspective of the single device, the improvement in switching characteristics and current drivability are quantitatively and qualitatively analyzed. In addition, the device performance is compared to the benchmark of previously reported TFET and co-fabricated MOSFET. Through those processes, the feasibility of SiGe nanosheet TFET is verified. It is revealed that the proposed SiGe nanosheet TFET has notable steeper switching and low leakage in the low drive voltage as an alternative to conventional MOSFET.초고밀도 집적회로 기술의 발전은 고집적도 달성을 통해 단위 칩의 연산 속도 및 용량 향상에 기여할 소형의 소자를 끊임없이 요구하고 있다. 하지만 최신의 상보형 금속-산화막-반도체 (CMOS) 기술에서 금속-산화막-반도체 전계 효과 트랜지스터 (MOSFET) 의 단순한 소형화는 더 이상 집적회로의 성능 향상을 보장해 주지 못하고 있다. 특히 소자의 크기가 줄어드는 반면 정적 전력 소모량은 전압 스케일링의 둔화로 인해 감소되지 않고 있는 상황이다. MOSFET의 짧은 채널 효과로 인해 증가된 누설 전류가 전압 스케일링의 어려움을 주는 대표적 원인으로 꼽힌다. 이러한 근본적인 MOSFET의 한계를 극복하기 위하여 지난 10여년간 새로운 단계의 전계 효과 트랜지스터 소자들이 연구되고 있다. 그 중 터널 전계 효과 트랜지스터(TFET)은 그 특유의 우수한 전원 특성으로 각광받아 집중적으로 연구되고 있다. 많은 연구에도 불구하고, TFET의 부족한 전류 구동 능력은 MOSFET의 대체재로 자리매김하는 데 가장 큰 문제점이 되고 있다. 본 학위논문에서는 상기된 문제점을 해결할 수 있는 우수한 전류 구동 능력을 가진 TFET이 제안되었다. 반송자 유입과 게이트 컨트롤을 향상시킬 수 있는 수직 적층된 실리콘저마늄(SiGe) 나노시트 채널이 사용되었다. 또한, 제안된 TFET은 CMOS 기반 공정을 활용하여 MOSFET과 함께 제작되었다. 테크놀로지 컴퓨터 지원 설계(TCAD) 시뮬레이션과 실제 측정 결과를 활용하여 제안된 소자의 우수성을 검증하였다. 단위 CMOS 소자의 관점에서, 전원 특성과 전류 구동 능력의 향상을 정량적, 정성적 방법으로 분석하였다. 그리고, 제작된 소자의 성능을 기존 제작 및 보고된 TFET 및 함께 제작된 MOSSFET과 비교하였다. 이러한 과정을 통해, 실리콘저마늄 나노시트 TFET의 활용 가능성이 입증되었다. 제안된 실리콘저마늄 나노시트 소자는 주목할 만한 전원 특성을 가졌고 저전압 구동 환경에서 한층 더 낮은 누설 전류를 가짐으로써 향후 MOSFET을 대체할만한 충분한 가능성을 보여주었다.Chapter 1 Introduction 1 1.1. Power Crisis of Conventional CMOS Technology 1 1.2. Tunnel Field-Effect Transistor (TFET) 6 1.3. Feasibility and Challenges of TFET 9 1.4. Scope of Thesis 11 Chapter 2 Device Characterization 13 2.1. SiGe Nanosheet TFET 13 2.2. Device Concept 15 2.3. Calibration Procedure for TCAD simulation 17 2.4. Device Verification with TCAD simulation 21 Chapter 3 Device Fabrication 31 3.1. Fabrication Process Flow 31 3.2. Key Processes for SiGe Nanosheet TFET 33 3.2.1. Key Process 1 : SiGe Nanosheet Formation 34 3.2.2. Key Process 2 : Source/Drain Implantation 41 3.2.3. Key Process 3 : High-κ/Metal gate Formation 43 Chapter 4 Results and Discussion 53 4.1. Measurement Results 53 4.2. Analysis of Device Characteristics 56 4.2.1. Improved Factors to Performance in SiGe Nanosheet TFET 56 4.2.2. Performance Comparison with SiGe Nanosheet MOSFET 62 4.3. Performance Evaluation through Benchmarks 64 4.4. Optimization Plan for SiGe nanosheet TFET 66 4.4.1. Improvement of Quality of Gate Dielectric 66 4.4.2. Optimization of Doping Junction at Source 67 Chapter 5 Conclusion 71 Bibliography 73 Abstract in Korean 81 List of Publications 83Docto

Biosensors and CMOS Interface Circuits

abstract: Analysing and measuring of biological or biochemical processes are of utmost importance for medical, biological and biotechnological applications. Point of care diagnostic system, composing of biosensors, have promising applications for providing cheap, accurate and portable diagnosis. Owing to these expanding medical applications and advances made by semiconductor industry biosensors have seen a tremendous growth in the past few decades. Also emergence of microfluidics and non-invasive biosensing applications are other marker propellers. Analyzing biological signals using transducers is difficult due to the challenges in interfacing an electronic system to the biological environment. Detection limit, detection time, dynamic range, specificity to the analyte, sensitivity and reliability of these devices are some of the challenges in developing and integrating these devices. Significant amount of research in the field of biosensors has been focused on improving the design, fabrication process and their integration with microfluidics to address these challenges. This work presents new techniques, design and systems to improve the interface between the electronic system and the biological environment. This dissertation uses CMOS circuit design to improve the reliability of these devices. Also this work addresses the challenges in designing the electronic system used for processing the output of the transducer, which converts biological signal into electronic signal.Dissertation/ThesisM.S. Electrical Engineering 201

Journal of Telecommunications and Information Technology, 2007, nr 3

kwartalni

Silicon on Isolator Ribbon Field-Effect Nanotransistors for High-Sensitivity Low-Power Biosensors

Silicon field-effect transistors (FETs) are an established technology for sensing applications. Recent advancements and the use of high-performance multigate FETs in computing technology raise new opportunities and questions about the most suitable device sensing architecture. In this work, we propose pH sensors exploiting ribbon (tri-date) FETs fabricated on investigated silicon nanowires and silicon-on-insulator substrates by a fully CMOS compatible approach. The FET characteristics were optimized using 3D modeling performed by the TCAD computer-aided design software package, depending on the topological parameters of the transistor and the level of control voltage. N-channel fully depleted ribbon FETs with critical dimensions in the order of 30 nm and SiO2 as a subgate insulator were developed and characterized. It was established that thin structures with a width of slightly than more 100 nm, a thickness of 40 nm, and a reduced doping level have high sensitivity and low energy consumption. They showed excellent electrical properties, subthreshold swing (SS) was about 90 mV/dec, and the on-to-off current ratio, Ion/Ioff, was about 105. The same architecture was tested as a highly sensitive, stable and reproducible pH sensor. The average internal sensitivity, S, was equal 34 mV/pH or 360 nA/pH. Sensitivity to pH, estimated in terms of relative changes in the threshold voltage, was 74%, and the maximum drain current was 40%. The maximum drain current of 85 μA at V ds = 1.0 V suggests successful low-power operation of the proposed device

Silicon on Isolator Ribbon Field-Effect Nanotransistors for High-Sensitivity Low-Power Biosensors

Silicon field-effect transistors (FETs) are an established technology for sensing applications. Recent advancements and the use of high-performance multigate FETs in computing technology raise new opportunities and questions about the most suitable device sensing architecture. In this work, we propose pH sensors exploiting ribbon (tri-date) FETs fabricated on investigated silicon nanowires and silicon-on-insulator substrates by a fully CMOS compatible approach. The FET characteristics were optimized using 3D modeling performed by the TCAD computer-aided design software package, depending on the topological parameters of the transistor and the level of control voltage. N-channel fully depleted ribbon FETs with critical dimensions in the order of 30 nm and SiO2 as a subgate insulator were developed and characterized. It was established that thin structures with a width of slightly than more 100 nm, a thickness of 40 nm, and a reduced doping level have high sensitivity and low energy consumption. They showed excellent electrical properties, subthreshold swing (SS) was about 90 mV/dec, and the on-to-off current ratio, Ion/Ioff, was about 105. The same architecture was tested as a highly sensitive, stable and reproducible pH sensor. The average internal sensitivity, S, was equal 34 mV/pH or 360 nA/pH. Sensitivity to pH, estimated in terms of relative changes in the threshold voltage, was 74%, and the maximum drain current was 40%. The maximum drain current of 85 μA at V ds = 1.0 V suggests successful low-power operation of the proposed device

Modeling And Simulation Of Single And Double Gates Ion Sensitive Field Effect Transistor For Biomedical Applications

The modeling of Ion Sensitive Field Effect Transistor (ISFET) generally starts with its analogy to MOS devices and its threshold dependence on pH. Massobrio et al. proposed a macro-model plug in for SPICE. It was later modified to fit general SPICE based simulators without the need for a plug-in software. Then, different works followed the first modeling and simulation of ISFET by using widely available commercial CAD simulations. Unfortunately, the commercial TCAD is not supplied with model, material, and electrochemical packages to effectively manage the ISFET process and its operations. The main objective of this research is a comprehensive, accurate modeling and simulation of SG and DG ISFET devices. First, the adaptation of the Gouy-Chapman-Stern model mathematically and using TCAD to compensate for the roll-off non-ideality have been proposed. Performance analysis of conventional ISFET for six high-k materials as a Stern layer sensing membrane was also implemented. Moreover, a design and characterization of double-gate (DG) ISFET for SiO2 and Six high-k sensing membrane toward beyond Nernst limit sensitivity was done. Finally, a model for the geometrical parameter's impact on DG ISFET sensitivity was proposed. To achieve these objectives, the parameters of the silicon semiconductor material (that is, energy bandgap, permittivity, affinity, and density of states) are reconstructed in the electrolyte solution utilizing user-defined statement offered by Silvaco ATLAS. The electrostatic solution of the electrolyte area can also be investigated by constructing a numerical solution for the semiconductor equation in this area. The devices were virtually fabricated using ATHENA module of TCAD software. The materials used as a sensing membrane in devices were normal silicon dioxide (SiO2) and six high-k material (TiO2, Ta2O5, ZrO2, Al2O3, HfO2, and Si3N4). Then, the developed TCAD is used with the design of experiments (DOE) to investigate the effect of geometrical parameters on the performance of DG ISFETs and enhance the classical model. Three and five geometrical parameters, namely, buried oxide, silicon body, top oxide, channel length, and electrolyte thickness, are considered as independent factors in the DOE. Validation results revealed that the developed TCAD model has an acceptable agreement with experimental results and theoretical models in SG and DG ISFET in terms of sensitivity and ideal amplification ratio. On the other hand, silicon body thickness does not only affect the sensitivity toward the ultra-thin body but also can achieve an ultra-thin-body-buried oxide (Box). Channel length and electrolyte thickness as new investigated parameters also showed a clear impact on ISFET sensing properties. Furthermore, the developed TCAD and RSM mathematical models agreed with real experimental results in terms of average sensitivity and amplification ratio. The final design that depends on the control model resulted in a sensitivity ~1250 mV/pH that is ~21 times higher than the Nernst limit. To sum up, this study can open new directions for further analysis and optimization. Besides, the small sensing area and the FDSOI ISFET-based technology of the device can make the sensors ideal for the biomedical and IoT devices market

Multi-Wire Tri-Gate Silicon Nanowires Reaching Milli-pH Unit Resolution in One Micron Square Footprint

The signal-to-noise ratio of planar ISFET pH sensors deteriorates when reducing the area occupied by the device, thus hampering the scalability of on-chip analytical systems which detect the DNA polymerase through pH measurements. Top-down nano-sized tri-gate transistors, such as silicon nanowires, are designed for high performance solid-state circuits thanks to their superior properties of voltage-to-current transduction, which can be advantageously exploited for pH sensing. A systematic study is carried out on rectangular-shaped nanowires developed in a complementary metal-oxide-semiconductor (CMOS)-compatible technology, showing that reducing the width of the devices below a few hundreds of nanometers leads to higher charge sensitivity. Moreover, devices composed of several wires in parallel further increase the exposed surface per unit footprint area, thus maximizing the signal-to-noise ratio. This technology allows a sub milli-pH unit resolution with a sensor footprint of about 1 \ub5m2, exceeding the performance of previously reported studies on silicon nanowires by two orders of magnitude