Co-design of a controller and its digital implementation: the MOBY-DIC2 toolbox for embedded model predictive control

Several software tools are available in the literature for the design and embedded implementation of linear model predictive control (MPC), both in its implicit and explicit (either exact or approximate) forms. Most of them generate C code for easy implementation on a microcontroller, and the others can convert the C code into hardware description language code for implementation on a field programmable gate array (FPGA). However, a unified tool allowing one to generate efficient embedded MPC for an FPGA, starting from the definition of the plant and its constraints, was still missing. The MOBY-DIC2 toolbox described in this brief bridges this gap. To illustrate its functionalities, the tool is exploited to embed the controller and observer for a real buck power converter in an FPGA. This implementation achieves a latency of about 30 µs with the implicit controller and 240 μs with the approximate explicit controller

Hybrid photonic integrated circuits for neuromorphic computing [Invited]

The burgeoning of artificial intelligence has brought great convenience to people’s lives as large-scale computational models have emerged. Artificial intelligence-related applications, such as autonomous driving, medical diagnosis, and speech recognition, have experienced remarkable progress in recent years; however, such systems require vast amounts of data for accurate inference and reliable performance, presenting challenges in both speed and power consumption. Neuromorphic computing based on photonic integrated circuits (PICs) is currently a subject of interest to achieve high-speed, energy-efficient, and low-latency data processing to alleviate some of these challenges. Herein, we present an overview of the current photonic platforms available, the materials which have the potential to be integrated with PICs to achieve further performance, and recent progress in hybrid devices for neuromorphic computing

Design of terahertz transceiver schemes for ultrahigh-speed wireless communications

Future ultra-high-speed wireless communication systems face difficult challenges due to the fundamental limitations of current technologies operating at microwave frequencies. Supporting high transmission rates will require the use of more spectral resources that are only available at higher frequencies. Within this context, terahertz (THz) communications have been attracting more and more attention, being considered by the research community as one of the most promising research fields on the topic due to the availability of extensive unused bandwidth segments. However, its widespread use is not yet possible due to some obstacles, such as the high propagation losses that occur in this band and the difficulty in designing devices that can effectively perform both transmission and detection tasks. The purpose of this dissertation is to contribute for the solution of both of the aforementioned problems and to propose novel THz transceiver schemes for ultra-high-speed wireless communications. Three main research areas were addressed: device modelling for the THz; index modulation (IM) based schemes for Beyond 5G (B5G) networks and hybrid precoding designs for THz ultra massive (UM) – multiple input multiple output (MIMO) systems. The main contributions of this work include the creation of a new design for a reconfigurable THz filter; the proposal of a precoded generalized spatial modulation scheme for downlink MIMO transmissions in B5G networks; the creation of a low-complexity hybrid design algorithm with a near fully-digital performance for multiuser (MU) mmWave/THz ultra massive MIMO systems that can incorporate different analog architectures; and the system-level assessment of cloud radio access network (C-RAN) deployments based on low-complexity hybrid precoding designs for massive MIMO downlink transmissions in B5G networks. The first contribution is especially suited for the implementation of reconfigurable THz filters and optical modulators, since it is based on a simple design, which transits from situations in which it presents a full transparency to situations where it achieves full opacity. Moreover, this approach can also be used for the implementation of simultaneously transmitting and reflecting (STAR) reconfigurable intelligent surfaces (RIS) which are important for enabling flexible system designs in RIS-assisted networks. The second contribution showed that the implementation of precoding schemes based on generalised spatial modulations is a solution with a considerable potential for future B5G systems, since it can provide larger throughputs when compared to conventional MU-MIMO schemes with identical spectral efficiencies.The last two contributions showed that through the proposed hybrid design algorithm it becomes possible to replace a fully digital precoder/combiner by a fully-connected or even by a partially-connected architecture (array of subarrays and dynamic array of subarrays), while achieving good tradeoffs between spectral efficiency, power consumption and implementation complexity. These proposals are particularly relevant for the support of UM-MIMO in severely hardware constrained THz systems. Moreover, the capability of achieving significant improvements in terms of throughput performance and coverage over typical cellular networks, when considering hybrid precoding‐based C-RAN deployments in two indoor office scenarios at the THz band, was demonstrated.Os futuros sistemas de comunicação sem fios de velocidade ultra-elevada enfrentam desafios difíceis devido às limitações fundamentais das tecnologias atuais que funcionam a frequências de microondas. O suporte de taxas de transmissão altas exigirá a utilização de mais recursos espectrais que só estão disponíveis em frequências mais elevadas. A banda Terahertz (THz) é uma das soluções mais promissoras devido às suas enormes larguras de banda disponíveis no espectro eletromagnético. No entanto, a sua utilização generalizada ainda não é possível devido a alguns obstáculos, tais como as elevadas perdas de propagação que se verificam nesta banda e a dificuldade em conceber dispositivos que possam desempenhar eficazmente as tarefas de transmissão e deteção. O objetivo desta tese de doutoramento, é contribuir para ambos os problemas mencionados anteriormente e propor novos esquemas de transcetores THz para comunicações sem fios de velocidade ultra-elevada. Três grandes áreas de investigação foram endereçadas, contribuindo individualmente para um todo: a modelação do dispositivo para o THz; esquemas baseados em modulações de índice (IM) para redes pós-5G (B5G) e desenhos de pré-codificadores híbridos para sistemas THz MIMO ultra-massivos. As principais contribuições deste trabalho incluem a criação de um novo design para um filtro THz reconfigurável; a proposta de uma nova tipologia de modulação espacial generalizada pré-codificada para transmissões MIMO de ligação descendente para redes B5G; a criação de um algoritmo de design híbrido de baixa complexidade com desempenho quase totalmente digital para sistemas MIMO multi-utilizador (MU) mmWave/THz ultra massivos que podem incorporar diferentes arquiteturas analógicas e a avaliação das implementações da rede de acesso de rádio na nuvem (C-RAN) com base em designs de pré-codificação híbridos de baixa complexidade para transmissões MIMO de ligação descendente massivas em redes B5G. A primeira contribuição é especialmente adequada para a implementação de filtros THz reconfiguráveis e moduladores óticos, uma vez que se baseia numa concepção mais simples, que transita de situações em que apresenta uma transparência total para situações em que atinge uma opacidade total. Para além disso, esta abordagem também pode ser utilizada para a implementação de superfícies inteligentes reconfiguráveis (RIS) de transmissão e reflexão simultânea (STAR). A segunda contribuição mostrou que a implementação de esquemas de pré-codificação baseados em modulações espaciais generalizadas é uma solução com um potencial considerável para futuros sistemas B5G, uma vez que permite alcançar maiores ganhos em termos de débito binário quando comparado com esquemas convencionais MU-MIMO com eficiências espectrais idênticas. As duas últimas contribuições mostraram que através do algoritmo proposto torna-se possível substituir a utilização de uma arquitectura totalmente digital por uma arquitetura totalmente conectada ou mesmo por uma arquitetura parcialmente conectada (arrays de subarrays e arrays dinâmicos de subarrays), conseguindo-se bons tradeoffs entre eficiência espectral, consumo de energia e complexidade de implementação. Estas propostas são particularmente relevantes para dar suporte a sistemas THz UM-MIMO com restrições severas ao nível de hardware. Demonstrou-se também a capacidade de se alcançar melhorias significativas em termos de débito binário e cobertura em relação a redes celulares típicas, considerando dois cenários na banda THz

Non-volatile heterogeneous III-V/Si photonics via optical charge-trap memory

We demonstrate, for the first time, non-volatile charge-trap flash memory (CTM) co-located with heterogeneous III-V/Si photonics. The wafer-bonded III-V/Si CTM cell facilitates non-volatile optical functionality for a variety of devices such as Mach-Zehnder Interferometers (MZIs), asymmetric MZI lattice filters, and ring resonator filters. The MZI CTM exhibits full write/erase operation (100 cycles with 500 states) with wavelength shifts of $\Delta\lambda_{non-volatile} = 1.16 nm$ ($\Delta n_{eff,non-volatile} ~ 2.5 \times 10^{-4}$) and a dynamic power consumption $<$ 20 pW (limited by measurement). Multi-bit write operation (2 bits) is also demonstrated and verified over a time duration of 24 hours and most likely beyond. The cascaded 2nd order ring resonator CTM filter exhibited an improved ER of ~ 7.11 dB compared to the MZI and wavelength shifts of $\Delta\lambda_{non-volatile} = 0.041 nm$ ($\Delta n_{eff, non-volatile} = 1.5 \times 10^{-4}$) with similar pW-level dynamic power consumption as the MZI CTM. The ability to co-locate photonic computing elements and non-volatile memory provides an attractive path towards eliminating the von-Neumann bottleneck

전자 장치 내 국부적 전계 향상을 위한 나노 구조체

학위논문(박사) -- 서울대학교대학원 : 공과대학 화학생물공학부, 2021.8. 조재영.The goal of this dissertation is to investigate effect of nanostructures for local electric field enhancement in electronic devices and to provide experimental and theoretical bases for their practical use. Resistive random access memory (RRAM) is a data storage device that can be modulated its resistance states by external electrical stimuli. The electric field generated by the applied potential difference between the two electrodes acts as the driving force to switch the resistance states, so controlling the electric field within the device can lead to improved operational performance and reliability of the device. Even though considerable progress has been made through significant efforts to control the electric field within the device, selectively enhancing the electric field in the intended position for stable and uniform resistive switching behavior is still challenging. Engineered metal structures in the RRAM can efficiently manipulate the electric field. As the radius of the metal structures decreases, the charge density increases, generating electric field enhancements in confined region. To minimize the radius of the metal structure and thus to greatly increase the electric field in a local area, we introduced a nanoscale metal structure into the RRAM. First, pyramid-structured metal electrode with a sharp tip was used to achieve a tip-enhanced electric field, and the effect of the enhanced electric field on the resistive switching behaviors of the device was investigated. Based on numerical simulation and experimental results, we confirmed that pyramidal electrode with a tip radius of tens of nanometers can selectively enhance the electric field at the tip. The tip-enhanced electric field can facilitate the thermochemical reaction in transition metal oxide-based RRAMs and efficiency of charge injection and transport in organic-based RRAMs, as well as provide position selectivity during formation of conductive filament. The resulting RRAM exhibited reliable resistive switching behavior and highly improved device performance compared with conventional RRAM with planar electrode. As another approach to enhance the electric field within the resistive switching layer, we prepared spherical nanostructures via self-assembled block copolymer (BCP)/metal compound micelles. BCP and metal precursors were dissolved in aqueous media for use as BCP/metal compound micelles. These micelles were used as complementary resistive switch (CRS) layers of the memory device and the mechanism of CRS behavior was investigated. The spherical metal nanostructures can improve the electric fields, promoting a resistive switching mechanism based on electrochemical metallization. The resulting CRS memory exhibited reliable resistive switching behavior with four distinct threshold voltages in both cycle-to-cycle and cell-to-cell tests. Also, the conduction and resistive switching mechanism are experimentally demonstrated through the the analysis of the current–voltage data plot and detemination of the temperature coefficient of resistance. Overall, we pursued efficient engineering of metal nanostructures capable of manipulating electric fields for improving the operational performance and reliability of memory devices. There is no doubt that the commercialized RRAM will become popular in the near future after overcoming all the challenges of RRAM through continuous interest and research. We believe that these results will not only contribute to the significant advancement of all electronic devices, including RRAM, but will also help promote research activities in the electronic device field.본 논문의 목적은 나노 구조체를 통한 전자 장치 내 국부적 전계 향상 효과를 조사하고, 이의 실제 사용을 위한 실험 및 이론적 기반을 제공하는 것이다. 저항변화메모리 (resistive random access memory) 는 외부 전기 자극에 의해 저항 상태를 변화 시킬 수 있는 데이터 저장 장치이다. 두 전극 사이에 인가된 전위차에 의해 생성된 전기장은 저항 상태를 전환시키는 구동력으로써 작용하므로, 전자 장치 내에서 전기장을 제어하면 장치의 성능과 신뢰성을 향상시킬 수 있다. 장치 내에서 전기장을 제어하려는 많은 노력을 통해 상당한 진전이 있었지만, 안정적이고 균일한 저항 변화 거동을 위해 의도된 위치에서 전기장을 선택적으로 향상시키는 일은 아직 도전적 과제이다. 구조화된 금속을 저항변화메모리에 접목시킴으로써 전기장을 효율적으로 조작할 수 있다. 금속 구조체의 반경이 감소함에 따라 전하 밀도가 증가하여 국부적 영역에서 전기장이 향상된다. 이 논문에서는 금속 구조체의 반경을 최소화하여 국부적으로 전기장을 크게 향상시키기 위해 저항변화메모리에 나노스케일의 금속 구조체를 도입하였다. 첫 번째로, 팁 강화 (tip-enhanced) 전기장 효과를 달성하기 위해 날카로운 팁을 가지는 피라미드 금속 구조체를 전극으로 사용하였으며, 강화된 전기장이 소자의 저항 변화 거동에 미치는 영향을 조사하였다. 유한요소모델링과 실험결과를 바탕으로, 수십 나노 미터의 팁 반경을 가지는 피라미드 구조체 전극이 팁 부근에서 전기장을 국소적으로 향상시킬 수 있음을 확인하였다. 팁 강화 전기장은 전이 금속 산화물-기반 저항변화메모리에서 열화학 (thermochemical) 반응을 촉진시키고 유기-기반 저항변화메모리에서 전하 주입 (charge injection) 및 수송 (transport) 효율성을 향상시킬 뿐 아니라, 선택적인 위치에서만 전도성 필라멘트 (conductive filament)를 형성시킬 수 있었다. 그 결과 피라미드 구조체 저항변화메모리는 종래의 평판 구조체 저항변화메모리에 비해 안정적인 저항 변화 거동과 향상된 장치 성능을 보여주었다. 저항 변화 층 내의 전기장을 향상시키기 위한 또 다른 접근법으로, 자기조립 (self-assembled)된 블록공중합체 (block copolymer)/금속 복합체 미셀 (micelle)을 이용하여 구형의 나노구조체를 소자의 중간층으로 도입하였다. 블록공중합체 및 금속전구체를 복합체 미셀로 사용하기 위해 선택적 용매에 용해시켰다. 해당 미셀을 메모리 소자의 상보적 저항 변화 (complementary resistive switch) 층으로 사용하였으며, 상보적 저항 변화 거동의 메커니즘을 조사하였다. 구형의 금속 나노구조체는 전기장을 향상시켜 전기화학적 금속화 (electrochemical metallization)에 기반한 저항 변화 메커니즘을 촉진시킬 수 있었다. 그 결과 상보적 저항 변화 메모리는 사이클 및 셀간 반복 시험 모두에서 4개의 임계 전압으로 안정적인 저항 변화 동작을 나타내었다. 또한 전류-전압 자료 플롯 (plot) 분석과 저항의 온도 계수 결정을 통해 장치의 전도 및 저항 변화 메커니즘을 실험적으로 입증하였다. 전반적으로 본 논문에서는 장치 내 전기장을 증폭시킬 수 있는 금속 나노구조체의 효율적인 엔지니어링을 통해 메모리 장치의 성능과 신뢰성 향상을 추구하였다. 지속적인 관심과 연구를 통해 저항변화메모리의 모든 과제를 극복한 후, 상용화된 저항변화메모리가 가까운 미래에 대중화될 것임을 믿어 의심치 않는다. 우리는 이 결과가 저항변화메모리를 포함한 모든 전자 장치의 획기적인 발전에 기여할 뿐만 아니라 전자 장치 분야의 연구 활동을 촉진하는 데에도 도움이 될 것이라고 믿는다.Chapter 1. Introduction 1 1.1. Background 1 1.1.1. Necessity of new memory devices 1 1.1.2. Resistive random access memory 2 1.2. Motivation 4 1.3. Dissertation Overview 6 1.4. References 9 Chapter 2. Tip-Enhanced Electric Field-Driven Efficient Charge Injection and Transport in Organic Material-Based Resistive Memories 19 2.1. Introduction 21 2.2. Experimental 24 2.3. Results and Discussion 27 2.4. Conclusions 37 2.5. References 38 Chapter 3. Facilitation of the Thermochemical Mechanism in NiO-Based Resistive Switching Memories via Tip-Enhanced Electric Fields 52 3.1. Introduction 54 3.2. Experimental 57 3.3. Results and Discussion 60 3.4. Conclusions 66 3.5. References 67 Chapter 4. Facile Achievement of Complementary Resistive Switching Behaviors via Self-Assembled Block Copolymer Micelles 82 4.1. Introduction 83 4.2. Experimental 86 4.3. Results and Discussion 89 4.4. Conclusions 96 4.5. References 97 Chapter 5. Conclusion 109 Abstract in Korean 112박

APPLICATIONS OF DUAL-SEED OPTICAL COMB SOURCES IN TELECOMMUNICATIONS AND SIGNAL PROCESSING

With the continuing demand for high-speed and efficient operation or transmission, photonic approaches to signal processing systems and communication networks become indispensable due to the high bandwidth capacities. Particularly, by utilizing various nonlinear optical effects, it is possible to achieve a wide variety of bandwidth-demanding applications with minimal system resources. A device based on nonlinear optical processes can simultaneously provide a multitude of channels, greatly removing the unnecessary parallel processing units and thus reducing the complexity of system designs. In this regard, dual-seed optical comb sources based on parametric mixing have been of great interest since this apparatus efficiently enhance the scalability of a system. The dual-seed optical comb sources can be applied to diverse areas in telecommunications and signal processing. In this study, two primary target applications which involve the optical comb sources include wavelength multicasting and analog-to-digital conversion, respectively. Wavelength multicasting, an essential functionality in optical communication networks, can accomplish simultaneous delivery of a high-rate data stream from one single routing node to a group of destinations at different assigned wavelengths. Moreover, the parallelism supported by wavelength multicasting greatly benefits various high-speed optical signal processing systems. The other application investigated here is the analog-to-digital conversion which becomes necessitated due to the rapid progress in digital signal processing technology. Notably, in comparison with conventional electronic counterparts, photonic analog-to-digital converters have the advantages of broad bandwidth, low timing jitter and high sampling rate. The first part of this work is focused on the study of dual-seed optical comb sources. The bandwidth of the comb spectrum is increased by means of a longitudinally varying strain plan along the optical fiber. In the second part, a wavelength multicasting scheme based on the optical comb source is investigated. Importantly, the modulation format transparency provided by our proposed scheme is experimentally demonstrated. Lastly, a photonic approach to analog-to-digital conversion is achieved with the aid of a dual-seed optical comb source. The folding transfer functions for optical quantization are efficiently created due to the generation of phase harmonics through parametric processes associated with the optical comb source

The 1992 4th NASA SERC Symposium on VLSI Design

Papers from the fourth annual NASA Symposium on VLSI Design, co-sponsored by the IEEE, are presented. Each year this symposium is organized by the NASA Space Engineering Research Center (SERC) at the University of Idaho and is held in conjunction with a quarterly meeting of the NASA Data System Technology Working Group (DSTWG). One task of the DSTWG is to develop new electronic technologies that will meet next generation electronic data system needs. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The NASA SERC is proud to offer, at its fourth symposium on VLSI design, presentations by an outstanding set of individuals from national laboratories, the electronics industry, and universities. These speakers share insights into next generation advances that will serve as a basis for future VLSI design

Review on data-centric brain-inspired computing paradigms exploiting emerging memory devices

Biologically-inspired neuromorphic computing paradigms are computational platforms that imitate synaptic and neuronal activities in the human brain to process big data flows in an efficient and cognitive manner. In the past decades, neuromorphic computing has been widely investigated in various application fields such as language translation, image recognition, modeling of phase, and speech recognition, especially in neural networks (NNs) by utilizing emerging nanotechnologies; due to their inherent miniaturization with low power cost, they can alleviate the technical barriers of neuromorphic computing by exploiting traditional silicon technology in practical applications. In this work, we review recent advances in the development of brain-inspired computing (BIC) systems with respect to the perspective of a system designer, from the device technology level and circuit level up to the architecture and system levels. In particular, we sort out the NN architecture determined by the data structures centered on big data flows in application scenarios. Finally, the interactions between the system level with the architecture level and circuit/device level are discussed. Consequently, this review can serve the future development and opportunities of the BIC system design