Clock-Feedthrough Compensation in MOS Sample-and-Hold Circuits

All MOS sample-and-hold circuits suffer to a greater or lesser extent from clock-feedthrough (CLFT), also called charge-injection. During the transition from sample to hold mode, charge is transferred from an MOS transistor switch onto the hold capacitor, thus the name charge-injection. This error can lead to considerable voltage change across the capacitor, and predicting the extent of the induced error potentials is important to circuit designers. Previous studies have shown a considerable dependency of CLFT on signal voltage, circuit impedances, clock amplitude and clock fall-time. The focus of this work was on the signal dependency of the CLFT error and on the CLFT induced signal distortion in open-loop sample-and-hold circuits. CLFT was found to have a strongly non-linear, signal dependent, component, which may cause considerable distortion of the sampled signal. The parameters influencing this distortion were established. It was discovered that distortion could be reduced by more than 20dB through careful adjustment of the clock fall-rate. Several circuit solutions that can help reduce the level of distortion arising from CLFT are presented. These circuits can also reduce the absolute level of CLFT. Simulations showed their effectiveness, which was also proven in silicon. The CLFT reduction methods used in these circuits are easily transferable to other switched-capacitor circuits and are suitable for applications where space is at a premium (as, for example, in analogue neural networks). A new saturation mode contribution to CLFT was found. It is shown to give rise to increased CLFT under high injection conditions

Belle II Technical Design Report

The Belle detector at the KEKB electron-positron collider has collected almost 1 billion Y(4S) events in its decade of operation. Super-KEKB, an upgrade of KEKB is under construction, to increase the luminosity by two orders of magnitude during a three-year shutdown, with an ultimate goal of 8E35 /cm^2 /s luminosity. To exploit the increased luminosity, an upgrade of the Belle detector has been proposed. A new international collaboration Belle-II, is being formed. The Technical Design Report presents physics motivation, basic methods of the accelerator upgrade, as well as key improvements of the detector.Comment: Edited by: Z. Dole\v{z}al and S. Un

Design and debugging of multi-step analog to digital converters

With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. The trend of increasing integration level for integrated circuits has forced the A/D converter interface to reside on the same silicon in complex mixed-signal ICs containing mostly digital blocks for DSP and control. However, specifications of the converters in various applications emphasize high dynamic range and low spurious spectral performance. It is nontrivial to achieve this level of linearity in a monolithic environment where post-fabrication component trimming or calibration is cumbersome to implement for certain applications or/and for cost and manufacturability reasons. Additionally, as CMOS integrated circuits are accomplishing unprecedented integration levels, potential problems associated with device scaling – the short-channel effects – are also looming large as technology strides into the deep-submicron regime. The A/D conversion process involves sampling the applied analog input signal and quantizing it to its digital representation by comparing it to reference voltages before further signal processing in subsequent digital systems. Depending on how these functions are combined, different A/D converter architectures can be implemented with different requirements on each function. Practical realizations show the trend that to a first order, converter power is directly proportional to sampling rate. However, power dissipation required becomes nonlinear as the speed capabilities of a process technology are pushed to the limit. Pipeline and two-step/multi-step converters tend to be the most efficient at achieving a given resolution and sampling rate specification. This thesis is in a sense unique work as it covers the whole spectrum of design, test, debugging and calibration of multi-step A/D converters; it incorporates development of circuit techniques and algorithms to enhance the resolution and attainable sample rate of an A/D converter and to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover and compensate for the errors continuously. The power proficiency for high resolution of multi-step converter by combining parallelism and calibration and exploiting low-voltage circuit techniques is demonstrated with a 1.8 V, 12-bit, 80 MS/s, 100 mW analog to-digital converter fabricated in five-metal layers 0.18-µm CMOS process. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. Microscopic particles present in the manufacturing environment and slight variations in the parameters of manufacturing steps can all lead to the geometrical and electrical properties of an IC to deviate from those generated at the end of the design process. Those defects can cause various types of malfunctioning, depending on the IC topology and the nature of the defect. To relive the burden placed on IC design and manufacturing originated with ever-increasing costs associated with testing and debugging of complex mixed-signal electronic systems, several circuit techniques and algorithms are developed and incorporated in proposed ATPG, DfT and BIST methodologies. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. With the use of dedicated sensors, which exploit knowledge of the circuit structure and the specific defect mechanisms, the method described in this thesis facilitates early and fast identification of excessive process parameter variation effects. The expectation-maximization algorithm makes the estimation problem more tractable and also yields good estimates of the parameters for small sample sizes. To allow the test guidance with the information obtained through monitoring process variations implemented adjusted support vector machine classifier simultaneously minimize the empirical classification error and maximize the geometric margin. On a positive note, the use of digital enhancing calibration techniques reduces the need for expensive technologies with special fabrication steps. Indeed, the extra cost of digital processing is normally affordable as the use of submicron mixed signal technologies allows for efficient usage of silicon area even for relatively complex algorithms. Employed adaptive filtering algorithm for error estimation offers the small number of operations per iteration and does not require correlation function calculation nor matrix inversions. The presented foreground calibration algorithm does not need any dedicated test signal and does not require a part of the conversion time. It works continuously and with every signal applied to the A/D converter. The feasibility of the method for on-line and off-line debugging and calibration has been verified by experimental measurements from the silicon prototype fabricated in standard single poly, six metal 0.09-µm CMOS process

The impact of design techniques in the reduction of power consumption of SoCs Multimedia

Orientador: Guido Costa Souza de AraújoDissertação (mestrado) - Universidade Estadual de Campinas, Instituto de ComputaçãoResumo: A indústria de semicondutores sempre enfrentou fortes demandas em resolver problema de dissipação de calor e reduzir o consumo de energia em dispositivos. Esta tendência tem sido intensificada nos últimos anos com o movimento de sustentabilidade ambiental. A concepção correta de um sistema eletrônico de baixo consumo de energia é um problema de vários níveis de complexidade e exige estratégias sistemáticas na sua construção. Fora disso, a adoção de qualquer técnica de redução de energia sempre está vinculada com objetivos especiais e provoca alguns impactos no projeto. Apesar dos projetistas conheçam bem os impactos de forma qualitativa, as detalhes quantitativas ainda são incógnitas ou apenas mantidas dentro do 'know-how' das empresas. Neste trabalho, de acordo com resultados experimentais baseado num plataforma de SoC1 industrial, tentamos quantificar os impactos derivados do uso de técnicas de redução de consumo de energia. Nos concentramos em relacionar o fator de redução de energia de cada técnica aos impactos em termo de área, desempenho, esforço de implementação e verificação. Na ausência desse tipo de dados, que relacionam o esforço de engenharia com as metas de consumo de energia, incertezas e atrasos serão frequentes no cronograma de projeto. Esperamos que este tipo de orientações possam ajudar/guiar os arquitetos de projeto em selecionar as técnicas adequadas para reduzir o consumo de energia dentro do alcance de orçamento e cronograma de projetoAbstract: The semiconductor industry has always faced strong demands to solve the problem of heat dissipation and reduce the power consumption in electronic devices. This trend has been increased in recent years with the action of environmental sustainability. The correct conception of an electronic system for low power consumption is an issue with multiple levels of complexities and requires systematic approaches in its construction. However, the adoption of any technique for reducing the power consumption is always linked with some specific goals and causes some impacts on the project. Although the designers know well that these impacts can affect the design in a quality aspect, the quantitative details are still unkown or just be kept inside the company's know-how. In this work, according to the experimental results based on an industrial SoC2 platform, we try to quantify the impacts of the use of low power techniques. We will relate the power reduction factor of each technique to the impact in terms of area, performance, implementation and verification effort. In the absence of such data, which relates the engineering effort to the goals of power consumption, uncertainties and delays are frequent. We hope that such guidelines can help/guide the project architects in selecting the appropriate techniques to reduce the power consumption within the limit of budget and project scheduleMestradoCiência da ComputaçãoMestre em Ciência da Computaçã

Characterization and mitigation of process variation in digital circuits and systems

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 155-166).Process variation threatens to negate a whole generation of scaling in advanced process technologies due to performance and power spreads of greater than 30-50%. Mitigating this impact requires a thorough understanding of the variation sources, magnitudes and spatial components at the device, circuit and architectural levels. This thesis explores the impacts of variation at each of these levels and evaluates techniques to alleviate them in the context of digital circuits and systems. At the device level, we propose isolation and measurement of variation in the intrinsic threshold voltage of a MOSFET using sub-threshold leakage currents. Analysis of the measured data, from a test-chip implemented on a 0. 18[mu]m CMOS process, indicates that variation in MOSFET threshold voltage is a truly random process dependent only on device dimensions. Further decomposition of the observed variation reveals no systematic within-die variation components nor any spatial correlation. A second test-chip capable of characterizing spatial variation in digital circuits is developed and implemented in a 90nm triple-well CMOS process. Measured variation results show that the within-die component of variation is small at high voltages but is an increasing fraction of the total variation as power-supply voltage decreases. Once again, the data shows no evidence of within-die spatial correlation and only weak systematic components. Evaluation of adaptive body-biasing and voltage scaling as variation mitigation techniques proves voltage scaling is more effective in performance modification with reduced impact to idle power compared to body-biasing.(cont.) Finally, the addition of power-supply voltages in a massively parallel multicore processor is explored to reduce the energy required to cope with process variation. An analytic optimization framework is developed and analyzed; using a custom simulation methodology, total energy of a hypothetical 1K-core processor based on the RAW core is reduced by 6-16% with the addition of only a single voltage. Analysis of yield versus required energy demonstrates that a combination of disabling poor-performing cores and additional power-supply voltages results in an optimal trade-off between performance and energy.by Nigel Anthony Drego.Ph.D

In-situ and In-field temperature and transistor BTI sensing techniques with microprocessor level implementation

In modern deep-scaled CMOS technologies, various silicon-related pitfalls present challenges to the long-term performance of microprocessors. Such challenges include (1) local hot spots, which breach the thermal limitations of a microprocessor, and (2) transistor aging, especially NBTI, which degrades transistor threshold voltage, ultimately threatening the reliability of the entire memory block. In previous systems, the dummy circuit was placed next to the subject, where the dummy was frequently analyzed, and the readout was used to infer the condition of the target. Due to rapidly changing ambient conditions (e.g., temperature and voltage) and the potential scale of the target dimensions, such metrics may not accurately represent the condition of the target. Moreover, such temperature sensors and canary circuits occupy a significant area. Therefore, it would be highly preferable to monitor the target circuit in-situ, i.e., to sense the precise transistor at operation. It is also important to achieve an accurate sensing metric. When the temperature is analyzed, the readout should account for voltage and process variations. While sensing the aging degradation, the readout should account for voltage and temperature fluctuations. This would allow testing during in-field operation, while the circuits achieve area-efficiency. This research had two stages. One result of the first stage was a silicon test chip that was a compact temperature sensor. It involved a family of PTAT+CTAT sensor front-ends that unitized only 6 to 8 conventional CMOS logic devices, yielding a smaller sized chip. The sensor demonstrates accuracy within the target and achieves a 14.3x smaller foot print than preceding published designs. The second product of the first stage was a PMOS aging sensor used in 6T SRAM circuits. The test chip has a real SRAM array, integrated with the proposed PMOS NBTI sensor. It can sense real PMOS NBTI effects in any bit cell (in-situ) and provide robust readings of temperature and voltage (in-field). Intensive aging tests validated the proposed sensing technique. The second stage was focused on implementing the in-situ and in-field sensing techniques in a real processor. The MIPS microprocessor had a modified instruction cache (I$) and instruction set architecture. With the addition of new instruction aging sensing and minor modification of the circuits, the processor can execute aging sensing opportunistically to evaluate the aging level of its instruction cache. A software framework was developed and verified to estimate the retention voltage of the instruction cache over the lifetime of the chip. An area-efficient SoC was developed that could transform the instruction cache into an ambient temperature sensor. It had a physically unclonable function (PUF), and it was built with an area-saving technique similar to the earlier work. This thesis has four chapters. They are presented in chronological and they are aligned with the research described above

Development and Performance Evaluation of High Resolution TOF-PET Detectors Suitable for Novel PET Scanners

Tesis por compendio[ES] La Tomografía por Emisión de Positrones (PET) es una de las técnicas más importantes en la medicina de diagnóstico actual y la más representativa en el campo de la Imagen Molecular. Esta modalidad de imagen es capaz de producir información funcional única, que permite la visualización en detalle, cuantificación y conocimiento de una variedad de enfermedades y patologías. Áreas como la oncología, neurología o la cardiología, entre otras, se han beneficiado en gran medida de esta técnica. A pesar de que un elevado número de avances han ocurrido durante el desarrollo del PET, existen otros que son de gran interés para futuras investigaciones. Uno de los principales pilares actualmente en PET, tanto en investigación como en desarrollo, es la obtención de la información del tiempo de vuelo (TOF) de los rayos gamma detectados. Cuando esto ocurre, aumenta la sensibilidad efectiva del PET, mejorando la calidad señal-ruido de las imágenes. Sin embargo, la obtención precisa de la marca temporal de los rayos gamma es un reto que requiere, además de técnicas y métodos específicos, compromisos entre coste y rendimiento. Una de las características que siempre se ve afectada es la resolución espacial. Como discutiremos, la resolución espacial está directamente relacionada con el tipo de centellador y, por lo tanto, con el coste del sistema y su complejidad. En esta tesis, motivada por los conocidos beneficios en imagen clínica de una medida precisa del tiempo y de la posición de los rayos gamma, proponemos configuraciones de detectores TOF- PET novedosos capaces de proveer de ambas características. Sugerimos el uso de lo que se conoce como métodos de "light-sharing", tanto basado en cristales monolíticos como pixelados de tamaño diferente al del fotosensor. Estas propuestas hacen que la resolución espacial sea muy alta. Sin embargo, sus capacidades temporales han sido muy poco abordadas hasta ahora. En esta tesis, a través de varios artículos revisados, pretendemos mostrar los retos encontrados en esta dirección, proponer determinadas configuraciones y, además, indagar en los límites temporales de éstas. Hemos puesto un gran énfasis en estudiar y analizar las distribuciones de la luz centellante, así como su impacto en la determinación temporal. Hasta nuestro conocimiento, este es el primer trabajo en el que se estudia la relación de la determinación temporal y la distribución de luz de centelleo, en particular usando SiPM analógicos y ASICs. Esperamos que esta tesis motive y permita otros muchos trabajos orientados en nuevos diseños, útiles para instrumentación PET, así como referencia para otros trabajos. Esta tesis esta organizada como se describe a continuación. Hay una introducción compuesta por tres capítulos donde se resumen los conocimientos sobre imagen PET, y especialmente aquellos relacionados con la técnica TOF-PET. Algunos trabajos recientes, pero aún no publicados se muestran también, con el objetivo de corroborar ciertas ideas. En la segunda parte se incluyen las cuatro contribuciones que el candidato sugiere para el compendio de artículos.[CA] La Tomografia per Emissió de Positrons (PET) és una de les tècniques més importants en la medicina de diagnòstic actual i la més representativa en el camp de la Imatge Molecular. Esta modalitat d'imatge és capaç de produir informació funcional única, que permet la visualització en detall, quantificació i coneixement d'una varietat de malalties i patologies. Àrees com l'oncologia, neurologia o la cardiologia, entre altres, s'han beneficiat en gran manera d'aquesta tècnica. Tot i que un elevat nombre d'avanços han ocorregut durant el desenvolupament del PET, hi ha altres que són de gran interés per a futures investigacions. Un dels principals pilars actuals en PET, tant en investigació com en desenvolupament, és l'obtenció de la informació del temps de vol (TOF en anglès) dels raigs gamma detectats. Quan açò ocorre, augmenta la sensibilitat efectiva del PET, millorant la qualitat senyal-soroll de les imatges. No obstant això, l'obtenció precisa de la marca temporal dels raigs gamma és un repte que requerix, a més de tècniques i mètodes específics, compromisos entre cost i rendiment. Una de les característiques que sempre es veu afectada és la resolució espacial. Com discutirem, la resolució espacial està directament relacionada amb el tipus de centellador, i per tant, amb el cost del sistema i la seua complexitat. En aquesta tesi, motivada pels coneguts beneficis en imatge clínica d'una mesura precisa del temps i de la posició dels raigs gamma, proposem nouves configuracions de detectors TOF-PET capaços de proveir d'ambduess característiques. Suggerim l'ús del que es coneix com a mètodes de "light-sharing", tant basat en cristalls monolítics com pixelats de diferent tamany del fotosensor. Aquestes propostes fan que la resolució espacial siga molt alta. No obstant això, les seues capacitats temporals han sigut molt poc abordades fins ara. En aquesta tesi, a través de diversos articles revisats, pretenem mostrar els reptes trobats en aquesta direcció, proposar determinades configuracions i, a més, indagar en els límits temporals d'aquestes. Hem posat un gran èmfasi a estudiar i analitzar les distribucions de la llum centellejant, així com el seu impacte en la determinació temporal. Fins al nostre coneixement, aquest és el primer treball en què s'estudia la relació de la determinació temporal i la distribució de llum de centelleig, en particular utilitzant SiPM analògics i ASICs. Esperem que aquesta tesi motive i permeta molts altres treballs orientats en nous dissenys, útils per a instrumentació PET, així com referència per a altres treballs. Aquesta tesi esta organitzada com es descriu a continuació. Hi ha una introducció composta per tres capítols on es resumeixen els coneixements sobre imatge PET i, especialmente, aquells relacionats amb la tècnica TOF-PET. Alguns treballs recents, però encara no publicats es mostren també, amb l'objectiu de corroborar certes idees. La segona part de la tesi conté els quatre articles revisats que el candidat suggereix.[EN] Positron Emission Tomography (PET) is one of the greatest tools of modern diagnostic medicine and the most representative in the field of molecular imaging. This imaging modality, is capable of providing a unique type of functional information which permits a deep visualization, quantification and understanding of a variety of diseases and pathologies. Areas like oncology, neurology, or cardiology, among others, have been well benefited by this technique. Although numerous important advances have already been achieved in PET, some other individual aspects still seem to have a great potential for further investigation. One of the main trends in modern PET research and development, is based in the extrapolation of the Time- Of-Flight (TOF) information from the gamma-ray detectors. In such case, an increase in the effective sensitivity of PET is accomplished, resulting in an improved image signal-to-noise ratio. However, the direction towards a precise decoding of the photons time arrival is a challenging task that requires, besides specific approaches and techniques, tradeoffs between cost and performance. A performance characteristic very habitually compromised in TOF-PET detector configurations is the spatial resolution. As it will be discussed, this feature is directly related to the scintillation materials and types, and consequently, with system cost and complexity. In this thesis, motivated by the well-known benefits in clinical imaging of a precise time and spatial resolution, we propose novel TOF-PET detector configurations capable of inferring both characteristics. Our suggestions are based in light sharing approaches, either using monolithic detectors or crystal arrays with different pixel-to-photosensor sizes. These approaches, make it possible to reach a precise impact position determination. However, their TOF capabilities have not yet been explored in depth. In the present thesis, through a series of peer-reviewed publications we attempt to demonstrate the challenges encountered in these kinds of configurations, propose specific approaches improving their performance and eventually reveal their limits in terms of timing. High emphasis is given in analyzing and studying the scintillation light distributions and their impact to the timing determination. To the best of our knowledge, this is one of the first works in which such detailed study of the relation between light distribution and timing capabilities is carried out, especially when using analog SiPMs and ASICs. Hopefully, this thesis will motivate and enable many other novel design concepts, useful in PET instrumentation as well as it will serve as a helpful reference for similar attempts. The present PhD thesis is organized as follows. There is an introduction part composed by three detailed sections. We attempt to summarize here some of the knowledge related to PET imaging and especially with the technique of TOF-PET. Some very recent but still unpublished results are also presented and included in this part, aiming to support statements and theories. The second part of this thesis lists the four peer-reviewed papers that the candidate is including.This project has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation program (grant agreement No 695536). It has also been supported by the Spanish Ministerio de Economía, Industria y Competitividad under Grants No. FIS2014-62341-EXP and TEC2016-79884-C2-1-R. Efthymios Lamprou has also been supported by Generalitat Valenciana under grant agreement GRISOLIAP-2018-026.Lamprou, E. (2021). Development and Performance Evaluation of High Resolution TOF-PET Detectors Suitable for Novel PET Scanners [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/162991TESISCompendi

Towards the Development of a Breast PET/MRI Insert for a Clinical Whole-Body PET/MRI Scanner

Die Positronen Emissions Tomographie (PET) und die Magnet Resonanz Tomographie (MRT) sind nicht-invasive Bildgebungsverfahren, welche bei onkologischen Fragestellungen verwendet werden. Mithilfe von PET ist es möglich unter Zuhilfenahme eines radioaktiv markierten Tracers biologische Prozesse auf der molekularen Ebene zu visualisieren. Bei der MRT werden anhand von magnetischen Feldern und deren unterschiedlichen Auswirkungen auf die verschiedenen Gewebearten anatomische und funktionelle Bilder mit einem hohen Weichteilkontrast erzeugt. Eine Kombination dieser beiden Bildgebungsmodalitäten kann genutzt werden, um eine Verbesserung der onkologischen Bildgebung zu ermöglichen in Form einer besseren Diagnose, individuell angepasster Therapieplanung sowie einer genaueren Beobachtung der Therapieantwort. Die Kombination von PET und MRT wird auch für die Bildgebung von Brustkrebs genutzt, die am häufigsten auftretende Krebsart bei Frauen. Um hierbei die MRT- Bildqualität zu verbessern, wird eine spezielle Hochfrequenz (HF) Spule für die Brust eingesetzt. Die PET-Bildgebung wird derzeit hingegen noch mit Ganzkörper PET/MRT-Systemen durchgeführt. Nachteilig daran sind die Einschränkungen hinsichtlich der Ortsauflösung und der Sensitivität, welche durch das in dieser Arbeit vorgestellte Brust PET/MRT-Insert, einem eigenständigen PET-Scanner für die Brust, verbessert werden sollen. Hierfür wurde ein rudimentäres Design für das Insert erarbeitet, welches die Integration in die HF-Spule, die Anforderungen an die PET-Detektoren und den simultanen Betrieb innerhalb des Ganzkörper PET/MRT-Scanners beinhaltet. Weiterhin wurde das Konzept von Ereignissen, die koinzident zwischen beiden PET-Systemen auftreten, eingeführt. Hieraus ergibt sich das Potenzial einer Identifikation von kleinen Metastasen im Bereich des Brustkorbs und der Achsel. Als mögliche PET-Detektoren und Systemelektronik bieten sich die Hamamatsu PET-Module (Hamamatsu Photonics K.K., Hamamatsu, Japan) aufgrund ihrer hohen Performanz, Modularität und Möglichkeit zur kompakten Integration an. Umfangreiche Tests wurden durchgeführt, um zu bewerten, ob sich die PET-Module zur Realisierung des Brust PET/MRT-Inserts nutzen lassen. Zunächst wurde gezeigt, dass ein konstanter Betrieb über einen längeren Zeitraum und Temperaturbereich möglich ist. Da die verfügbaren Szintillationskristalle für die PET-Module zu groß gewesen wären, um eine hohe Ortsauflösung mit dem PET/MRT-Insert zu erreichen, wurde in dieser Arbeit ein Detektor mit dazugehöriger Signalauswertung entwickelt welcher ermöglicht 1.5 mm große Kristalle auszulesen. Des Weiteren wurde der Betrieb der PET-Module innerhalb des MRT-Scanners untersucht. Die Integration eines PET-Systems in einen MRT-Scanner kann zu elektromagnetischen Störungen der Magnetfelder führen. Zusätzlich muss das PET-System den starken magnetischen Feldern des MRT-Scanners standhalten, welche zu Störungen in dessen Leitungen und innerhalb dessen Elektronik führen können. Da die PET-Module ursprünglich nicht für einen Einsatz innerhalb eines MRT-Scanners vorgesehen waren, mussten im Rahmen dieser Arbeit dahingehend Änderung durchgeführt werden. Deren Einfluss auf eine Kompatibilität des PET und MRT-Systems wurde stetig mithilfe von speziellen Testsequenzen und eigens dafür entwickelten Auswertemethoden der PET-Daten getestet, welche Rückschlüsse auf die Störung durch einzelne Komponenten des MRT-Scanners zuließen. Die gegenseitige Beeinflussung von PET und MRT konnte ausreichend minimiert werden durch das Verlegen eines Teils der Elektronik außerhalb des MRT-Raumes, einer HF-Abschirmung der Detektoren, einer gefilterten Spannungsversorgung sowie einer optischen Signalübertragung. Zusammenfassend wurden im Rahmen dieser Arbeit fundamentale Aspekte für die Entwicklung des Brust PET/MRT-Inserts für den parallelen Betrieb innerhalb eines Ganzkörper PET/MRT-Scanners erarbeitet. Aufbauend auf dieser Arbeit ist es möglich weitere Entwicklungen und Simulationen des Komplettsystems durchzuführen. Des Weiteren sind die Ergebnisse aus dieser Arbeit nicht nur für die Entwicklung des Brust PET/MRT-Inserts relevant. Vielmehr können sie auch auf andere PET-Systeme übertragen werden, wie beispielsweise zur Kleintier- oder Hirnbildgebung, und geben allgemein Aufschluss darüber, wie ein Betrieb von PET-Detektoren innerhalb eines MRT-Scanners ermöglicht werden kann.Amongst the noninvasive imaging technologies that are routinely used for clinical diagnostics, two are of particular interest for oncological imaging: positron emission tomography (PET), which utilizes a radioactive labeled tracer to monitor biological processes with great precision down to the molecular level, and magnetic resonance imaging (MRI), a radiation-free technology that makes use of magnetic fields and their distinct responses to different tissues to gather both anatomical and functional information with high soft tissue contrast. The complementary combination of both modalities further boosts their value for oncological imaging by enhancing the accuracy of the diagnosis, allowing for individual therapy planning, and monitoring the treatment response. Combined PET/MRI is currently used to detect breast cancer, the most commonly diagnosed cancer in women. To this end, a radio frequency (RF) coil dedicated to the breast is used to enhance the quality of the MR image. PET imaging, however, is still performed using clinical whole-body PET systems without taking into account the demand for high resolution in the submillimeter range to detect small lesions inside the breast. To overcome the inherent disadvantages, such as limited spatial resolution and sensitivity, this thesis considers the design and development of a dedicated breast PET/MRI insert. For this purpose, design concepts were developed, including the initial geometry of the insert, its integration into the RF coil, the constraints on the PET detectors, and the possibility of a simultaneous operation with the whole-body PET/MRI scanner. This thesis also introduces the idea of processing mixed events, or events that are detected in coincidence between both PET systems (the breast PET/MRI insert and the whole-body PET/MRI scanner). This method has the potential to resolve small metastases in the thorax and the axilla region of the breast and would significantly improve diagnostic and therapeutic choices. PET detectors and system electronics are essential for building the PET/MRI insert. A promising candidate for this purpose is the Hamamatsu PET modules (Hamamatsu Photonics K.K., Hamamatsu, Japan), as they feature high performance, compact integration, and modular technology, thus providing the flexibility required for prototyping. This study performed comprehensive tests of these modules to evaluate their suitability for use as the breast PET/MRI insert. The results showed that the PET modules could stably operate over time and temperature changes. However, the PET modules were only available with scintillation crystals of such large sizes that the corresponding spatial resolution would be unacceptable for the breast PET/MRI insert. This thesis demonstrated that the Hamamatsu modules could be used with the researcher’s own photosensors and scintillation blocks with a small crystal size of 1.5 mm, enabling a high spatial resolution. Therefore, a prototype detector with a light sharing approach and a corresponding data processing algorithm was developed. In addition to extensively testing the PET hardware, one focus of this work was to evaluate the detector’s performance inside the MRI scanner. The integration of a PET system into an MRI scanner naturally comes with several problems for both modalities. On the one hand, the MRI scanner is a highly sensitive device that can be distorted by the smallest electromagnetic interference. On the other hand, the MRI scanner itself is a harsh environment due to the presence of strong magnetic fields and can potentially interact with the communication lines and electronics of the PET modules. The original PET modules were not designed to operate inside an MRI scanner. Therefore, the work conducted for this thesis included several modifications of the PET system setup and iterative tests for MRI compatibility inside the MRI scanner. Special test sequences and corresponding analysis methods were utilized to gain insight into how the digital PET event data was affected by the individual components of the MRI scanner. Finally, the mutual interference between both systems could be limited to an acceptable level through the following actions: locating the back-end electronics outside of the MRI room, constructing a proper RF shield for the detectors, filtering the power lines, and generating a signal transmission via optical fibers. In summary, this thesis reached essential milestones for developing a breast PET/MRI insert for a clinical whole-body PET/MRI scanner. This work enables a further refined development of the detectors and the entire insert driven by advanced simulations to guide the experimental setup. In addition, the results of this thesis are not specifically limited to the breast insert; instead, they can be applied to other PET systems, such as those used for small animals or brain imaging, as well as to the operation of PET detectors inside MRI scanners in general

Circuits and Systems Advances in Near Threshold Computing

Modern society is witnessing a sea change in ubiquitous computing, in which people have embraced computing systems as an indispensable part of day-to-day existence. Computation, storage, and communication abilities of smartphones, for example, have undergone monumental changes over the past decade. However, global emphasis on creating and sustaining green environments is leading to a rapid and ongoing proliferation of edge computing systems and applications. As a broad spectrum of healthcare, home, and transport applications shift to the edge of the network, near-threshold computing (NTC) is emerging as one of the promising low-power computing platforms. An NTC device sets its supply voltage close to its threshold voltage, dramatically reducing the energy consumption. Despite showing substantial promise in terms of energy efficiency, NTC is yet to see widescale commercial adoption. This is because circuits and systems operating with NTC suffer from several problems, including increased sensitivity to process variation, reliability problems, performance degradation, and security vulnerabilities, to name a few. To realize its potential, we need designs, techniques, and solutions to overcome these challenges associated with NTC circuits and systems. The readers of this book will be able to familiarize themselves with recent advances in electronics systems, focusing on near-threshold computing