Multi Look-Up Table Digital Predistortion for RF Power Amplifier Linearization

Premi extraordinari doctorat curs 2007-2008, àmbit d’Enginyeria de les TICAquesta Tesi Doctoral se centra en el disseny d'un nou linealitzador de Predistorsió Digital (Digital Predistortion - DPD) capaç de compensar la dinàmica i els efectes no lineals introduïts pels Amplificadors de Potència (Power Amplifiers - PAs). Un dels trets més rellevants d'aquest nou predistorsionador digital i adaptatiu consisteix en ser deduïble a partir d'un model de PA anomenat Nonlinear Auto-Regressive Moving Average (NARMA). A més, la seva arquitectura multi-LUT (multi-Taula) permet la implementació en un dispositiu Field Programmable Gate Array (FPGA).La funció de predistorsió es realitza en banda base, per tant, és independent de la banda freqüencial on es durà a terme l'amplificació del senyal de RF, el que pot resultar útil si tenim en compte escenaris multibanda o reconfigurables. D'altra banda, el fet que aquest DPD tingui en compte els efectes de memòria introduïts pel PA, representa una clara millora de les prestacions aconseguides per un simple DPD sense memòria. En comparació amb d'altres DPDs basats en models més computacionalment complexos, com és el cas de les xarxes neuronals amb memòria (Time-Delayed Neural Networks - TDNN), la estructura recursiva del DPD proposat permet reduir el nombre de LUTs necessàries per compensar els efectes de memòria del PA. A més, la seva estructura multi-LUT permet l'escalabilitat, és a dir, activar or desactivar les LUTs que formen el DPD en funció de la dinàmica que presenti el PA.En una primera aproximació al disseny del DPD, és necessari identificar el model NARMA del PA. Un dels majors avantatges que presenta el model NARMA és la seva capacitat per trobar un compromís entre la fidelitat en l'estimació del PA i la complexitat computacional introduïda. Per reforçar aquest compromís, l' ús d'algoritmes heurístics de cerca, com són el Simulated Annealing o els Genetic Algorithms, s'utilitzen per trobar els retards que millor caracteritzen la memòria del PA i per tant, permeten la reducció del nombre de coeficients necessaris per caracteritzar-la. Tot i així, la naturalesa recursiva del model NARMA comporta que, de cara a garantir l'estabilitat final del DPD, cal dur a terme un estudi previ sobre l'estabilitat del model.Una vegada s'ha obtingut el model NARMA del PA i s'ha verificat l'estabilitat d'aquest, es procedeix a l'obtenció de la funció de predistorsió a través del mètode d'identificació predictiu. Aquest mètode es basa en la continua identificació del model NARMA del PA i posteriorment, a partir del model obtingut, es força al PA perquè es comporti de manera lineal. Per poder implementar la funció de predistorsió en la FPGA, cal primer expressar-la en forma de combinacions en paral·lel i cascada de les anomenades Cel·les Bàsiques de Predistorsió (BPCs), que són les unitats fonamentals que composen el DPD. Una BPC està formada per un multiplicador complex, un port RAM dual que actua com a LUT (taula de registres) i un calculador d'adreces. Les LUTs s'omplen tenint en compte una distribució uniforme dels continguts i l'indexat d'aquestes es duu a terme mitjançant el mòdul de l'envoltant del senyal. Finalment, l'adaptació del DPD consisteix en monitoritzar els senyals d'entrada i sortida del PA i anar duent a terme actualitzacions periòdiques del contingut de les LUTs que formen les BPCs. El procés d'adaptació del contingut de les LUTs es pot dur a terme en la mateixa FPGA encarregada de fer la funció de predistorsió, o de manera alternativa, pot ser duta a terme per un dispositiu extern (com per exemple un DSP - Digital Signal Processor) en una escala de temps més relaxada. Per validar l'exposició teòrica i provar el bon funcionalment del DPD proposat en aquesta Tesi, es proporcionen resultats tant de simulació com experimentals que reflecteixen els objectius assolits en la linealització del PA. A més, certes qüestions derivades de la implementació pràctica, tals com el consum de potència o la eficiència del PA, són també tractades amb detall.This Ph.D. thesis addresses the design of a new Digital Predistortion (DPD) linearizer capable to compensate the unwanted nonlinear and dynamic behavior of power amplifiers (PAs). The distinctive characteristic of this new adaptive DPD is its deduction from a Nonlinear Auto Regressive Moving Average (NARMA) PA behavioral model and its particular multi look-up table (LUT) architecture that allows its implementation in a Field Programmable Gate Array (FPGA) device.The DPD linearizer presented in this thesis operates at baseband, thus becoming independent on the final RF frequency band and making it suitable for multiband or reconfigurable scenarios. Moreover, the proposed DPD takes into account PA memory effects compensation which representsan step forward in overcoming classical limitations of memoryless predistorters. Compared to more computational complex DPDs with dynamic compensation, such Time-Delayed Neural Networks (TDNN), this new DPD takes advantage of the recursive nature of the NARMA structure to relax the number of LUTs required to compensate memory effects in PAs. Furthermore, its parallel multi-LUT architecture is scalable, that is, permits enabling or disabling the contribution of specific LUTs depending on the dynamics presented by a particular PA.In a first approach, it is necessary to identify a NARMA PA behavioral model. The extraction of PA behavioral models for DPD linearization purposes is carried out by means of input and output complex envelope signal observations. One of the major advantages of the NARMA structure regards its capacity to deal with the existing trade-off between computational complexity and accuracy in PA behavioral modeling. To reinforce this compromise, heuristic search algorithms such the Simulated Annealing or Genetic Algorithms are utilized to find the best sparse delays that permit accurately reproducing the PA nonlinear dynamic behavior. However, due to the recursive nature of the NARMA model, an stability test becomes a previous requisite before advancing towards DPD linearization.Once the PA model is identified and its stability verified, the DPD function is extracted applying a predictive predistortion method. This identification method relies just on the PA NARMA model and consists in adaptively forcing the PA to behave as a linear device. Focusing in the DPD implementation, it is possible to map the predistortion function in a FPGA, but to fulfill this objective it is first necessary to express the predistortion function as a combined set of LUTs.In order to store the DPD function into a FPGA, it has to be stated in terms of parallel and cascade Basic Predistortion Cells (BPCs), which are the fundamental building blocks of the NARMA based DPD. A BPC is formed by a complex multiplier, a dual port RAM memory block acting as LUT and an address calculator. The LUT contents are filled following an uniform spacing procedure and its indexing is performed with the amplitude (modulus) of the signal's envelope.Finally, the DPD adaptation consists in monitoring the input-output data and performing frequent updates of the LUT contents that conform the BPCs. This adaptation process can be carried out in the same FPGA in charge of performing the DPD function, or alternatively can be performed by an external device (i.e. a DSP device) in a different time-scale than real-time operation.To support all the theoretical design and to prove the linearization performance achieved by this new DPD, simulation and experimental results are provided. Moreover, some issues derived from practical experimentation, such as power consumption and efficiency, are also reported and discussed within this thesis.Award-winningPostprint (published version

ULTRA-WIDEBAND NONLINEAR ECHO-CANCELLATION

Hybrid fiber coaxial (HFC) networks are used around the world to distribute cable television and broadband internet services to customers. These networks are governed by the Data-Over-Cable Service Interface Specification (DOCSIS) family of standards, with the most recent version at the time of this writing being DOCSIS 3.1. A frequency division duplex (FDD) spectrum is used in DOCSIS 3.1, where the upstream and downstream signals are separated in frequency to eliminate interference. A possible method to increase signal bandwidths is to use a full-duplex (FDX) spectrum, in which the US and DS signals use the same frequencies at the same time. A main challenge faced when implementing FDX in a DOCSIS node is eliminating the interference in the received US signal caused by the transmitted DS signal. One possible method for eliminating the interference is utilizing an echo-canceling algorithm, which predicts the self-interference (SI) based on the known DS signal and cancels it from the received US signal. Although echo-cancellation algorithms exist for fundamentally similar applications, the DOCSIS FDX case is more complicated for two main reasons. First, the DOCSIS node uses a nonlinear power amplifier to amplify the DS signal. Second, the DS signal is an ultra-wideband signal spanning a frequency range of up to 1.2 GHz. Most of the amplifier modeling techniques discussed in the literature were designed for narrowband wireless signals and will have limited performance when used with ultra-wideband signals. This thesis develops an algorithm to characterize the power amplifier and to predict the harmonics it generates for a given DS signal. These predicted harmonics can be used to cancel the SI signal in a full duplex DOCSIS system. The algorithm, which is referred to as the ultra-wideband memory polynomial (UWB-MP) model, is based on the well-known memory polynomial model with adaptations which allow the model to predict harmonics for ultra-wideband signals. Since a direct implementation of the UWB-MP model in an FPGA would result in very high resource usage, system architecture recommendations are provided. Our proposed implementation of the model compensates for harmonics up to and including the 3rd order, which has a power spectrum extending above 3600 MHz. Using the techniques discussed in this thesis, it is shown that a sampling rate of 4 GHz allows for cancellation of the SI signal while providing a reasonable balance between performance and resource usage. Matlab simulations of a DOCSIS node with various parameters and PA simulation models were conducted. The simulations showed that over 75 dB of cancellation of the SI signal is possible in an idealized hardware setup. It is also demonstrated that AWGN injected into the received signal does not reduce the ability of the model to estimate the PA harmonics, although the noise itself cannot be canceled. Further simulations showed that the UWB-MP model could cancel harmonics whose power is much higher than that specified in DOCSIS. Although the UWB-MP model was designed with memory polynomial type PAs in mind, simulation results show that significant cancellation is possible with PAs that are represented by Wiener models as well. Based on the simulation results, we recommend using a filter of length 20 coefficients for each harmonic in the UWB-MP model, and 60 iterations with 500 samples for estimating the coefficients with the least squares method

Design and Linearization of Energy Efficiency Power Amplifier in Nonlinear OFDM Transmitter for LTE-5G Applications. Simulation and measurements of energy efficiency power amplifier in the presence of nonlinear OFDM transmitter system and digital predistortion based on Hammerstein-Wiener method

This research work has made an effort to understand a novel line of radio frequency power amplifiers (RFPAs) that address initiatives for efficiency enhancement and linearity compensation to harmonize the fifth generation (5G) campaign. The objective is to enhance the performance of an orthogonal frequency division multiplexing-long term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the RFPA. The first part of this work explores the design and implementation of 15.5 W class AB RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement and redeeming exhibition of excessive power in the transmitter. Consequently, this work goes beyond improving efficiency over a linear RF power amplifier design; in which a comprehensive investigation on the fundamental and harmonic components of class F RF power amplifier using a load-pull approach to realise an optimum load impedance and the matching network is presented. The frequency bandwidth for both amplifiers was allocated to operate in the 2.620-2.690 GHz of mobile LTE applications. The second part explores the development of the behavioural model for the class AB power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier nonlinear distortion is approximated using a new linear parameter approximation approach. The first and second-order Hammerstein-Wiener using the Normalised Least Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of filtering process during linear memory cancellation. Moreover, an enhanced adaptive Wiener model is proposed to explore the nonlinear memory effect in the system. The proposed approach is able to balance between convergence speed and high-level accuracy when compared with behavioural modelling algorithms that are more complex in computation. Finally, the adaptive predistorter technique is implemented and verified in the OFDM transceiver test-bed. The results were compared against the computed one from MATLAB simulation for OFDM and 5G modulation transmitters. The results have confirmed the reliability of the model and the effectiveness of the proposed predistorter.Fundacão para a Ciência e a Tecnologia, Portugal, under European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424 I also acknowledge the role of the National Space Research and Development Agency (NASRDA) Sokoto State Government Petroleum Technology Trust Fund (PTDF

Compensation of nonlinear distortion in RF amplifiers for mobile communications

Compensation of nonlinear distortion of power amplifiers in mobile communications is an important requirement for improving power consumption performance while maintaining efficiency, since mobile phone became an essential accessory for everyone nowadays. This problem demands a good power amplifier model, in order to develop an effective predistortion system. Current researches are focused on modelling and predistortion of power amplifiers with memory, as well as memoryless ones. Different methods for modelling are used, as the Volterra series, polynomial models, look-up tables, the Hammerstein models, the Wiener models, and artificial intelligence systems. For predistortion feedback, feedforward and digital predistortion techniques are used. Among digital predistortion methods there are artificial intelligence systems, used in this thesis for linearization of power amplifier. This thesis presents developed robust method for modelling power amplifiers without memory effects and gives a comparison of proposed method with least squares method. Also, this research presents two novel techniques based on artificial intelligence systems for modelling and predistortion of highly nonlinear power amplifier with memory. The first approach is based on artificial neural networks, while the second one uses adaptive fuzzy logic systems. Forward and inverse models of power amplifier are created with both proposed methods. Superiority of artificial intelligence systems over partial least squares method is presented. Developed models are employed in a cascade to make a linearized system. Verification of proposed methods is carried out through the signal performance parameters and spectra of measured signal and signal from predistortion system. The feasibility and performances of the proposed digital predistortions are examined by simulations and experiments. The comparison of proposed methods is given to present advantages/disadvantages of both methods. The achieved distortion suppression from 72.2% to 93.6% and spectral regrowth improvement from 11.4 dB to 16.2 dB prove that the proposed methods have great ability to compensate the nonlinear distortion in power amplifier

Advanced digital predistortion of power amplifiers for mobile and wireless communications

This research work focuses on improving the performances of digital predistorters while maintaining low computational complexity for mobile and wireless communication systems. Initially, the thesis presents the fundamental theory of power amplifiers, overview of existing linearisation and memory-effects compensation techniques and reveals the current issues in the field. Further, the thesis depicts the proposed solutions to the problems, including the developed in-band distortion modelling technique, model extraction methods, memoryless digital predistortion technique based on distortion components iterative injection, baseband equalisation technique for minimising memory effects, Matlab-ADS co-simulation system and adaptation circuit with an offline training scheme. The thesis presents the following contributions of the research work. A generalized in-band distortion modelling technique for predicting the nonlinear behaviour of power amplifiers is developed and verified experimentally. Analytical formulae are derived for calculating predistorter parameters. Two model extraction techniques based on the least-squares regression method and frequency-response analysis are developed and verified experimentally. The area of implementation and the trade-off between the methods are discussed. Adjustable memoryless digital predistortion technique based on the distortion components iterative injection method is proposed in order to overcome the distortion compensation limit peculiar to the conventional injection techniques. A baseband equalisation method is developed in order to provide compensation of memory effects for increasing the linearising performance of the proposed predistorter. A combined Matlab-ADS co-simulation system is designed for providing powerful simulation tools. An adaptation circuit is developed for the proposed predistorter for enabling its adaptation to environmental conditions. The feasibility, performances and computational complexity of the proposed digital predistortion are examined by simulations and experimentally. The proposed method is tuneable for achieving the best ratio of linearisation degree to computational complexity for any particular application

Digital predistortion of RF amplifiers using baseband injection for mobile broadband communications

Radio frequency (RF) power amplifiers (PAs) represent the most challenging design parts of wireless transmitters. In order to be more energy efficient, PAs should operate in nonlinear region where they produce distortion that significantly degrades the quality of signal at transmitter’s output. With the aim of reducing this distortion and improve signal quality, digital predistortion (DPD) techniques are widely used. This work focuses on improving the performances of DPDs in modern, next-generation wireless transmitters. A new adaptive DPD based on an iterative injection approach is developed and experimentally verified using a 4G signal. The signal performances at transmitter output are notably improved, while the proposed DPD does not require large digital signal processing memory resources and computational complexity. Moreover, the injection-based DPD theory is extended to be applicable in concurrent dual-band wireless transmitters. A cross-modulation problem specific to concurrent dual-band transmitters is investigated in detail and novel DPD based on simultaneous injection of intermodulation and cross-modulation distortion products is proposed. In order to mitigate distortion compensation limit phenomena and memory effects in highly nonlinear RF PAs, this DPD is further extended and complete generalised DPD system for concurrent dual-band transmitters is developed. It is clearly proved in experiments that the proposed predistorter remarkably improves the in-band and out-of-band performances of both signals. Furthermore, it does not depend on frequency separation between frequency bands and has significantly lower complexity in comparison with previously reported concurrent dual-band DPDs

Advanced digital predistortion of power amplifiers for mobile and wireless communications

This research work focuses on improving the performances of digital predistorters while maintaining low computational complexity for mobile and wireless communication systems. Initially, the thesis presents the fundamental theory of power amplifiers, overview of existing linearisation and memory-effects compensation techniques and reveals the current issues in the field. Further, the thesis depicts the proposed solutions to the problems, including the developed in-band distortion modelling technique, model extraction methods, memoryless digital predistortion technique based on distortion components iterative injection, baseband equalisation technique for minimising memory effects, Matlab-ADS co-simulation system and adaptation circuit with an offline training scheme. The thesis presents the following contributions of the research work. A generalized in-band distortion modelling technique for predicting the nonlinear behaviour of power amplifiers is developed and verified experimentally. Analytical formulae are derived for calculating predistorter parameters. Two model extraction techniques based on the least-squares regression method and frequency-response analysis are developed and verified experimentally. The area of implementation and the trade-off between the methods are discussed. Adjustable memoryless digital predistortion technique based on the distortion components iterative injection method is proposed in order to overcome the distortion compensation limit peculiar to the conventional injection techniques. A baseband equalisation method is developed in order to provide compensation of memory effects for increasing the linearising performance of the proposed predistorter. A combined Matlab-ADS co-simulation system is designed for providing powerful simulation tools. An adaptation circuit is developed for the proposed predistorter for enabling its adaptation to environmental conditions. The feasibility, performances and computational complexity of the proposed digital predistortion are examined by simulations and experimentally. The proposed method is tuneable for achieving the best ratio of linearisation degree to computational complexity for any particular application.EThOS - Electronic Theses Online ServiceGBUnited Kingdo

Design and implementation of adaptive baseband predistorter for OFDM nonlinear transmitter. Simulation and measurement of OFDM transmitter in presence of RF high power amplifier nonlinear distortion and the development of adaptive digital predistorters based on Hammerstein approach.

The objective of this research work is to investigate, design and measurement of a digital predistortion linearizer that is able to compensate the dynamic nonlinear distortion of a High Power Amplifier (PA). The effectiveness of the proposed baseband predistorter (PD) on the performance of a WLAN OFDM transmitter utilizing a nonlinear PA with memory effect is observed and discussed. For this purpose, a 10W Class-A/B power amplifier with a gain of 22 dB, operated over the 3.5 GHz frequency band was designed and implemented. The proposed baseband PD is independent of the operating RF frequency and can be used in multiband applications. Its operation is based on the Hammerstein system, taking into account PA memory effect compensation, and demonstrates a noticeable improvement compared to memoryless predistorters. Different types of modelling procedures and linearizers were introduced and investigated, in which accurate behavioural models of Radio Frequency (RF) PAs exhibiting linear and nonlinear memory effects were presented and considered, based on the Wiener approach employing a linear parametric estimation technique. Three new linear methods of parameter estimation were investigated, with the aim of reducing the complexity of the required filtering process in linear memory compensation. Moreover, an improved wiener model is represented to include the nonlinear memory effect in the system. The validity of the PA modelling approaches and predistortion techniques for compensation of nonlinearities of a PA were verified by several tests and measurements. The approaches presented, based on the Wiener system, have the capacity to deal with the existing trade-off between accuracy and convergence speed compared to more computationally complex behavioural modelling algorithms considering memory effects, such as those based on Volterra series and Neural Networks. In addition, nonlinear and linear crosstalks introduced by the power amplifier nonlinear behaviour and antennas mutual coupling due to the compact size of a MIMO OFDM transmitter have been investigated

Transformer NN-based behavioral modeling and predistortion for wideband pas

Abstract. This work investigates the suitability of transformer neural networks (NNs) for behavioral modeling and the predistortion of wideband power amplifiers. We propose an augmented real-valued time delay transformer NN (ARVTDTNN) model based on a transformer encoder that utilizes the multi-head attention mechanism. The inherent parallelized computation nature of transformers enables faster training and inference in the hardware implementation phase. Additionally, transformers have the potential to learn complex nonlinearities and long-term memory effects that will appear in future high-bandwidth power amplifiers. The experimental results based on 100 MHz LDMOS Doherty PA show that the ARVTDTNN model exhibits superior or comparable performance to the state-of-the-art models in terms of normalized mean square error (NMSE) and adjacent channel power ratio (ACPR). It improves the NMSE and ACPR up to −37.6 dB and −41.8 dB, respectively. Moreover, this approach can be considered as a generic framework to solve sequence-to-one regression problems with the transformer architecture