Dynamic Voltage Scaling Techniques for Power Efficient Video Decoding

This paper presents a comparison of power-aware video decoding techniques that utilize dynamic voltage scaling (DVS). These techniques reduce the power consumption of a processor by exploiting high frame variability within a video stream. This is done through scaling of the voltage and frequency of the processor during the video decoding process. However, DVS causes frame deadline misses due to inaccuracies in decoding time predictions and granularity of processor settings used. Four techniques were simulated and compared in terms of power consumption, accuracy, and deadline misses. In addition, this paper proposes the frame-data computation aware (FDCA) technique, which is a useful power-saving technique not only for stored video but also for real-time video applications. The FDCA method is compared with the GOP, Direct, and Dynamic methods, which tend to be more suited for stored video applications. The simulation results indicated that the Dynamic per-frame technique, where the decoding time prediction adapts to the particular video being decoded, provides the most power saving with performance comparable to the ideal case. On the other hand, the FDCA method consumes more power than the Dynamic method but can be used for stored video and real-time time video scenarios without the need for any preprocessing. Our findings also indicate that, in general, DVS improves power savings, but the number of deadline misses also increase as the number of available processor settings increases. More importantly, most of these deadline misses are within 10–20% of the playout interval and thus have minimal affect on video quality. However, video clips with high variability in frame complexities combined with inaccurate decoding time predictions may degrade the video quality. Finally, our results show that a processor with 13 voltage/frequency settings is sufficient to achieve near maximum performance with the experimental environment and the video workloads we have used

A New Quality of Service Metric for Hard/Soft Real-Time Applications

Real-time applications often have mixed hard and soft deadlines, can be preempted subject to the cost of context switching or the restart of computation, and have various data dependency. The simple but widely used task completion ratio, as the Quality of Service (QoS) metric, does not capture these characteristics and can not reflect user perceived QoS well. In this paper, we propose a new quantitative QoS metric, which is based on task completion ratio but differentiates hard and soft deadlines and models data dependency as well. Basically, it assigns different weights to hard and soft deadline tasks, penalizes late soft task completion, and measures the tasks affected by any dropped tasks. We apply popular online schedulers, such as EDF (earliest deadline first), FCFS (first come first serve), and LETF (least execution time first), on a set of simulated MPEG movies at the frame level and for each application compare the new QoS measurement, traditional completion ratio with the “real” completion ratio which considers the number of correctly decoded frames and has been mapped to the user perceived QoS well. Experimental results show that our proposed QoS metric can reflect real life QoS much better than the traditional one

QOS-DRIVEN SCHEDULING FOR MULTIMEDIA APPLICATIONS

Multimedia applications have intrinsic quality of service (QoS) requirements that may not be captured by the simple traditional completion ratio model. We have proposed a new quantitative QoS metric based on task completion ratio while differentiating firm and soft deadlines and taking data dependency into consideration. Using the decoding of MPEG movies as an example, we have shown that the proposed QoS metric is much better than completion ratio in measuring the quality of presentation (QoP) of the movies. Based on the new QoS metric, we present a set of new online algorithms that outperform popular scheduling algorithms (such as EDF, FCFS, and LETF) and enhance QoP significantly, particularly when the system is overloaded. All the proposed online algorithms have low computation overhead and can be easily integrated into real-time operating systems to improve multimedia embedded system’s performance and/or to save system resources

Dynamic Voltage Scaling Techniques for Power Efficient Video Decoding

This paper presents a comparison of power-aware video decoding techniques that utilize dynamic voltage scaling (DVS). These techniques reduce the power consumption of a processor by exploiting high frame variability within a video stream. This is done through scaling of the voltage and frequency of the processor during the video decoding process. However, DVS causes frame deadline misses due to inaccuracies in decoding time predictions and granularity of processor settings used. Four techniques were simulated and compared in terms of power consumption, accuracy, and deadline misses. In addition, this paper proposes the frame-data computation aware (FDCA) technique, which is a useful power-saving technique not only for stored video but also for real-time video applications. The FDCA method is compared with the GOP, Direct, and Dynamic methods, which tend to be more suited for stored video applications. The simulation results indicated that the Dynamic per-frame technique, where the decoding time prediction adapts to the particular video being decoded, provides the most power saving with performance comparable to the ideal case. On the other hand, the FDCA method consumes more power than the Dynamic method but can be used for stored video and real-time time video scenarios without the need for any preprocessing. Our findings also indicate that, in general, DVS improves power savings, but the number of deadline misses also increase as the number of available processor settings increases. More importantly, most of these deadline misses are within 10–20% of the playout interval and thus have minimal affect on video quality. However, video clips with high variability in frame complexities combined with inaccurate decoding time predictions may degrade the video quality. Finally, our results show that a processor with 13 voltage/frequency settings is sufficient to achieve near maximum performance with the experimental environment and the video workloads we have used

QoP-Driven Scheduling for MPEG Video Decoding

MPEG video decoding algorithm has been embedded into many consumer electronic products. In this paper, we demonstrate that the completion ratio (CR) does not represent well the quality of presentation (QoP) of MPEG video. We then propose a new QoP metric, which 1) is based on frame completion ratio but 2) differentiates firm and soft deadlines and also 3) considers the frame dependency. We show that, on a set of simulated MPEG movies, the proposed QoP metric measures the QoP of the movies much better than the completion ratio. We then present a set of online scheduling algorithms that enhance QoP significantly, particularly for overloaded systems

Power Analysis and Optimization Techniques for Energy Efficient Computer Systems

Reducing power consumption has become a major challenge in the design and operation of to-day’s computer systems. This chapter describes different techniques addressing this challenge at different levels of system hardware, such as CPU, memory, and internal interconnection network, as well as at different levels of software components, such as compiler, operating system and user applications. These techniques can be broadly categorized into two types: Design time power analysis versus run-time dynamic power management. Mechanisms in the first category use ana-lytical energy models that are integrated into existing simulators to measure the system’s power consumption and thus help engineers to test power-conscious hardware and software during de-sign time. On the other hand, dynamic power management techniques are applied during run-time, and are used to monitor system workload and adapt the system’s behavior dynamically to save energy

Комп’ютер з мінімальним енергоспоживанням

Робота публікується згідно наказу ректора від 29.12.2020 р. №580/од "Про розміщення кваліфікаційних робіт вищої освіти в репозиторії НАУ". Керівник проекту: доцент, к.т.н., Єфимець Валентин МикитовичСпоживання енергії є обов'язковою умовою існування людства. Наявність доступної для споживання енергії завжди було необхідною умовою для задоволення потреб людини, збільшення тривалості та поліпшення умов його життя. У сучасному світі енергетика є основою розвитку базових галузей промисловості, що визначають прогрес суспільного виробництва. В усіх промислово розвинених країнах темпи розвитку енергетики випереджали темпи розвитку інших галузей. У той же час енергетика - одне з джерел несприятливого впливу на навколишнє середовище і людину. Вона впливає на атмосферу (споживання кисню, викиди газів, вологи і твердих частинок), гідросферу (споживання води, створення штучних водоймищ, скиди забруднених і нагрітих вод, рідких відходів) і на літосферу (споживання викопних палив, зміна ландшафту, викиди токсичних речовин) . Незважаючи на зазначені фактори негативного впливу енергетики на навколишнє середовище, зростання споживання енергії не викликало особливої тривоги у широкої громадськості. Так тривало до середини 70-х років, коли в руках фахівців виявилися численні дані, що свідчать про сильний антропогенний тиск на кліматичну систему, що таїть загрозу глобальної катастрофи при неконтрольованому зростанні енергоспоживання. З тих пір жодна інша наукова проблема не привертає такої пильної уваги, як проблема справжніх, а особливо майбутніх змін клімату. Вважається, що однією з головних причин цієї зміни є енергетика. Під енергетикою при цьому розуміється будь-яка область людської діяльності, пов'язана з виробництвом і споживанням енергії

Workload model for video decoding and its applications

Ph.DDOCTOR OF PHILOSOPH

Using hierarchical scheduling to support soft real-time applications in general-purpose operating systems

Journal ArticleThe CPU schedulers in general-purpose operating systems are designed to provide fast response time for interactive applications and high throughput for batch applications. The heuristics used to achieve these goals do not lend themselves to scheduling real-time applications, nor do they meet other scheduling requirements such as coordinating scheduling across several processors or machines, or enforcing isolation between applications, users, and administrative domains. Extending the scheduling subsystems of general-purpose operating systems in an ad hoc manner is time consuming and requires considerable expertise as well as source code to the operating system. Furthermore, once extended, the new scheduler may be as inflexible as the original. The thesis of this dissertation is that extending a general-purpose operating system with a general, heterogeneous scheduling hierarchy is feasible and useful. A hierarchy of schedulers generalizes the role of CPU schedulers by allowing them to schedule other schedulers in addition to scheduling threads. A general, heterogeneous scheduling hierarchy is one that allows arbitrary (or nearly arbitrary) scheduling algorithms throughout the hierarchy. In contrast, most of the previous work on hierarchical scheduling has imposed restrictions on the schedulers used in part or all of the hierarchy. This dissertation describes the Hierarchical Loadable Scheduler (HLS) architecture, which permits schedulers to be dynamically composed in the kernel of a general-purpose operating system. The most important characteristics of HLS, and the ones that distinguish it from previous work, are that it has demonstrated that a hierarchy of nearly arbitrary schedulers can be efficiently implemented in a general-purpose operating system, and that the behavior of a hierarchy of soft real-time schedulers can be reasoned about in order to provide guaranteed scheduling behavior to application threads. The flexibility afforded by HLS permits scheduling behavior to be tailored to meet complex requirements without encumbering users who have modest requirements with the performance and administrative costs of a complex scheduler. Contributions of this dissertation include the following. (1) The design, prototype implementation, and performance evaluation of HLS in Windows 2000. (2) A system of guarantees for scheduler composition that permits reasoning about the scheduling behavior of a hierarchy of soft real-time schedulers. Guarantees assure users that application requirements can be met throughout the lifetime of the application, and also provide application developers with a model of CPU allocation to which they can program. (3) The design, implementation, and evaluation of two augmented CPU reservation schedulers, which provide increase scheduling predictability when low-level operating system activity steals time from applications