Configurable 3D-integrated focal-plane sensor-processor array architecture

A mixed-signal Cellular Visual Microprocessor architecture with digital processors is described. An ASIC implementation is also demonstrated. The architecture is composed of a regular sensor readout circuit array, prepared for 3D face-to-face type integration, and one or several cascaded array of mainly identical (SIMD) processing elements. The individual array elements derived from the same general HDL description and could be of different in size, aspect ratio, and computing resources

Measuring Incremental SB743 Progress: Accounting for Project Contributions Towards Reducing VMT Under California\u27s Senate Bill 743

On September 27, 2013, California’s governor signed Senate Bill (SB) 743 into law, in part mandating the transition from a level-of-service-based (LOS) measure of transportation environmental impacts to a vehicle-miles-traveled-based (VMT) one in compliance with the California Environmental Quality Act (CEQA). Several California jurisdictions, including San Jose, Pasadena, and San Francisco, have moved quickly to comply with SB 743, so it is no surprise that several of these early-adopter cities have been working hard to develop powerful VMT estimation methods and tools using the most recent research available. This perspective uses the experiences of an early-adopter city, San Jose, to identify and illustrate the challenges faced by California planners trying to meet the legal requirements of SB 743 and the practical needs of their communities in developing the VMT calculation methods

A Benes Based NoC Switching Architecture for Mixed Criticality Embedded Systems

Multi-core, Mixed Criticality Embedded (MCE) real-time systems require high timing precision and predictability to guarantee there will be no interference between tasks. These guarantees are necessary in application areas such as avionics and automotive, where task interference or missed deadlines could be catastrophic, and safety requirements are strict. In modern multi-core systems, the interconnect becomes a potential point of uncertainty, introducing major challenges in proving behaviour is always within specified constraints, limiting the means of growing system performance to add more tasks, or provide more computational resources to existing tasks. We present MCENoC, a Network-on-Chip (NoC) switching architecture that provides innovations to overcome this with predictable, formally verifiable timing behaviour that is consistent across the whole NoC. We show how the fundamental properties of Benes networks benefit MCE applications and meet our architecture requirements. Using SystemVerilog Assertions (SVA), formal properties are defined that aid the refinement of the specification of the design as well as enabling the implementation to be exhaustively formally verified. We demonstrate the performance of the design in terms of size, throughput and predictability, and discuss the application level considerations needed to exploit this architecture

Hardware development for the surface tension driven convection experiment aboard the USML-1 spacelab mission

The Surface Tension Driven Convection Experiment is a Space Transportation System flight experiment to study both transient and steady thermocapillary fluid flows aboard the USML-1 Spacelab mission planned for March 1992. Hardware is under development to establish the experimental conditions and perform the specified measurements, for both ground based research and the flight experiment in a Spacelab single rack. Major development areas include an infrared thermal imaging system for surface temperature measurement, a CO2 laser and control system for surface heating, and for flow visualization, a He-Ne laser and optical system in conjunction with an intensified video camera. For ground based work the components of each system were purchased or designed, and tested individually. The three systems will be interfaced with the balance of the experimental hardware and will constitute a working engineering model. A description of the three systems and examples of the component performance is given along with the plans for the development of flight hardware

Radiation Risks and Mitigation in Electronic Systems

Electrical and electronic systems can be disturbed by radiation-induced effects. In some cases, radiation-induced effects are of a low probability and can be ignored; however, radiation effects must be considered when designing systems that have a high mean time to failure requirement, an impact on protection, and/or higher exposure to radiation. High-energy physics power systems suffer from a combination of these effects: a high mean time to failure is required, failure can impact on protection, and the proximity of systems to accelerators increases the likelihood of radiation-induced events. This paper presents the principal radiation-induced effects, and radiation environments typical to high-energy physics. It outlines a procedure for designing and validating radiation-tolerant systems using commercial off-the-shelf components. The paper ends with a worked example of radiation-tolerant power converter controls that are being developed for the Large Hadron Collider and High Luminosity-Large Hadron Collider at CERN.Comment: 19 pages, contribution to the 2014 CAS - CERN Accelerator School: Power Converters, Baden, Switzerland, 7-14 May 201

PMU-Based ROCOF Measurements: Uncertainty Limits and Metrological Significance in Power System Applications

In modern power systems, the Rate-of-Change-of-Frequency (ROCOF) may be largely employed in Wide Area Monitoring, Protection and Control (WAMPAC) applications. However, a standard approach towards ROCOF measurements is still missing. In this paper, we investigate the feasibility of Phasor Measurement Units (PMUs) deployment in ROCOF-based applications, with a specific focus on Under-Frequency Load-Shedding (UFLS). For this analysis, we select three state-of-the-art window-based synchrophasor estimation algorithms and compare different signal models, ROCOF estimation techniques and window lengths in datasets inspired by real-world acquisitions. In this sense, we are able to carry out a sensitivity analysis of the behavior of a PMU-based UFLS control scheme. Based on the proposed results, PMUs prove to be accurate ROCOF meters, as long as the harmonic and inter-harmonic distortion within the measurement pass-bandwidth is scarce. In the presence of transient events, the synchrophasor model looses its appropriateness as the signal energy spreads over the entire spectrum and cannot be approximated as a sequence of narrow-band components. Finally, we validate the actual feasibility of PMU-based UFLS in a real-time simulated scenario where we compare two different ROCOF estimation techniques with a frequency-based control scheme and we show their impact on the successful grid restoration.Comment: Manuscript IM-18-20133R. Accepted for publication on IEEE Transactions on Instrumentation and Measurement (acceptance date: 9 March 2019

Digital implementation of the cellular sensor-computers

Two different kinds of cellular sensor-processor architectures are used nowadays in various applications. The first is the traditional sensor-processor architecture, where the sensor and the processor arrays are mapped into each other. The second is the foveal architecture, in which a small active fovea is navigating in a large sensor array. This second architecture is introduced and compared here. Both of these architectures can be implemented with analog and digital processor arrays. The efficiency of the different implementation types, depending on the used CMOS technology, is analyzed. It turned out, that the finer the technology is, the better to use digital implementation rather than analog

Power electronics for a 1-kilowatt arc jet thruster

After more than two decades, new space mission requirements have revived interest in arcjet systems. The preliminary development and demonstration of new, high efficiency, power electronic concepts for start up and steady state control of dc arcjets is reported. The design comprises a pulse width modulated power converter which is closed loop configured to give fast current control. An inductor, in series with the arcjet, serves the dual role of providing instantaneous current control, as well as a high voltage arc ignition pulse. Benchmark efficiency, transient response, regulation, and ripple data are presented. Tests with arcjets demonstrate that the power electronics breadboard can start thrusters consistently with no apparent damage and transfer reliably to the nondestructive high voltage arc mode in less than a second