123 research outputs found

    Effects of annealing temperature and gas on pentacene OTFTs with HfLaO as gate dielectric

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    Pentacene organic thin-film transistors (OTFTs) with high-κ HfLaO as gate insulator were fabricated. HfLaO film was prepared by sputtering method. To improve the film quality, the dielectric was annealed in N 2, NH 3, or O 2 at two temperatures, i.e., 200 °C and 400 °C, respectively. The I-V characteristics of the OTFTs and C-V characteristics of corresponding organic capacitors were measured. The OTFTs could operate at a low operating voltage of below 5 V, and the dielectric constant of the HfLaO film could be above ten. For all the annealing gases, the OTFTs annealed at 400 °C achieved higher carrier mobility than their counterparts annealed at 200 °C (with the one annealed in NH 3 at 400 °C showing the highest carrier mobility of 0.45 cm 2/ V·s), which could be supported by SEM images which indicate that pentacene tended to form larger grains on HfLaO annealed at 400 °C than on that annealed at 200 °C. The C-V measurement of the organic capacitors indicated that the localized charge density in the organic semiconductor/oxide was lower for the 400 °C annealing than for the 200 °C annealing. Furthermore, through the characterization of gate current leakage, HfLaO film annealed at 400 °C achieved much smaller leakage than that annealed at 200 °C. Since the maximum processing temperature of ITO glass substrates is around 400 °C , this study shows that 400 °C is suitable for the annealing of HfLaO film in high-performance OTFTs on glass substrate. © 2011 IEEE.published_or_final_versio

    Improved performance for OTFT with HfTiO2 as gate dielectric by N2O annealing

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    OTFTs with HfTiO 2 as gate dielectric have been successfully fabricated. The devices show small threshold voltage and subthreshold slope, and thus are suitable for low-voltage and low-power applications. This work also finds that OTFT with gate dielectric annealed in N 2O has larger dielectric constant, smaller threshold voltage, smaller subthreshold slope and larger on/off ratio than the N 2-annealed sample. This demonstrates that the N 2O annealing is an important surface treatment for preparing a high-quality insulator/organic interface. © 2007 IEEE.published_or_final_versio

    Pentacene thin-film transistors with HfO2 gate dielectric annealed in NH3 or N2O

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    Pentacene-based Organic Thin-Film Transistor (OTFT) with HfO 2 as gate dielectric is studied in this work. The HfO2 dielectric was prepared by RF sputtering at room temperature, and subsequently annealed in N 2O or NH 3 at 200 °C. The OTFTs were characterized by IV measurement and 1/f noise measurement. The OTFTs show small threshold voltage and can operate at as low as 3 V. Results indicate that the OTFT annealed in NH 3 shows higher carrier mobility, larger on/off current ratio, smaller sub-threshold swing and smaller Hooge parameter than the OTFT annealed in N 2O. Therefore, NH 3-annealed HfO 2 is a promising gate dielectric for the fabrication of high-performance OTFTs. © 2008 IEEE.published_or_final_versio

    Fabrication and electrical characterization of Organic Field-Effect Transistor based on CSA doped PANi-Ta2O5 nanocomposite

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    Top-contact, bottom-gate organic field-effect transistors (OFETs) based on Polyaniline (PANi)-Tantalum Pentoxide (Ta2O5) nanocomposite doped with Camphor Sulphonic Acid (CSA) as the active semiconductor layer and Poly Methyl Methacrylate (PMMA) as the gate dielectric were investigated. Gold was thermally evaporated for the top source and drain contacts of 80-90 nm thickness with a conducting channel of 1 mm length and 1cm width. A relatively good charge carrier mobility of  0.12 cm2/V-s was achieved. This may be ascribed to the highly crystalline nature of the nanocomposite, the diminished contact resistance due to the long channel and the symbiosis developed between the organic semiconductor and the polymer dielectric. The smaller source-to-drain current and high saturation drain voltage may be accounted for the long channel effect. The device exhibited a threshold voltage of   -12.89 V, a moderate current on/off ratio of ~103 and a subthreshold swing of 9.3 V/dec. The agglomerated globular morphology of the PANi nanocomposite and the high carrier mobility can immensely contribute towards using the OFET device for room-temperature based application, particularly in the gas sensing field

    Effects of Annealing Time on the Performance of OTFT on Glass with ZrO 2

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    Copper phthalocyanine-based organic thin-film transistors (OTFTs) with zirconium oxide (ZrO2) as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2 at different durations (5, 15, 40, and 60 min) to investigate the effects of annealing time on the electrical properties of the OTFTs. Experimental results show that the longer the annealing time for the OTFT, the better the performance. Among the devices studied, OTFTs with gate dielectric annealed at 350°C in N2 for 60 min exhibit the best device performance. They have a small threshold voltage of −0.58 V, a low subthreshold slope of 0.8 V/decade, and a low off-state current of 0.73 nA. These characteristics demonstrate that the fabricated device is suitable for low-voltage and low-power operations. When compared with the TFT samples annealed for 5 min, the ones annealed for 60 min have 20% higher mobility and nearly two times smaller the subthreshold slope and off-state current. The extended annealing can effectively reduce the defects in the high-k film and produces a better insulator/organic interface. This results in lower amount of carrier scattering and larger CuPc grains for carrier transport

    Application of ultrasonic sprayed zirconium oxide dielectric in zinc tin oxide-based thin film transistor

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    project IUT194 UID/CTM/50025/2019 project TK141 Grant Agreement 17161 SFRH/BD/116047/2016Solution processing of metal oxides has been the focal point of interest for many researchers mainly because of the cost effectiveness and improved properties of metal oxides. However, achieving uniform and high-quality film deposition has been a recurring challenge using various wet-chemical techniques. Herein, we report a fully solution-based fabrication process exploiting both the ultrasonic spray pyrolysis (USP) and spin coating techniques owing to their simplicity, high degree of freedom for mixing metal oxide precursor salt, and larger area deposition. An amorphous zirconium oxide (ZrOx) dielectric and zinc tin oxide (ZTO) semiconductor were deposited, respectively. The dielectric characteristics of the ZrOx thin films were accessed by fabricating MIS-devices for the samples deposited at 200 °C and 400 °C, which exhibited a capacitance of 0.35 and 0.67 μF cm−2 at 100 kHz and relative permittivity of 8.5 and 22.7, respectively. The ZrOx thin film was then integrated as the gate dielectric layer in ZTO solution-processed thin film transistors, exhibiting a high electrical performance with low hysteresis (−0.18 V), high on/off current ratio of 106 orders of magnitude, saturation mobility of 4.6 cm2 V s−1, subthreshold slope of 0.25 V dec−1, and operating at a low voltage window of 3 V. Based on these results, the as-fabricated ZTO/ZrOx TFT opens the potential application of solution-processed transistors for low-cost electronic devices.publishersversionpublishe

    Organic transistors based on pentacene and dibenzothiophene derivatives

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    This thesis is concerned with the fabrication and characterisation of organic thin film transistors. Initially, pentacene thin films were investigated, with results comparable to those found in published literature. Initial studies of pentacene transistors revealed a poor hole mobility of 6.3 x 10(^-3) cm(^2)/V/s. Improvements in the fabrication process (using a more conductive silicon wafer as the gate, and treating the silicon oxide surface with a silanising agent) increased the mobility to around 0.1 cm(^2)/V/s. Better pentacene deposition conditions allowed a polycrystalline structure to form, with dendritic grains of the order of 2-3 pm in size. This increased the mobility of the transistor further, to 0.54 cm(^2)/V/s. Treatment of the silicon oxide surface prior to pentacene deposition was found to affect significantly the hysteresis in the transfer characteristics. Removal of photoresist with acetone and propan-2-ol prior to pentacene deposition resulted in fairly large threshold voltages, with an average shift between the off-on and on-off threshold voltages of 9.7 V. Application of an oxygen plasma prior to deposition resulted in decreased threshold voltages, and a reduced threshold voltage shift of 3.8 V. The hysteresis was attributed to charge trapping on the oxide surface due to organic contamination; the oxygen plasma served to reduce this. X-Ray Photoelectron Spectroscopy measurements confirmed this - following a plasma treatment, the carbon content on the surface was reduced significantly. Incorporation of a layer of gold nanoparticles between the oxide and pentacene was found to provide charge traps - this might be exploited in memory devices. Replacing the silicon oxide with PMMA produced favorable results. Negative threshold voltages with low hysteresis were observed for all the devices. Mobilities of up to 0.21 cm(^2)/V/s were recorded for devices with a 124 nm PMMA layer; a thinner (80 nm) layer of PMMA resulted in reduced mobility, as did a thicker (350 nm) layer. Replacing the silicon oxide with sputtered hafnium oxide produced devices with a large number of defects. Deposited pentacene did not form optimal crystal structures, and the output characteristics of a number of devices showed no significant variation with source-drain voltage. These output characteristics were therefore assumed to be the result of leakage through the oxide. The measured device that showed reasonable output characteristics was found to have a mobility of 0.59 cm(^2)/V/s demonstrating that hafnium oxide could have good potential as a dielectric, if deposited in a manner not resulting in a leaky oxide. Three dibenzothiophene-based molecules, synthesised in the University of Durham, were characterised and thin film transistors fabricated. 3,7-bis(dibenzothiophene-4-yl)-dibenzothiophene-5',S'-dioxide exhibited the characteristics of an air-stable n-type device, with a mobility of 3.5 x 10(^-6)cm(^2)/V/s. A related molecule, 3,7-bis(4-(ethylsulfonyl)phenyl)dibenzo[b,d]jthiophene, incorporating additional electron-deficient groups, did not exhibit any field-effect modified behaviour. A third molecule, that did not contain electron-deficient groups, exhibited p-type behaviour, and transistors showed good output characteristics, but only possessed a mobility of 3.7 x 10(^5) cm(^2)/V/s; the low mobility was attributed to the lack of long-range order in the structure of the deposited film

    Electrolyte Gated Metal Oxide Transistors

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    L’invention du transistor a significativement affectée le progrès technique et scientifique de notre société. Depuis plus de 50 ans, les transistors sont utilisés comme composants actifs dans les circuits électroniques, pour réaliser des amplificateurs ou des interrupteurs par exemple. La plus fascinante des directions futures pour le développement des transistors consiste en leur utilisation dans des dispositifs électroniques flexibles, légers et biocompatibles. Les oxydes métalliques semi-conducteurs ont été intensivement étudiés au cours des dernières décennies pour des applications dans les transistors, du fait de la grande mobilité de leurs porteurs de charges (∼1– 100 cm2V-1s-1), de leur importante transparence optique, de leur stabilité chimique ainsi que de leur faible coût de fabrication. Les oxydes métalliques sont divisés entre les oxydes de transition et ceux post-transition, dépendamment des métaux, qui possèdent différentes configurations électroniques et donc différentes conductivités. Dans cette thèse, nous allons nous concentrer sur les deux principaux représentants des oxydes métalliques de transition et post-transition, i.e., le TiO2 et le SnO2, utilisés comme matériaux de canal dans des transistors utilisant un électrolyte comme diélectrique à la grille. Le TiO2 et le SnO2 sont abondants et biointégrables, possèdent une large bande interdite (3-4 eV), et peuvent être utilisés comme canal de transistor pour de nombreuses applications différentes. Remplacer le diélectrique conventionnel dans les transistors à couche minces par un électrolyte donne l’opportunité de décroître le voltage auquel le transistor est opéré du fait de la haute capacitance de la double couche électrique (autour de 10 μF/cm2) qui se forme à l’interface entre l’électrolyte et le semi-conducteur. Cette capacitance élevée permet l’accumulation d’une importante densité de porteurs de charges dans le canal et rend donc possible la transition entre un état isolant et un état semi-conducteur voire métallique. Les transistors utilisant un électrolyte comme diélectrique à la grille (EGTs) peuvent être employés comme éléments de matrice active pour les écrans à faible puissance ou encore intégrés dans des textiles ou d’autres matériaux flexibles. Les EGTs peuvent aussi être utilisés dans d'autres applications prometteuses que sont telles les capteurs chimiques ou biologiques, du fait de leur haute sensibilité aux ions et de leur compatibilité avec les électrolytes aqueux. Le coeur de cette thèse est dévoué à une meilleure compréhension des mécanismes d’opération d’une importante classe de transistors à couche minces, i.e. les transistors à oxydes métalliques v utilisant un électrolyte comme diélectrique à la grille, afin d’optimiser leurs performances et de développer des agencements géométriques pour permettre d’obtenir des transistors à haute performance. Les EGTs consistent en un canal en oxyde métallique et en une électrode de grille en contact avec un électrolyte. L’application d’un voltage à la grille entraîne la formation d’une double couche électrique au niveau de l’interface entre le canal et l’électrolyte, qui permet de moduler la densité des porteurs de charges dans le canal. Les mécanismes de dopage et la modulation de la densité des porteurs de charges dans les EGTs ont été étudiés par caractérisation électrique des transistors, par voltammétrie cyclique (CV) ainsi que par spectroscopie d’impédance électrochimique. Des transistors SnO2 et TiO2 utilisant des liquides ioniques à la grille ont été fabriqués sur des substrats en silicone. Une méthode de gravure non conventionnelle utilisant le parylène a été utilisée pour étudier le rôle joué par l’extension des interfaces électrolyte/semi-conducteur et électrode/semi-conducteur sur le dopage ainsi que sur les processus de transport des porteurs de charges. Le chevauchement entre les électrodes métalliques et le semi-conducteur, qui est en contact avec l’électrolyte, affecte le processus d’injection des charges. La gravure a entraîné l’augmentation de la densité des porteurs de charges d’un à deux ordres de magnitude dans les deux oxydes métalliques. De plus, les EGTs à SnO2 ont été fabriqués sur des substrats flexibles en polyimide. Les transistors EGTs à SnO2 flexibles possèdent de bonnes propriétés électriques lorsqu’ils sont pliés selon différents rayons de courbure et ils pourraient posséder un fort potentiel pour des applications dans le domaine de l’électronique flexible. Les effets de la structure et de la morphologie des semi-conducteurs sur les performances des transistors ont été étudiés. Dans ce but, des films de TiO2 poreux à très forte densité ont été fabriqués par traitement à partir d’une solution ainsi que par évaporation par faisceau d’électrons. Les EGTs à TiO2 faits par évaporation possédaient un courant plus élevé ainsi qu’un ratio on/off plus haut du fait d’une meilleure qualité de la structure. Les effets des gros cations [EMIM] et des petits cations Li+ sur les mécanismes de dopage ont été étudiés en utilisant deux électrolytes [EMIM][TFSI] et [EMIM][TFSI] mélangé avec un sel de lithium. Les relativement gros cations [EMIM] ne peuvent pas pénétrer à l’intérieur du maillage cristallin du TiO2. L’intercalation de petits cations comme le Li+ a été rendue possible à la fois dans les films denses et dans les films mésoporeux de TiO2 par réduction de la vitesse de balayage dans les mesures courant/voltage. vi Les mécanismes de transport des charges des transistors utilisant un électrolyte comme diélectrique à la grille ont été étudiés et une corrélation entre la capacitance de la double couche, la densité des porteurs de charges, la mobilité des électrons, la tension seuil et le ratio on/off a été démontrée. Nous pensons que nos transistors à oxydes métalliques utilisant un électrolyte comme diélectrique à la grille sont prometteurs pour de l’électronique flexible, produite sur de grandes surfaces et à faible coût. ---------- The invention of the transistor has significantly affected the technological and scientific progress of our society. For over 50 years, transistors have been used as the active components, such as amplifiers or switches, in electronic circuits. The most fascinating future direction for transistor development is towards flexible, lightweight and biocompatible electronics. Metal oxide semiconductors have been intensively investigated over the past decades for transistor applications, due to their high charge carrier mobility (∼1– 100 cm2V-1s-1), high optical transparency, chemical stability and low-manufacturing cost. Metal oxides are divided into transition and post transition oxides, depending on the metals, which possess different electron configurations and, accordingly, different conductivity. In this Thesis we focus on two main representatives of transition and post transition metal oxides, i.e., TiO2 and SnO2, as the channel materials in electrolyte gated transistors. TiO2 and SnO2 are abundant and bio friendly, with high band gap (3-4 eV) and can be utilized as transistor channel for many different applications. Replacing the conventional dielectric in thin film transistors with electrolyte gives the opportunity to decrease the transistor operating voltage due to the high capacitance of the electrical double layer (around 10 μF/cm2) that form at the electrolyte/semiconductor interface. This high capacitance allows accumulation of high charge carrier density in the channel thus making possible a transition from an insulating state to semiconducting or metallic one. Electrolyte gated transistors (EGTs) can be utilized as backplanes for low powered displays and integrated into textiles or flexible materials. Other exciting applications of EGTs are chemical sensors or biosensors, due to the high sensitivity to ions and compatibility with aqueous electrolytes. The core of this thesis is devoted to a better understanding of the operational mechanisms of an important class of thin film transistors, i.e. electrolyte gated metal oxide transistors, to optimize their performance and to develop the appropriate device geometry for high performance transistors. EGTs consist of metal oxide channel and a gate electrode in contact with an electrolyte. The application of a gate electrical bias leads to the formation of an electrical double layer at the channel/electrolyte interface, which permits to modulate the charge carrier density in viii the channel. The doping mechanisms and the charge carrier density modulation in EGTs were investigated by transistor electrical characterization, cyclic voltammetry (CV) and electrochemical impedance spectroscopy. Ionic liquid gated SnO2 and TiO2 transistors were fabricated on silicon substrates. Parylene patterning was utilized to investigate the role played by the extension of the electrolyte/semiconductor and electrode/semiconductor interfaces on the doping and charge carrier transport processes. The overlap between the metal electrodes and the semiconductor, which is in contact with the electrolyte, affects the charge injection process. By patterning the charge carrier density was increased on one or two order of magnitude in both metal oxide materials. Moreover, SnO2 EGTs were fabricated on flexible polyimide substrate. EGT SnO2 flexible transistors possessed good electrical properties under bending at different radius and could have high potential in flexible electronics. The effect of structure and morphology of semiconductors on transistor performance was demonstrated. For this purpose, porous and highly dense films of TiO2 were fabricated by solution processing and by electron beam evaporation. Evaporated TiO2 EGT showed higher current and higher on/off ratio due to better structural quality. The effect of big [EMIM] and small Li+ cation on doping mechanisms was investigated by using two electrolytes [EMIM][TFSI] and [EMIM][TFSI] mixed with a lithium salt. The relatively large [EMIM] cation cannot enter the crystal lattice of TiO2. The intercalation of small cation such as Li+ was possible both in mesoporous and dense TiO2 films by decreasing the sweeping rate in current / voltage measurements. The charge transport mechanism of electrolyte gated transistors was investigated and a correlation between capacitance of the double layer, charge carrier density, electron mobility, threshold voltage and on/off ratio was demonstrated. We believe that our electrolyte gated metal oxide transistors are promising for low cost, flexible and large area electronics
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