Active Harmonic Elimination in Multilevel Converters

The modulation technique for multilevel converters is a key issue for multilevel converter control. The traditional pulse width modulation (PWM), space vector PWM, and space vector control methods do not completely eliminate specified harmonics. In addition, space vector PWM and space vector control method cannot be applied to multilevel converters with unequal DC voltages. The carrier phase shifting method for traditional PWM method also requires equal DC voltages. The number of harmonics that can be eliminated by the selective harmonic elimination method is restricted by the number of unknowns in the harmonic equations and available solutions. For these reasons, this thesis develops a new modulation control method which is referred to as the active harmonic elimination method to conquer some disadvantages for the existing methods. The active harmonic elimination method contributes to the existing methods because it not only generates the desired fundamental frequency voltage, but also completely eliminates any number of harmonics without the restriction of the number of unknowns in the harmonic equations and available solutions for the harmonic equations. Also the active harmonic elimination method can be applied to both equal DC voltage cases and unequal DC voltage cases. Another contribution of the active harmonic elimination method is that it simplifies the optimal system performance searching by making a tradeoff between switching frequency and harmonic distortion. Experiments on an 11-level multilevel converter validate the active harmonic elimination method for multilevel converters

A DSP controlled multi-level inverter providing DC-link voltage balancing, ride-through enhancement and common-mode voltage elimination

With the development of high performance power electronic and semiconductor technologies, Adjustable Speed Drive (ASD) systems are increasingly applied in residential, commercial and industrial applications. Due to the advantages at higher power ratings, the three-level Neutral-Point-Clamped (NPC) Voltage Source Inverter (VSI) is being employed in industrial and traction applications, static VAR compensation systems, active filtering and utility interconnection applications. The NPC-VSI is suitable for high voltage and high power applications due to the use of series-connected switching devices. Furthermore, Electro Magnetic Interference (EMI) and the voltage stress across the inverter switches and load can be reduced because of increased levels of the output voltages compared with the conventional 2-level inverters. However, an excessively high voltage may be applied to switching devices if the Neutral-Point (NP) voltage varies from the center voltage of the dc-bus voltage. This is the inherent problem caused by the unbalanced switching states of the NPC inverter. In addition, common-mode voltages may be generated by the NP voltage variation. In response to these drawbacks, various strategies including carrier-based PWM schemes and Space Vector Modulation (SVM) based PWM schemes have been proposed to balance the NP voltage. All the above methods can operate successfully under given operating conditions, but they do result in limitations in the performance. The major objective of this research is to investigate and enhance the application issues of the NPC-VSI including balancing the dc-bus voltage, in addition to reducing the common-mode voltage and improving the ride-through ability. Therefore, analysis of the NP voltage generation is presented and existing NP voltage balancing techniques are evaluated. It is found that common-mode voltage cancellation and NP voltage control are difficult to be realized at the same time, by the arithmetic methods. Thus, a hardware method to keep the NP voltage balanced is proposed and implemented while the mitigation of common-mode voltage is being implemented by an arithmetic method. In addition, the ride-through ability is also enhanced through the proposed topology. Correlation of the simulation and experimental results are provided

A Review on Modular Converter Topologies Based on WBG Semiconductor Devices in Wind Energy Conversion Systems

This paper presents a comprehensive review on the employment of wide bandgap (WBG) semiconductor power devices in wind energy conversion systems (WECSs). Silicon-carbide- (SiC) and gallium-nitride (GaN)-based power devices are highlighted and studied in this review, focusing on their application in the wind energy system. This is due to their premium characteristics such as the operation at high switching frequency, which can reduce the switching losses, and the capability to operate at high temperatures compared with silicon (Si)-based devices. These advantages promote the replacement of the conventional Si-based devices with the WBG semiconductor devices in the new modular converter topologies due to the persistent demand for a more-efficient power converter topology with lower losses and smaller sizes. The main objective of this paper was to provide a comprehensive overview of the WBG power devices commercially available on the market and employed in the modular converter topologies for renewable energy systems. The paper also provides a comparison between the WBG power technologies and the traditional ones based on the Si devices. The paper starts from the conventional modular power converter topology circuits, and then, it discusses the opportunities for integrating the SiC and WBG devices in the modular power converters to improve and enhance the system’s performance. Keywords: wind energy systems; power electronic converters; wide bandgap devices; modular converters; modular multilevel converters; multicarrier PWM technique

Contribución a técnicas de modelado y reducción de EMI en sistemas multiconvertidor

This Thesis has been developed in the research group TIEG (Terrassa Industrial Electronics Group). It is focused on the reduction of conducted electromagnetic interferences (EMI) generated by switched power converters. Particularly, it deals with multiphase buck converters. In such kind of systems interleaving is commonly and widely used because of advantages it reports. Among these advantages, it should be mentioned the reduction of the output voltage ripple and conducted disturbances as well. However, interleaving can be combined with other techniques in order to improve the electromagnetic compatibility (EMC) performance. These methods can be classified as filtering or suppression techniques. Filtering methods prevent interferences from propagating through mains, power lines, data lines, etc. Suppression methods directly suppress the noise source. The modulation of the switching pattern of the converter is one of such techniques. These suppression techniques are complementary to the conventional filtering techniques based in passive elements. The aim of this Thesis is to determine the optimum combination of both techniques (interleaving and modulation) in order to achieve the best attenuation of conducted disturbances. The influence of several modulation parameters on the attenuation will be investigated and the undesired side effects produced by these new techniques will be evaluated as well. In order to fulfil this goal, several modulation strategies were considered. Particularly, the switching frequency modulation (SFM), pulse position modulation (PPM) and pulse width modulation (PWM) have been investigated. Finally, three modulation techniques based on the frequency modulation of the switching pattern have been proposed. These techniques are the Constant Delay Tm with switching Frequency Modulation (CDFM-Tm), Constant Delay Tc with switching Frequency Modulation (CDFM-Tc) and Variable Delay with switching Frequency Modulation (VDFM). The experimental validation of these 3 techniques has been conducted on a 4 phases buck converter operated in hard switching regime.Esta tesis se ha desarrollado dentro de una de las líneas de investigación del Grupo de Electrónica Industrial de Terrassa (TIEG). Concretamente, se centra en el área de la reducción de las interferencias electromagnéticas conducidas (EMI), generadas por los convertidores de potencia. Dentro de este campo, se estudia el caso particular de los convertidores buck multifase. En este tipo de sistemas es común el uso de la técnica de interleaving que conlleva una serie de beneficios entre los que destaca la reducción del rizado de la tensión de salida y de las interferencias generadas. No obstante, es posible combinarla con otras técnicas para mejorar los resultados obtenidos desde el punto de vista de la compatibilidad electromagnética (EMC). En la actualidad existen diversos métodos para la reducción de las interferencias conducidas en convertidores de potencia que se pueden aplicar conjuntamente con la técnica de interleaving. Estos métodos se pueden clasificar como métodos de filtrado o supresión. Los primeros actúan evitando que las interferencias generadas se propaguen a través de las líneas de alimentación, datos, etc. Mientras que los segundos actúan directamente sobre las fuentes de ruido, reduciendo en origen las perturbaciones. Dentro de los métodos de supresión se encuentran las técnicas basadas en la modulación de la señal de control del convertidor. Estas técnicas de supresión son alternativas o complementarias a las técnicas de filtrado convencionales, basadas en elementos pasivos. El objetivo de la tesis es determinar la combinación óptima de estas dos técnicas (interleaving y modulación) en relación a la atenuación de las perturbaciones conducidas, cuantificando el efecto de diferentes parámetros de modulación sobre ésta. Por otro lado, también se desea evaluar los efectos no deseados producidos por estas nuevas técnicas. Para lograr este objetivo, se han evaluado diferentes estrategias de modulación que se pueden aplicar sobre la señal de control de los convertidores de potencia. En concreto, se han estudiado la modulación en frecuencia (SFM), la modulación de la posición del pulso (PPM) y la modulación por ancho de pulso (PWM). Por último, se han desarrollado tres técnicas de modulación basadas en la modulación en frecuencia de la señal de control, Constant Delay Tm with switching Frequency Modulation (CDFM-Tm), Constant Delay Tc with switching Frequency Modulation (CDFM-Tc) y Variable Delay with switching Frequency Modulation (VDFM). La validación experimental de las técnicas desarrolladas se ha llevado a cabo sobre un convertidor buck de 4 fases, operando en conmutación forzada

Articles indexats publicats per investigadors del Campus de Terrassa: 2013

Aquest informe recull els 228 treballs publicats per 177 investigadors/es del Campus de Terrassa en revistes indexades al Journal Citation Report durant el 2013Preprin

On modeling and control of multilevel converters and PLL algorithms.

Tesis (Doctorado en Control y Sistemas Dinámicos)"The present thesis is focuses in the study of the multilevel converters and the the phaselocked loop algorithms. In the first five chapters, two of the main topologies of multilevel converters are studied, namely, diode clamped multilevel converter (NPC) and cascaded H-bridge multilevel converter (HB). First, a model is obtained that described the dynamics of the three level NPC converter used in a synchronous rectifier application. The highly nonlinear model, originally in abc-coordinates, is also expressed in its ®¯°-coordinates. Special attention is given to the °-component of the control input, which represents a degree of freedom crucial for the balancing of the capacitors voltages. Then, based on this model, it is presented an adaptive controller that guarantees regulation and balance of the output capacitors voltages, as well as a close to unity power factor. Next, the modeling and the control design processes are presented for a cascade H-bridge single-phase multilevel converter used as a shunt active filter. Crucial for the developments is the transformation of the model in terms of the sum and the difference of the squares of the capacitors voltages. Moreover, it is shown that, while the current tracking problem and the regulation problem depend on the sum of the injected voltages, the balance depends on the difference between them. It is also presented a controller for the cascade H-bridge three-phase multilevel converter used as a shunt active filter. Based on the proposed mathematical model, the controller is designed to compensate harmonic distortion and reactive power due to a nonlinear distorting load. Simultaneously, the controller guarantees regulation and balance of all capacitor voltages. The idea behind the controller is to allow distortion of the current reference during the transients to guarantee regulation and balance of the capacitors voltages. The chapters 6 and 7 of the thesis deals with the design of phase-locked loop (PLL) algorithms. Although PLLs have been widely used in many electronic applications, the PLL presented here is of special interest in the synchronization of power electronic equipment coupled with the electric network. In particular, the presented PLL has been designed to work in fixed reference frame coordinates, and thus the proposed algorithm is referred as fixed reference frame PLL (FRF-PLL).

Analysis and Design of New Harmonic Mitigation Approaches

Numerous approaches have been proposed in order to resolve the problems of current harmonics in electrical distribution systems. The rapid development of power semiconductors along with the revolutionary advances on microprocessors consolidated the motor drives industry and with it a massive proliferation of non-linear loads. It was thought that these very same technological advances would trigger an explosive development of harmonic solutions based on power electronics. Moreover, the introduction of the instantaneous active and reactive power theory or the so-called p, q theory which simplifies and gives more robustness to the control strategies of active filters reinforced this idea. Three decades have passed since the first IGBT was introduced in early 1980s, and active harmonic solutions are not the first choice to solve harmonic pollution in electrical distribution systems, mainly due to the high cost and the perception of low reliability. Given this scenario, in this work two main approaches are explored. First, the combination of an asymmetric 18-pulse rectifier with a reduced KVA active harmonic filter to improve the performance under abnormal utility conditions. Second, an interleaved active harmonic filter using multiple inverters connected in parallel at the ac and dc size, which will allow for higher power ratings and power density increase. The performance issues of the asymmetric 18-pulse rectifier under unbalanced voltage and pre-existing harmonic components are analyzed, as well as the current distortion improvement, achieved when an active power filter is introduced. On the other hand, the high frequency harmonic cancellation when interleaved inverters are used, the circulation of zero-sequence current and the impact of interleaving on dc bus capacitor are analyzed. Finally, some methods to mitigate the low frequency circulating currents based on eliminating the zero-sequence component, and the introduction of common mode inductors to reduce the high frequency circulating current are studied. Without a doubt the search for new cost-effective topologies able to reach broader power levels and voltage ranges will continue emerging giving more alternatives to users. Moreover, extensive research on wide band gap devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN), with which it is possible to reach higher voltage breakdown and at least an order-of-magnitude lower switching losses, makes the future more promising for active solutions

Articles indexats publicats per investigadors del Campus de Terrassa: 2012

Aquest infrome recull els 221 treballs publicats per 216 investigadors/es del Campus de Terrassa en revistes indexades al Journal Citation Report durant el 2012Preprin

A multilevel converter with a floating bridge for open-ended winding motor drive application

In this thesis, a dual inverter topology is considered as an alternative to a multilevel converter for the control of high speed machines. Instead of feeding to one end of the stator with a single power converter, this topology feeds from both sides of the stator winding using two converters, thus achieving multilevel output voltage waveforms across the load. A large amount of published work in the area of open end winding power converter topologies are focused on symmetrical voltage sources. This published research recognises the advantages of the converter system in terms of increased reliability, improved power sharing capability and elimination of common mode voltages when compared to traditional single sided three phase converter solutions. However isolated DC supplies come with the price of additional components thus increase size, weight and losses of the converter system. The aim of this project is, therefore, to investigate on reducing size, weight and losses of the open end winding motor drive by eliminating the need for isolated supply as well to achieve multilevel output voltage waveform. A traditional open-end winding induction motor drive has been analysed in terms of weight and losses and it has been clearly identified that the isolation transformer not only increases the size and weight of a drive system but also includes additional losses. A modified dual inverter system has then been proposed where one of the bridge inverters is floating, thus eliminated the need for isolated supplies. An asymmetric DC voltage sources ratio of 2:1 is utilised to achieve multilevel output voltage waveform across the load. The switching sequences are also analysed to identify the charging and discharging sequences to achieve control over floating capacitor voltage. This thesis describes the theoretical derivation of the modified converter model and algorithms as well as experimental results from an 11kW laboratory prototype