98,578 research outputs found
Close-Packing of Clusters: Application to Al_100
The lowest energy configurations of close-packed clusters up to N=110 atoms
with stacking faults are studied using the Monte Carlo method with Metropolis
algorithm. Two types of contact interactions, a pair-potential and a many-atom
interaction, are used. Enhanced stability is shown for N=12, 26, 38, 50, 59,
61, 68, 75, 79, 86, 100 and 102, of which only the sizes 38, 75, 79, 86, and
102 are pure FCC clusters, the others having stacking faults. A connection
between the model potential and density functional calculations is studied in
the case of Al_100. The density functional calculations are consistent with the
experimental fact that there exist epitaxially grown FCC clusters starting from
relatively small cluster sizes. Calculations also show that several other
close-packed motifs existwith comparable total energies.Comment: 9 pages, 7 figure
Hydrogen and vacancy clustering in zirconium
The effect of solute hydrogen on the stability of vacancy clusters in
hexagonal closed packed zirconium is investigated with an ab initio approach,
including contributions of H vibrations. Atomistic simulations within the
density functional theory evidence a strong binding of H to small vacancy
clusters. The hydrogen effect on large vacancy loops is modeled through its
interaction with the stacking faults. A thermodynamic modeling of H segregation
on the various faults, relying on ab initio binding energies, shows that these
faults are enriched in H, leading to a decrease of the stacking fault energies.
This is consistent with the trapping of H by vacancy loops observed
experimentally. The stronger trapping, and thus the stronger stabilization, is
obtained for vacancy loops lying in the basal planes, i.e. the loops
responsible for the breakaway growth observed under high irradiation dose.Comment: submitte
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Fault tolerance in super-scalar and VLIW processors
In this paper, we present a method for utilizing the spare capacity in super-scalar and very long instruction word (VLIW) processors to tolerate functional unit failures. Unlike previous work that was primarily interested in detection of transient faults, we are concerned with more permanent and/or intermittent faults which necessitate processor reconfiguration. Our method utilizes the VLIW compiler or the superscalar scheduler to insert redundant operations whenever idle functional units exist. The results of these redundant operations are used to detect and diagnose functional unit failures. For super-scalar processors, the scheduler can then utilize this information to ensure that operations are performed only on non-faulty units. In VLIW processors, this is equivalent to recompiling the code to run on the remaining non-faulty functional units. Since in certain applications, recompilation may not be possible, we consider two alternative reconfiguration strategies for VLIW processors. These strategies sacrifice storage space and execution time, respectively, in order to reconfigure without recompiling. We present Markov models that describe the behavior of processors using these different approaches and we evaluate their reliabilities. The results show that, while super-scalar and VLIW with recompilation provide the highest reliability, all proposed strategies significantly increase reliability over that of an unprotected processor
Abnormal fault-recovery characteristics of the fault-tolerant multiprocessor uncovered using a new fault-injection methodology
An investigation was made in AIRLAB of the fault handling performance of the Fault Tolerant MultiProcessor (FTMP). Fault handling errors detected during fault injection experiments were characterized. In these fault injection experiments, the FTMP disabled a working unit instead of the faulted unit once in every 500 faults, on the average. System design weaknesses allow active faults to exercise a part of the fault management software that handles Byzantine or lying faults. Byzantine faults behave such that the faulted unit points to a working unit as the source of errors. The design's problems involve: (1) the design and interface between the simplex error detection hardware and the error processing software, (2) the functional capabilities of the FTMP system bus, and (3) the communication requirements of a multiprocessor architecture. These weak areas in the FTMP's design increase the probability that, for any hardware fault, a good line replacement unit (LRU) is mistakenly disabled by the fault management software
Error latency estimation using functional fault modeling
A complete modeling of faults at gate level for a fault tolerant computer is both infeasible and uneconomical. Functional fault modeling is an approach where units are characterized at an intermediate level and then combined to determine fault behavior. The applicability of functional fault modeling to the FTMP is studied. Using this model a forecast of error latency is made for some functional blocks. This approach is useful in representing larger sections of the hardware and aids in uncovering system level deficiencies
Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead
As time-critical systems require timing guarantees, Worst-Case Execution Times (WCET) have to be employed. However, WCET estimation methods usually assume fault-free hardware. If proper actions are not taken, such fault-free WCET approaches become unsafe, when faults impact the hardware during execution. The majority of approaches, dealing with hardware faults, address the impact of faults on the functional behavior of an application, i.e., denial of service and binary correctness. Few approaches address the impact of faults on the application timing behavior, i.e., time to finish the application, and target faults occurring in memories. However, as the transistor size in modern technologies is significantly reduced, faults in cores cannot be considered negligible anymore. This work shows that faults not only affect the functional behavior, but they can have a significant impact on the timing behavior of applications. To expose the overall impact of faults, we enhance vulnerability analysis to include not only functional, but also timing correctness, and show that faults impact WCET estimations. As common techniques to deal with faults, such as watchdog timers and re-execution, have large timing overhead for error detection and correction, we propose a mechanism with near-zero and bounded timing overhead. A RISC-V core is used as a case study. The obtained results show that faults can lead up to almost 700% increase in the maximum observed execution time between fault-free and faulty execution without protection, affecting the WCET estimations. On the contrary, the proposed mechanism is able to restore fault-free WCET estimations with a bounded overhead of 2 execution cycles
A fault detection scheme for time-delay systems using minimum-order functional observers
This paper presents a method for designing residual generators using minimum-order functional observers to detect actuator and component faults in time-delay systems. Existence conditions of the residual generators and functional observers are first derived, and then based on a parametric approach to the solution of a generalized Sylvester matrix equation, we develop systematic procedures for designing minimum-order functional observers to detect faults in the system. The advantages of having minimum-order observers are obvious from the economical and practical points of view as cost saving and simplicity can be achieved, particularly when dealing with high-order complex systems. Extensive numerical examples are given to illustrate the proposed fault detection scheme. In all the numerical examples, we design minimum-order residual generators and functional observers to detect faults in the system
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