468 research outputs found

    SABRE: A bio-inspired fault-tolerant electronic architecture

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    As electronic devices become increasingly complex, ensuring their reliable, fault-free operation is becoming correspondingly more challenging. It can be observed that, in spite of their complexity, biological systems are highly reliable and fault tolerant. Hence, we are motivated to take inspiration for biological systems in the design of electronic ones. In SABRE (self-healing cellular architectures for biologically inspired highly reliable electronic systems), we have designed a bio-inspired fault-tolerant hierarchical architecture for this purpose. As in biology, the foundation for the whole system is cellular in nature, with each cell able to detect faults in its operation and trigger intra-cellular or extra-cellular repair as required. At the next level in the hierarchy, arrays of cells are configured and controlled as function units in a transport triggered architecture (TTA), which is able to perform partial-dynamic reconfiguration to rectify problems that cannot be solved at the cellular level. Each TTA is, in turn, part of a larger multi-processor system which employs coarser grain reconfiguration to tolerate faults that cause a processor to fail. In this paper, we describe the details of operation of each layer of the SABRE hierarchy, and how these layers interact to provide a high systemic level of fault tolerance. © 2013 IOP Publishing Ltd

    Evolutionary morphogenesis for multi-cellular systems

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    With a gene required for each phenotypic trait, direct genetic encodings may show poor scalability to increasing phenotype length. Developmental systems may alleviate this problem by providing more efficient indirect genotype to phenotype mappings. A novel classification of multi-cellular developmental systems in evolvable hardware is introduced. It shows a category of developmental systems that up to now has rarely been explored. We argue that this category is where most of the benefits of developmental systems lie (e.g. speed, scalability, robustness, inter-cellular and environmental interactions that allow fault-tolerance or adaptivity). This article describes a very simple genetic encoding and developmental system designed for multi-cellular circuits that belongs to this category. We refer to it as the morphogenetic system. The morphogenetic system is inspired by gene expression and cellular differentiation. It focuses on low computational requirements which allows fast execution and a compact hardware implementation. The morphogenetic system shows better scalability compared to a direct genetic encoding in the evolution of structures of differentiated cells, and its dynamics provides fault-tolerance up to high fault rates. It outperforms a direct genetic encoding when evolving spiking neural networks for pattern recognition and robot navigation. The results obtained with the morphogenetic system indicate that this "minimalist” approach to developmental systems merits further stud

    Hardware morphogenetic developmental system

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    Indirect genotype to phenotype mappings in the form of developmental systems may allow better scalability to larger phenotypes in evolvable hardware. This report reviews developmental systems used in evolvable hardware and it proposes a new classifications based on hardware characteristics. It then describes a genetic encoding and developmental system called the morphogenetic system which has been designed for multi-cellular circuits. This morphogenetic system is inspired upon gene expression and cell differentiation but it focuses on efficient hardware implementation. An hardware implementation on the dynamically reconfigurable POEtic circuit is described. It uses serial arithmetics and time-multiplexing to minimize ressource use

    A POEtic Architecture for Bio-Inspired Hardware

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    The implementation of bio-inspired systems in hardware has traditionally been more a matter of artistry than of method. The reasons are multiple, but one of the main problems has always been the lack of a universal platform, of a standardized architecture, and of a proper methodology for the implementation of such systems. The ideas presented in this article are the first results of a new research project, "Reconfigurable POEtic Tissue". The goal of the project is the development of a hardware platform capable of implementing systems inspired by all the three major axes (phylogenesis, ontogenesis, and epigenesis) of bio-inspiration in digital hardware. A novel cellular architecture, capable of exploiting the main features of the future POEtic tissue and compatible with a relatively automatic design methodology, is then presented

    POEtic Tissue: An Integrated Architecture for Bio-inspired Hardware

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    It is clear to all, after a moments thought, that nature has much wemight be inspired by when designing our systems, for example: robustness, adaptability and complexity, to name a few. The implementation of bio-inspired systems in hardware has however been limited, and more often than not been more a matter of artistry than engineering. The reasons for this are many, but one of the main problems has always been the lack of a universal platform, and of a proper methodology for the implementation of such systems. The ideas presented in this paper are early results of a new research project, "Reconfigurable POEtic Tissue". The goal of the project is the development of a hardware platform capable of implementing systems inspired by all three major axes (phylogenesis, ontogenesis, and epigenesis) of bio-inspiration, in digital hardware

    Unicellular self-healing electronic array

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    This paper presents on-line fault detection and fault repair capability of our Unitronics architecture, based on a bio-inspired prokaryotic bacterial colony model. At the device programming level, it appears as a cellular FPGA-like system; however, underlying structures transpose it into an inherently self-healing and fault tolerant electronics system. An e-puck object avoidance robot controller was built to demonstrate all the underlying theories of our research. The robot successfully demonstrated that it was able to cope with multiple, simultaneously occurring faults on-line whilst the robot was being controlled to move in a „figure 8‟-like manner. Integrity of the system is continuously monitored on-line, and if a fault is detected its location is automatically identified. Detection will trigger an on-line self-repair process. The amount of repair only depends on the number of spare cells the system is equipped with. The embedded fault repair mechanism uses significantly less memory for gene storage and considerably less hardware overall for target system implementation than any previously proposed bio-inspired architecture

    A Practical Investigation into Achieving Bio-Plausibility in Evo-Devo Neural Microcircuits Feasible in an FPGA

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    Many researchers has conjectured, argued, or in some cases demonstrated, that bio-plausibility can bring about emergent properties such as adaptability, scalability, fault-tolerance, self-repair, reliability, and autonomy to bio-inspired intelligent systems. Evolutionary-developmental (evo-devo) spiking neural networks are a very bio-plausible mixture of such bio-inspired intelligent systems that have been proposed and studied by a few researchers. However, the general trend is that the complexity and thus the computational cost grow with the bio-plausibility of the system. FPGAs (Field- Programmable Gate Arrays) have been used and proved to be one of the flexible and cost efficient hardware platforms for research' and development of such evo-devo systems. However, mapping a bio-plausible evo-devo spiking neural network to an FPGA is a daunting task full of different constraints and trade-offs that makes it, if not infeasible, very challenging. This thesis explores the challenges, trade-offs, constraints, practical issues, and some possible approaches in achieving bio-plausibility in creating evolutionary developmental spiking neural microcircuits in an FPGA through a practical investigation along with a series of case studies. In this study, the system performance, cost, reliability, scalability, availability, and design and testing time and complexity are defined as measures for feasibility of a system and structural accuracy and consistency with the current knowledge in biology as measures for bio-plausibility. Investigation of the challenges starts with the hardware platform selection and then neuron, cortex, and evo-devo models and integration of these models into a whole bio-inspired intelligent system are examined one by one. For further practical investigation, a new PLAQIF Digital Neuron model, a novel Cortex model, and a new multicellular LGRN evo-devo model are designed, implemented and tested as case studies. Results and their implications for the researchers, designers of such systems, and FPGA manufacturers are discussed and concluded in form of general trends, trade-offs, suggestions, and recommendations

    Exploring Self-Repair in a Coupled Spiking Astrocyte Neural Network

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    It is now known that astrocytes modulate the activity at the tripartite synapses where indirect signaling via the retrograde messengers, endocannabinoids, leads to a localized self-repairing capability. In this paper, a self-repairing spiking astrocyte neural network (SANN) is proposed to demonstrate a distributed self-repairing capability at the network level. The SANN uses a novel learning rule that combines the spike-timing-dependent plasticity (STDP) and Bienenstock, Cooper, and Munro (BCM) learning rules (hereafter referred to as the BSTDP rule). In this learning rule, the synaptic weight potentiation is not only driven by the temporal difference between the presynaptic and postsynaptic neuron firing times but also by the postsynaptic neuron activity. We will show in this paper that the BSTDP modulates the height of the plasticity window to establish an input-output mapping (in the learning phase) and also maintains this mapping (via self-repair) if synaptic pathways become dysfunctional. It is the functional dependence of postsynaptic neuron firing activity on the height of the plasticity window that underpins how the proposed SANN self-repairs on the fly. The SANN also uses the coupling between the tripartite synapses and Îł -GABAergic interneurons. This interaction gives rise to a presynaptic neuron frequency filtering capability that serves to route information, represented as spike trains, to different neurons in the subsequent layers of the SANN. The proposed SANN follows a feedforward architecture with multiple interneuron pathways and astrocytes modulate synaptic activity at the hidden and output neuronal layers. The self-repairing capability will be demonstrated in a robotic obstacle avoidance application, and the simulation results will show that the SANN can maintain learned maneuvers at synaptic fault densities of up to 80% regardless of the fault locations

    On microelectronic self-learning cognitive chip systems

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    After a brief review of machine learning techniques and applications, this Ph.D. thesis examines several approaches for implementing machine learning architectures and algorithms into hardware within our laboratory. From this interdisciplinary background support, we have motivations for novel approaches that we intend to follow as an objective of innovative hardware implementations of dynamically self-reconfigurable logic for enhanced self-adaptive, self-(re)organizing and eventually self-assembling machine learning systems, while developing this new particular area of research. And after reviewing some relevant background of robotic control methods followed by most recent advanced cognitive controllers, this Ph.D. thesis suggests that amongst many well-known ways of designing operational technologies, the design methodologies of those leading-edge high-tech devices such as cognitive chips that may well lead to intelligent machines exhibiting conscious phenomena should crucially be restricted to extremely well defined constraints. Roboticists also need those as specifications to help decide upfront on otherwise infinitely free hardware/software design details. In addition and most importantly, we propose these specifications as methodological guidelines tightly related to ethics and the nowadays well-identified workings of the human body and of its psyche

    A Practical Hardware Implementation of Systemic Computation

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    It is widely accepted that natural computation, such as brain computation, is far superior to typical computational approaches addressing tasks such as learning and parallel processing. As conventional silicon-based technologies are about to reach their physical limits, researchers have drawn inspiration from nature to found new computational paradigms. Such a newly-conceived paradigm is Systemic Computation (SC). SC is a bio-inspired model of computation. It incorporates natural characteristics and defines a massively parallel non-von Neumann computer architecture that can model natural systems efficiently. This thesis investigates the viability and utility of a Systemic Computation hardware implementation, since prior software-based approaches have proved inadequate in terms of performance and flexibility. This is achieved by addressing three main research challenges regarding the level of support for the natural properties of SC, the design of its implied architecture and methods to make the implementation practical and efficient. Various hardware-based approaches to Natural Computation are reviewed and their compatibility and suitability, with respect to the SC paradigm, is investigated. FPGAs are identified as the most appropriate implementation platform through critical evaluation and the first prototype Hardware Architecture of Systemic computation (HAoS) is presented. HAoS is a novel custom digital design, which takes advantage of the inbuilt parallelism of an FPGA and the highly efficient matching capability of a Ternary Content Addressable Memory. It provides basic processing capabilities in order to minimize time-demanding data transfers, while the optional use of a CPU provides high-level processing support. It is optimized and extended to a practical hardware platform accompanied by a software framework to provide an efficient SC programming solution. The suggested platform is evaluated using three bio-inspired models and analysis shows that it satisfies the research challenges and provides an effective solution in terms of efficiency versus flexibility trade-off
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