Parts, materials, and processes experience summary, volume 2

This summary provides the general engineering community with the accumulated experience from ALERT reports issued by NASA and the Government-Industry. Data Exchange Program, and related experience gained by Government and industry. It provides expanded information on selected topics by relating the problem area (failure) to the cause, the investigation and findings, the suggestions for avoidance (inspections, screening tests, proper part applications, requirements for manufacturer's plant facilities, etc.), and failure analysis procedures. Diodes, integrated circuits, and transistors are covered in this volume

Micro- and Nanotechnology of Wide Bandgap Semiconductors

Owing to their unique characteristics, direct wide bandgap energy, large breakdown field, and excellent electron transport properties, including operation at high temperature environments and low sensitivity to ionizing radiation, gallium nitride (GaN) and related group III-nitride heterostructures proved to be enabling materials for advanced optoelectronic and electronic devices and systems. Today, they are widely used in high performing short wavelength light emitting diodes (LEDs) and laser diodes (LDs), high performing radar, wireless telecommunications, as well ‘green’ power electronics. Impressive progress in GaN technology over the last 25 years has been driven by a continuously growing need for more advanced systems, and still new challenges arise and need to be solved. Actually, lighting industry, RF defene industry, and 5G mmWave telecommunication systems are driving forces for further intense research in order to reach full potential of GaN-based semiconductors. In the literature, there is a number of review papers and publications reporting technology progress and indicating future trends. In this Special Issue of Electronics, eight papers are published, the majority of them focusing materials and process technology of GaN-based devices fabricated on native GaN substrates. The specific topics include: GaN single crystalline substrates for electronic devices by ammonothermal and HVPE methods, Selective – Area Metalorganic Vapour – Phase Epitaxy of GaN and AlGaN/GaN hetereostructures for HEMTs, Advances in Ion Implantation of GaN and Related Materials including high pressure processing (lattice reconstruction) of ion implanted GaN (Mg and Be) and III-Nitride Nanowires for electronic and optoelectronic devices

Built-in-self-test of RF front-end circuitry

Fuelled by the ever increasing demand for wireless products and the advent of deep submicron CMOS, RF ICs have become fairly commonplace in the semiconductor market. This has given rise to a new breed of Systems-On-Chip (SOCs) with RF front-ends tightly integrated along with digital, analog and mixed signal circuitry. However, the reliability of the integrated RF front-end continues to be a matter of significant concern and considerable research. A major challenge to the reliability of RF ICs is the fact that their performance is also severely degraded by wide tolerances in on-chip passives and package parasitics, in addition to process related faults. Due to the absence of contact based testing solutions in embedded RF SOCs (because the very act of probing may affect the performance of the RF circuit), coupled with the presence of very few test access nodes, a Built In Self Test approach (BiST) may prove to be the most efficient test scheme. However due to the associated challenges, a comprehensive and low-overhead BiST methodology for on-chip testing of RF ICs has not yet been reported in literature. In the current work, an approach to RF self-test that has hitherto been unexplored both in literature and in the commercial arena is proposed. A sensitive current monitor has been used to extract variations in the supply current drawn by the circuit-under-test (CUT). These variations are then processed in time and frequency domain to develop signatures. The acquired signatures can then be mapped to specific behavioral anomalies and the locations of these anomalies. The CUT is first excited by simple test inputs that can be generated on-chip. The current monitor extracts the corresponding variations in the supply current of the CUT, thereby creating signatures that map to various performance metrics of the circuit. These signatures can then be post-processed by low overhead on-chip circuitry and converted into an accessible form. To be successful in the RF domain any BIST architecture must be minimally invasive, reliable, offer good fault coverage and present low real estate and power overheads. The current-based self-test approach successfully addresses all these concerns. The technique has been applied to RF Low Noise Amplifiers, Mixers and Voltage Controlled Oscillators. The circuitry and post-processing techniques have also been demonstrated in silicon (using the IBM 0.25 micron RF CMOS process). The entire self-test of the RF front-end can be accomplished with a total test time of approximately 30µs, which is several orders of magnitude better than existing commercial test schemes

Wide Bandgap Based Devices: Design, Fabrication and Applications, Volume II

Wide bandgap (WBG) semiconductors are becoming a key enabling technology for several strategic fields, including power electronics, illumination, and sensors. This reprint collects the 23 papers covering the full spectrum of the above applications and providing contributions from the on-going research at different levels, from materials to devices and from circuits to systems

Carrier Lifetime vs. Proton Radiation in Prototype III-V and II-VI Space-based Infrared Detectors

Researchers have spent over 50 years improving the performance of HgCdTe infrared (IR) detectors and it is currently the dominant technology in the field; however, further improvement may be limited due to devices reaching the intrinsic limits of their constituent materials. To further improve the state-of-the-art in space-based IR detection, alternative material systems are being considered. The focus of this work is testing the space-environment viability of innovative device structures, namely unipolar barriers with Type-II superlattice (T2SL) absorbers, made from the 6.1 Å family of III-V elements which are theoretically superior performers while being less costly. Sensitive IR photo-detection using III-V material systems has been demonstrated; however, overall performance to-date has been hindered by short minority carrier lifetimes attributed to high concentrations of Shockley-Read-Hall (SRH) recombination centers. This problem is exacerbated when these materials are exposed to charged particle vi irradiation, as is unavoidable for spacecraft electronics, due to displacement damage increasing the concentration of SRH defects. In this work, a measurement system was designed and constructed to directly measure the minority carrier recombination lifetimes of prototype IR detector structures at the wafer die level as functions of proton fluence and temperature, to include both HgCdTe and the new 6.1 Å T2SL nBn technology being considered. It is unique for two reasons: 1) it was designed to be portable which allows in-situ lifetime characterization vs. stepwise proton irradiation by deploying it to radiation sources across the country, and 2) through cryogenic cooling, it maintains samples at mission operating temperatures throughout entire irradiation experiments which enables post-radiation annealing studies. The typical radiation test found in literature is a single, large dose performed at room temperature. The conclusions in this dissertation are derived from analyses on data acquired from this measurement system at a monoenergetic proton source. Radiation tolerances of the minority carrier lifetime and post-radiation annealing effects are compared between HgCdTe photodiodes and 6.1 Å T2SL nBn detector structures, the effects of doping and other design parameters on the lifetime damage factors in III-V materials are investigated, and a damage factor vs. proton energy (NIEL) study was performed on III-V structures which allows spacecraft mission planners to extrapolate lifetime damage factors in these materials through any proton differential energy spectra of interest, i.e. satellite orbit

Technical Design Report for PANDA Electromagnetic Calorimeter (EMC)

This document presents the technical layout and the envisaged performance of the Electromagnetic Calorimeter (EMC) for the PANDA target spectrometer. The EMC has been designed to meet the physics goals of the PANDA experiment. The performance figures are based on extensive prototype tests and radiation hardness studies. The document shows that the EMC is ready for construction up to the front-end electronics interface

Silicon Nanocrystal Based Light Emitting Devices for Silicon Photonics

This thesis presents experimental work developing silicon nanocrystal based light emitting devices for silicon photonics. The chapters are organized as follows: In chapter 2, fabrication and characterization of silicon nanocrystal based devices are presented. In collaboration with Intel Corporation and Bruno Kessler Foundation and thanks to the support of European Commission through the project No. ICT-FP7-224312 HELIOS and through the project No. ICT-FP7-248909 LIMA, it is shown that layers and devices containing silicon nanocrystals can be formed in a production silicon-fab on 4 and 8 inch silicon substrates via PECVD and subsequent thermal annealing. Devices produced by single layer and multilayer deposition are studied and compared in terms of structural properties, conduction mechanisms and electroluminescence properties. Power efficiency is evaluated and studied in order to understand the relation between exciton recombination and electrical conduction. A band gap engineering method is proposed in order to better control carrier injection and light emission in order to enhance the electroluminescence power efficiency. In chapter 3, the power efficiency of silicon nanocrystal light-emitting devices is studied in alternating current regime. An experimental method based on impedance spectroscopy is proposed and an electrical model based on the constant phase element (CPE) is derived. It is, then, given a physical interpretation of the electrical model proposed by considering the disordered composition of the active material. The electrical model is further generalized for many kinds of waveforms applied and it is generalized for the direct current regime. At the end, time-resolved electroluminescence and carrier injection in alternate current regime are presented. In chapter 4, erbium implanted silicon rich oxide based devices are presented. The investigation of opto-electrical properties of LED in direct current and alternate current regime are studied in order to understand the injection mechanism and estimate the energy transfer between silicon nanocrystals and erbium. At the end a device layout and process flow for an erbium doped silicon nanocrystal based laser structure are shown. In chapter 5, some other applications of silicon nanocrystal are presented. An example of all-silicon solar cell is shown. The photovoltaic properties and carrier transport of silicon nanocrystal based solar are studied. At the end, the combination of emitting and absorbing properties of silicon nanocrystal based LED are used to develop an all-silicon based optical transceiver

Development of Depleted Monolithic Active Pixel Sensors for High Energy Physics Experiments

Monolithic pixel detectors have attracted increasing interest in the HEP community, because of their advantages over the traditional hybrid detectors in terms of manufacture cost, fabrication simplicity and detector thickness. The DMAPS (Depleted Monolithic Active Pixel Sensors) variant has the additional benefits of good radiation tolerance and fast charge collection speed, and is therefore a promising candidate as the tracking detector in future HEP experiments. This thesis presents the author’s PhD research on the development of DMAPSdetectors. Three DMAPS prototype chips using a commercial 150 nm HV-CMOS process have been designed by the author and are described in detail. The achievements in those chips include low leakage current ( 130 V) and fast readout electronics. A novel asynchronous switched reset scheme is proposed to be able to reduce the response time of the analog front-end to below 50 ns