The s-mote: a versatile heterogeneous multi-radio platform for wireless sensor networks applications

This paper presents a novel architecture and its implementation for a versatile, miniaturised mote which can communicate concurrently using a variety of combinations of ISM bands, has increased processing capability, and interoperability with mainstream GSM technology. All these features are integrated in a small form factor platform. The platform can have many configurations which could satisfy a variety of applications’ constraints. To the best of our knowledge, it is the first integrated platform of this type reported in the literature. The proposed platform opens the way for enhanced levels of Quality of Service (QoS), with respect to reliability, availability and latency, in addition to facilitating interoperability and power reduction compared to existing platforms. The small form factor also allows potential of integration with other mobile platforms including smart phones

SystemC^FL : a formalism for hardware/software co-design

SystemCFL is a formal language for hardware/software codesign. Principally, SystemCFL is the formalization of SyslemC based on classical process algebra ACP. The language is aimed to give formal specification of SystemC designs and perform formal analysis of SystemC processes. This paper, designed for the first-time user of SystemCFL, guides the reader through modeling, analyzing and verifying designs using SystemCFL. This paper illustrates the use of SysternCFL with two case studies taken from literature

A Novel Current-Mode Full-Wave Rectifier Based on One CDTA and Two Diodes

Precision rectifiers are important building blocks for analog signal processing. The traditional approach based on diodes and operational amplifiers (OpAmps) exhibits undesirable effects caused by limited OpAmp slew rate and diode commutations. In the paper, a full-wave rectifier based on one CDTA and two Schottky diodes is presented. The PSpice simulation results are included

Novel active function blocks and their applications in frequency filters and quadrature oscillators

Kmitočtové filtry a sinusoidní oscilátory jsou lineární elektronické obvody, které jsou používány v široké oblasti elektroniky a jsou základními stavebními bloky v analogovém zpracování signálu. V poslední dekádě pro tento účel bylo prezentováno velké množství stavebních funkčních bloků. V letech 2000 a 2006 na Ústavu telekomunikací, VUT v Brně byly definovány univerzální proudový konvejor (UCC) a univerzální napět'ový konvejor (UVC) a vyrobeny ve spolupráci s firmou AMI Semiconductor Czech, Ltd. Ovšem, stále existuje požadavek na vývoj nových aktivních prvků, které nabízejí nové výhody. Hlavní přínos práce proto spočívá v definici dalších původních aktivních stavebních bloků jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Pomocí navržených aktivních stavebních bloků byly prezentovány původní zapojení fázovacích článků prvního řádu, univerzální filtry druhého řádu, ekvivalenty obvodu typu KHN, inverzní filtry, aktivní simulátory uzemněného induktoru a kvadraturní sinusoidní oscilátory pracující v proudovém, napět'ovém a smíšeném módu. Chování navržených obvodů byla ověřena simulací v prostředí SPICE a ve vybraných případech experimentálním měřením.Frequency filters and sinusoidal oscillators are linear electric circuits that are used in wide area of electronics and also are the basic building blocks in analogue signal processing. In the last decade, huge number of active building blocks (ABBs) were presented for this purpose. In 2000 and 2006, the universal current conveyor (UCC) and the universal voltage conveyor (UVC), respectively, were designed at the Department of Telecommunication, BUT, Brno, and produced in cooperation with AMI Semiconductor Czech, Ltd. There is still the need to develop new active elements that offer new advantages. The main contribution of this thesis is, therefore, the definition of other novel ABBs such as the differential-input buffered and transconductance amplifier (DBTA), the current follower transconductance amplifier (CFTA), the z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), the generalized current follower differential input transconductance amplifier (GCFDITA), the voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), and the minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Using the proposed ABBs, novel structures of first-order all-pass filters, second-order universal filters, KHN-equivalent circuits, inverse filters, active grounded inductance simulators, and quadrature sinusoidal oscillators working in the current-, voltage-, or mixed-mode are presented. The behavior of the proposed circuits has been verified by SPICE simulations and in selected cases also by experimental measurements.

General model for delayed feedback and its application to transimpedance amplifier's bandwidth optimization

Delays in real systems can be of two types: i) intrinsic delays - due to the physical principles of operation of each electronic device; ii) designed delays - due to extra circuits used to add the desired delay. Previous work established the possibility of achieving bandwidth improvements using small delays inside the feedback loop of feedback amplifiers. The modeling approach followed on these contributions used only one designed delay element. The bandwidth reduction effect due to intrinsic delays was not considered on these contributions. This paper extends the concept to the general case of feedback amplifiers that incorporates delays of both types. An experimental demonstration using a simple 0.35μm BiCMOS transimpedance amplifier further confirms the proposed model. © 2006 IEEE

A behavioral model for the non-linear on-resistance in sample-and-hold analog switches

Abstract — This paper presents a behavioral model of the non-linear on-resistance in S&H analog switches. The model is suitable for analysis and design of low-voltage sampled data systems. Simulated results using the ATMEL 0.24µm CMOS process are shown to validate the model. The Advanced-Compact-Mosfet model (ACM), a symmetric drainto-source model, valid in the whole inversion level regime of MOS transistors, is used as reference.

Split and Shift Methodology: Overcoming Hardware Limitations on Cellular Processor Arrays for Image Processing

Na era multimedia, o procesado de imaxe converteuse nun elemento de singular importancia nos dispositivos electrónicos. Dende as comunicacións (p.e. telemedicina), a seguranza (p.e. recoñecemento retiniano) ou control de calidade e de procesos industriais (p.e. orientación de brazos articulados, detección de defectos do produto), pasando pola investigación (p.e. seguimento de partículas elementais) e diagnose médica (p.e. detección de células estrañas, identificaciónn de veas retinianas), hai un sinfín de aplicacións onde o tratamento e interpretación automáticas de imaxe e fundamental. O obxectivo último será o deseño de sistemas de visión con capacidade de decisión. As tendencias actuais requiren, ademais, a combinación destas capacidades en dispositivos pequenos e portátiles con resposta en tempo real. Isto propón novos desafíos tanto no deseño hardware como software para o procesado de imaxe, buscando novas estruturas ou arquitecturas coa menor area e consumo de enerxía posibles sen comprometer a funcionalidade e o rendemento

Анализ хаотических режимов функционирования схемы Чжуа с гладкой нелинейностью на основе метода матричной декомпозиции

The scope of this work are electric circuits or electronic devices with chaotic regimes, in particular the Chua’s circuit. A nonlinear analysis of chaotic attractors based on the Krot’s method of matrix decomposition of vector functions in state-space of complex systems has been used to investigate the Chua’s circuit with smooth nonlinearity. It includes an analysis of linear term of the matrix series as well as an estimation of influence of high order terms of this series on stability of complex system under investigation. Here the method of matrix decomposition has been applied to analysis of the Chua’s attractor. The terms of matrix series have been used to create a simulation model and to reconstruct an attractor of chaotic modes. The proposed simulation model makes it possible to separate an influence of nonlinearities on forming a chaotic regime of the Chua’s circuit. Usage of both the matrix decomposition method and computational experiment has allowed us to find out that the initial turbulence model proposed by L. D. Landau is suitable for set-up description of the chaotic regime of the Chua’s circuit. It is shown that a mode of hard self-excitation in the Chua’s circuit leads to its chaotic regime operating with a double-scroll attractor in the state-space. The results might be used to generate of chaotic oscillations or data encryption. Проведен анализ схемы Чжуа с гладкой нелинейностью с применением метода матричной декомпозиции А. М. Крота. Получено разложение в матричный ряд системы уравнений Чжуа, в результате чего найдены линейное, квадратичное и кубическое матричные ядра. На основе данного разложения разработана имитационная модель электронной схемы, реализующей схему Чжуа с гладкой нелинейностью, и построены аттракторы для хаотического режима работы данной схемы. Предложенная схемотехническая реализация позволяет учитывать раздельное влияние нелинейностей высших порядков на процесс формирования хаотического режима функционирования схемы Чжуа. Это дает возможность провести серию экспериментов по исследованию модели, не реализуемых на обычной схеме Чжуа. В ходе экспериментов была обнаружена значительная корреляция между выходными сигналами кубического и квадратичного членов матричного ряда при хаотическом режиме работы схемы. Применение матричной декомпозиции в сочетании с вычислительным экспериментом позволило выявить, что модель Л. Д. Ландау начальной турбулентности (после срыва стационарного режима) достаточно хорошо описывает процесс возникновения хаотических режимов в схеме Чжуа. В частности показано, что режим жесткого самовозбуждения электрических колебаний в схеме Чжуа приводит к появлению хаотического аттрактора типа «двойной завиток» в пространстве состояний. Полученные результаты могут найти применение в задачах генерирования хаотических сигналов, в частности для решения проблем криптографии или управления мобильными роботами, а также для предотвращения возникновения хаотических режимов в работе электронных и механических устройств