Digital Filter Design Using Improved Teaching-Learning-Based Optimization

Digital filters are an important part of digital signal processing systems. Digital filters are divided into finite impulse response (FIR) digital filters and infinite impulse response (IIR) digital filters according to the length of their impulse responses. An FIR digital filter is easier to implement than an IIR digital filter because of its linear phase and stability properties. In terms of the stability of an IIR digital filter, the poles generated in the denominator are subject to stability constraints. In addition, a digital filter can be categorized as one-dimensional or multi-dimensional digital filters according to the dimensions of the signal to be processed. However, for the design of IIR digital filters, traditional design methods have the disadvantages of easy to fall into a local optimum and slow convergence. The Teaching-Learning-Based optimization (TLBO) algorithm has been proven beneficial in a wide range of engineering applications. To this end, this dissertation focusses on using TLBO and its improved algorithms to design five types of digital filters, which include linear phase FIR digital filters, multiobjective general FIR digital filters, multiobjective IIR digital filters, two-dimensional (2-D) linear phase FIR digital filters, and 2-D nonlinear phase FIR digital filters. Among them, linear phase FIR digital filters, 2-D linear phase FIR digital filters, and 2-D nonlinear phase FIR digital filters use single-objective type of TLBO algorithms to optimize; multiobjective general FIR digital filters use multiobjective non-dominated TLBO (MOTLBO) algorithm to optimize; and multiobjective IIR digital filters use MOTLBO with Euclidean distance to optimize. The design results of the five types of filter designs are compared to those obtained by other state-of-the-art design methods. In this dissertation, two major improvements are proposed to enhance the performance of the standard TLBO algorithm. The first improvement is to apply a gradient-based learning to replace the TLBO learner phase to reduce approximation error(s) and CPU time without sacrificing design accuracy for linear phase FIR digital filter design. The second improvement is to incorporate Manhattan distance to simplify the procedure of the multiobjective non-dominated TLBO (MOTLBO) algorithm for general FIR digital filter design. The design results obtained by the two improvements have demonstrated their efficiency and effectiveness

A novel approach to the design of DSP systems using minimum complexity Finite State Machines

The paper presents a new and different approach to the design and realisation of Digital Signal Processing (DSP)systems by utilising Finite State Machines (FSM). The DSP system is modelled by mapping all its potential states into an FSM, whose complexity is usually very high. The FSM mirrors the complete functionality of the system and thus describes its behaviour in full detail. Examples for FSMs of first and second order digital recursive filters are provided and the current version of the software simulating the FSM corresponding to any linear time-invariant DSP system is described. The potential of this approach including state reduction techniques as well as the inclusion of non-linear DSP systems is also outlined, and further future research intentions are briefly explored

Modeling digital control systems with MA-prefiltered measurements

Three discrete state variable representations are derived for a continuous-time plant driven by a zero-order-hold with a combination of instantaneous measurements and measurements prefiltered by moving-average (MA) digital filters. These representations allow the control system engineer to accurately model plants of this type in a form which permits him to use standard techniques to design digital feedback controllers for them. An example is presented which illustrates how to obtain the coefficient matrices in each representation. Guidelines are presented for choosing the best representation to use for any given point

Digital Filter Design Using Multiobjective Cuckoo Search Algorithm

Digital filters can be divided into finite impulse response (FIR) digital filters and infinite impulse response (IIR) digital filters. Evolutionary algorithms are effective techniques in digital filter designs. One such evolutionary algorithm is Cuckoo Search Algorithm (CSA). The CSA is a heuristic algorithm which emulates a special parasitic hatching habit of some species of cuckoos and have been proved to be an effective method with various applications. This thesis compares CSA with Park-McClellan algorithm on linear-phase FIR Type-1 lowpass, highpass, bandpass and bandstop digital filter design. Furthermore, a multiobjective Cuckoo Search Algorithm (MOCSA) is applied on general FIR digital design with a comparison to Non-dominated Sorting Genetic Algorithm III (NSGA-III). Finally, a constrained multiobjective Cuckoo Search Algorithm is presented and used for IIR digital filter design. The design results of the constrained MOCSA approach compares favorably with other state-of-the-art optimization methods. CSA utilizes Levy flight with wide-range step length for the global walk to assure reaching the global optimum and the approach of local walk to orientate the direction toward the local minima. Furthermore, MOCSA incorporates a method of Euclidean distance combing objective-based equilibrating operations and the searching for the optimal solution into one step and simplifies the procedure of comparison

Optimized digital filtering techniques for radiation detection with HPGe detectors

This paper describes state-of-the-art digital filtering techniques that are part of GEANA, an automatic data analysis software used for the GERDA experiment. The discussed filters include a novel, nonlinear correction method for ballistic deficits, which is combined with one of three shaping filters: a pseudo-Gaussian, a modified trapezoidal, or a modified cusp filter. The performance of the filters is demonstrated with a 762 g Broad Energy Germanium (BEGe) detector, produced by Canberra, that measures {\gamma}-ray lines from radioactive sources in an energy range between 59.5 and 2614.5 keV. At 1332.5 keV, together with the ballistic deficit correction method, all filters produce a comparable energy resolution of ~1.61 keV FWHM. This value is superior to those measured by the manufacturer and those found in publications with detectors of a similar design and mass. At 59.5 keV, the modified cusp filter without a ballistic deficit correction produced the best result, with an energy resolution of 0.46 keV. It is observed that the loss in resolution by using a constant shaping time over the entire energy range is small when using the ballistic deficit correction method

A comparison of methods for DPLL loop filter design

Four design methodologies for loop filters for a class of digital phase-locked loops (DPLLs) are presented. The first design maps an optimum analog filter into the digital domain; the second approach designs a filter that minimizes in discrete time weighted combination of the variance of the phase error due to noise and the sum square of the deterministic phase error component; the third method uses Kalman filter estimation theory to design a filter composed of a least squares fading memory estimator and a predictor. The last design relies on classical theory, including rules for the design of compensators. Linear analysis is used throughout the article to compare different designs, and includes stability, steady state performance and transient behavior of the loops. Design methodology is not critical when the loop update rate can be made high relative to loop bandwidth, as the performance approaches that of continuous time. For low update rates, however, the miminization method is significantly superior to the other methods

The Monte Carlo Approach to State Estimation for Linear Dynamical Systems with State-Dependent Measurement Noise

This paper is concerned with the state estimation of linear dynamical systems with state-dependent measurement noise. The minimum variance estimate of the state is obtained as the weighted mean of the outputs of Kalman filters parameterized by the state-dependent measurement noise sequences. The usual calculation for this estimate, however, becomes impractical since a very large amount of outputs of Kalman filters is required. Therefore, we regard the set of all the state-dependent measurement noise sequences as a population. Then, we evaluate the minimum variance estimate on the basis of a relatively small number of outputs of Kalman filters, parameterized by the state-dependent measurement noise sequences sampled at random from the population. The convergence of the algorithm is established. Then, by an approximation of a sampling procedure with a fast convergence property, a feasible sampling procedure is determined and a practical algorithm is designed. This policy of design leads to an efficient algorithm. Digital simulation results show a good performance of the proposed algorithm

Economical Implementation of a Filter Engine in an FPGA

A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup